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ConnectPass Struct Reference
+ Inheritance diagram for ConnectPass:
+ Collaboration diagram for ConnectPass:

Public Member Functions

 ConnectPass ()
 
virtual void help ()
 
virtual void execute (std::vector< std::string > args, RTLIL::Design *design)
 
pre_post_exec_state_t pre_execute ()
 
void post_execute (pre_post_exec_state_t state)
 
void cmd_log_args (const std::vector< std::string > &args)
 
void cmd_error (const std::vector< std::string > &args, size_t argidx, std::string msg)
 
void extra_args (std::vector< std::string > args, size_t argidx, RTLIL::Design *design, bool select=true)
 
virtual void run_register ()
 

Static Public Member Functions

static void call (RTLIL::Design *design, std::string command)
 
static void call (RTLIL::Design *design, std::vector< std::string > args)
 
static void call_on_selection (RTLIL::Design *design, const RTLIL::Selection &selection, std::string command)
 
static void call_on_selection (RTLIL::Design *design, const RTLIL::Selection &selection, std::vector< std::string > args)
 
static void call_on_module (RTLIL::Design *design, RTLIL::Module *module, std::string command)
 
static void call_on_module (RTLIL::Design *design, RTLIL::Module *module, std::vector< std::string > args)
 
static void init_register ()
 
static void done_register ()
 

Data Fields

std::string pass_name
 
std::string short_help
 
int call_counter
 
int64_t runtime_ns
 
Passnext_queued_pass
 

Detailed Description

Definition at line 44 of file connect.cc.

Constructor & Destructor Documentation

ConnectPass::ConnectPass ( )
inline

Definition at line 45 of file connect.cc.

45 : Pass("connect", "create or remove connections") { }
Pass(std::string name, std::string short_help="** document me **")
Definition: register.cc:40

Member Function Documentation

void Pass::call ( RTLIL::Design design,
std::string  command 
)
staticinherited

Definition at line 146 of file register.cc.

147 {
148  std::vector<std::string> args;
149 
150  std::string cmd_buf = command;
151  std::string tok = next_token(cmd_buf, " \t\r\n");
152 
153  if (tok.empty() || tok[0] == '#')
154  return;
155 
156  if (tok[0] == '!') {
157  cmd_buf = command.substr(command.find('!') + 1);
158  while (!cmd_buf.empty() && (cmd_buf.back() == ' ' || cmd_buf.back() == '\t' ||
159  cmd_buf.back() == '\r' || cmd_buf.back() == '\n'))
160  cmd_buf.resize(cmd_buf.size()-1);
161  log_header("Shell command: %s\n", cmd_buf.c_str());
162  int retCode = run_command(cmd_buf);
163  if (retCode != 0)
164  log_cmd_error("Shell command returned error code %d.\n", retCode);
165  return;
166  }
167 
168  while (!tok.empty()) {
169  if (tok == "#")
170  break;
171  if (tok.back() == ';') {
172  int num_semikolon = 0;
173  while (!tok.empty() && tok.back() == ';')
174  tok.resize(tok.size()-1), num_semikolon++;
175  if (!tok.empty())
176  args.push_back(tok);
177  call(design, args);
178  args.clear();
179  if (num_semikolon == 2)
180  call(design, "clean");
181  if (num_semikolon == 3)
182  call(design, "clean -purge");
183  } else
184  args.push_back(tok);
185  tok = next_token(cmd_buf, " \t\r\n");
186  }
187 
188  call(design, args);
189 }
static std::string next_token(bool pass_newline=false)
Definition: preproc.cc:96
void log_header(const char *format,...)
Definition: log.cc:188
int run_command(const std::string &command, std::function< void(const std::string &)> process_line)
Definition: yosys.cc:195
void log_cmd_error(const char *format,...)
Definition: log.cc:211
static void call(RTLIL::Design *design, std::string command)
Definition: register.cc:146

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void Pass::call ( RTLIL::Design design,
std::vector< std::string >  args 
)
staticinherited

Definition at line 191 of file register.cc.

192 {
193  if (args.size() == 0 || args[0][0] == '#')
194  return;
195 
196  if (echo_mode) {
197  log("%s", create_prompt(design, 0));
198  for (size_t i = 0; i < args.size(); i++)
199  log("%s%s", i ? " " : "", args[i].c_str());
200  log("\n");
201  }
202 
203  if (pass_register.count(args[0]) == 0)
204  log_cmd_error("No such command: %s (type 'help' for a command overview)\n", args[0].c_str());
205 
206  size_t orig_sel_stack_pos = design->selection_stack.size();
207  auto state = pass_register[args[0]]->pre_execute();
208  pass_register[args[0]]->execute(args, design);
209  pass_register[args[0]]->post_execute(state);
210  while (design->selection_stack.size() > orig_sel_stack_pos)
211  design->selection_stack.pop_back();
212 
213  design->check();
214 }
bool echo_mode
Definition: register.cc:30
std::vector< RTLIL::Selection > selection_stack
Definition: rtlil.h:509
const char * create_prompt(RTLIL::Design *design, int recursion_counter)
Definition: yosys.cc:400
void check()
Definition: rtlil.cc:357
void log_cmd_error(const char *format,...)
Definition: log.cc:211
void log(const char *format,...)
Definition: log.cc:180
std::map< std::string, Pass * > pass_register
Definition: register.cc:35

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void Pass::call_on_module ( RTLIL::Design design,
RTLIL::Module module,
std::string  command 
)
staticinherited

Definition at line 240 of file register.cc.

241 {
242  std::string backup_selected_active_module = design->selected_active_module;
243  design->selected_active_module = module->name.str();
244  design->selection_stack.push_back(RTLIL::Selection(false));
245  design->selection_stack.back().select(module);
246 
247  Pass::call(design, command);
248 
249  design->selection_stack.pop_back();
250  design->selected_active_module = backup_selected_active_module;
251 }
std::string str() const
Definition: rtlil.h:182
std::vector< RTLIL::Selection > selection_stack
Definition: rtlil.h:509
RTLIL::IdString name
Definition: rtlil.h:599
std::string selected_active_module
Definition: rtlil.h:511
static void call(RTLIL::Design *design, std::string command)
Definition: register.cc:146

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void Pass::call_on_module ( RTLIL::Design design,
RTLIL::Module module,
std::vector< std::string >  args 
)
staticinherited

Definition at line 253 of file register.cc.

254 {
255  std::string backup_selected_active_module = design->selected_active_module;
256  design->selected_active_module = module->name.str();
257  design->selection_stack.push_back(RTLIL::Selection(false));
258  design->selection_stack.back().select(module);
259 
260  Pass::call(design, args);
261 
262  design->selection_stack.pop_back();
263  design->selected_active_module = backup_selected_active_module;
264 }
std::string str() const
Definition: rtlil.h:182
std::vector< RTLIL::Selection > selection_stack
Definition: rtlil.h:509
RTLIL::IdString name
Definition: rtlil.h:599
std::string selected_active_module
Definition: rtlil.h:511
static void call(RTLIL::Design *design, std::string command)
Definition: register.cc:146

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void Pass::call_on_selection ( RTLIL::Design design,
const RTLIL::Selection selection,
std::string  command 
)
staticinherited

Definition at line 216 of file register.cc.

217 {
218  std::string backup_selected_active_module = design->selected_active_module;
219  design->selected_active_module.clear();
220  design->selection_stack.push_back(selection);
221 
222  Pass::call(design, command);
223 
224  design->selection_stack.pop_back();
225  design->selected_active_module = backup_selected_active_module;
226 }
std::vector< RTLIL::Selection > selection_stack
Definition: rtlil.h:509
std::string selected_active_module
Definition: rtlil.h:511
static void call(RTLIL::Design *design, std::string command)
Definition: register.cc:146

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void Pass::call_on_selection ( RTLIL::Design design,
const RTLIL::Selection selection,
std::vector< std::string >  args 
)
staticinherited

Definition at line 228 of file register.cc.

229 {
230  std::string backup_selected_active_module = design->selected_active_module;
231  design->selected_active_module.clear();
232  design->selection_stack.push_back(selection);
233 
234  Pass::call(design, args);
235 
236  design->selection_stack.pop_back();
237  design->selected_active_module = backup_selected_active_module;
238 }
std::vector< RTLIL::Selection > selection_stack
Definition: rtlil.h:509
std::string selected_active_module
Definition: rtlil.h:511
static void call(RTLIL::Design *design, std::string command)
Definition: register.cc:146

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void Pass::cmd_error ( const std::vector< std::string > &  args,
size_t  argidx,
std::string  msg 
)
inherited

Definition at line 110 of file register.cc.

111 {
112  std::string command_text;
113  int error_pos = 0;
114 
115  for (size_t i = 0; i < args.size(); i++) {
116  if (i < argidx)
117  error_pos += args[i].size() + 1;
118  command_text = command_text + (command_text.empty() ? "" : " ") + args[i];
119  }
120 
121  log("\nSyntax error in command `%s':\n", command_text.c_str());
122  help();
123 
124  log_cmd_error("Command syntax error: %s\n> %s\n> %*s^\n",
125  msg.c_str(), command_text.c_str(), error_pos, "");
126 }
virtual void help()
Definition: register.cc:93
void log_cmd_error(const char *format,...)
Definition: log.cc:211
void log(const char *format,...)
Definition: log.cc:180

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void Pass::cmd_log_args ( const std::vector< std::string > &  args)
inherited

Definition at line 100 of file register.cc.

101 {
102  if (args.size() <= 1)
103  return;
104  log("Full command line:");
105  for (size_t i = 0; i < args.size(); i++)
106  log(" %s", args[i].c_str());
107  log("\n");
108 }
void log(const char *format,...)
Definition: log.cc:180

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void Pass::done_register ( )
staticinherited

Definition at line 62 of file register.cc.

63 {
64  frontend_register.clear();
65  pass_register.clear();
66  backend_register.clear();
68 }
std::map< std::string, Frontend * > frontend_register
Definition: register.cc:34
Pass * first_queued_pass
Definition: register.cc:31
#define log_assert(_assert_expr_)
Definition: log.h:85
#define NULL
std::map< std::string, Pass * > pass_register
Definition: register.cc:35
std::map< std::string, Backend * > backend_register
Definition: register.cc:36

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virtual void ConnectPass::execute ( std::vector< std::string >  args,
RTLIL::Design design 
)
inlinevirtual

Implements Pass.

Definition at line 78 of file connect.cc.

79  {
81  for (auto &it : design->modules_) {
82  if (!design->selected(it.second))
83  continue;
84  if (module != NULL)
85  log_cmd_error("Multiple modules selected: %s, %s\n", RTLIL::id2cstr(module->name), RTLIL::id2cstr(it.first));
86  module = it.second;
87  }
88  if (module == NULL)
89  log_cmd_error("No modules selected.\n");
90  if (!module->processes.empty())
91  log_cmd_error("Found processes in selected module.\n");
92 
93  bool flag_nounset = false, flag_nomap = false;
94  std::string set_lhs, set_rhs, unset_expr;
95  std::string port_cell, port_port, port_expr;
96 
97  size_t argidx;
98  for (argidx = 1; argidx < args.size(); argidx++)
99  {
100  std::string arg = args[argidx];
101  if (arg == "-nounset") {
102  flag_nounset = true;
103  continue;
104  }
105  if (arg == "-nomap") {
106  flag_nomap = true;
107  continue;
108  }
109  if (arg == "-set" && argidx+2 < args.size()) {
110  set_lhs = args[++argidx];
111  set_rhs = args[++argidx];
112  continue;
113  }
114  if (arg == "-unset" && argidx+1 < args.size()) {
115  unset_expr = args[++argidx];
116  continue;
117  }
118  if (arg == "-port" && argidx+3 < args.size()) {
119  port_cell = args[++argidx];
120  port_port = args[++argidx];
121  port_expr = args[++argidx];
122  continue;
123  }
124  break;
125  }
126 
127  SigMap sigmap;
128  if (!flag_nomap)
129  for (auto &it : module->connections()) {
130  std::vector<RTLIL::SigBit> lhs = it.first.to_sigbit_vector();
131  std::vector<RTLIL::SigBit> rhs = it.first.to_sigbit_vector();
132  for (size_t i = 0; i < lhs.size(); i++)
133  if (rhs[i].wire != NULL)
134  sigmap.add(lhs[i], rhs[i]);
135  }
136 
137  if (!set_lhs.empty())
138  {
139  if (!unset_expr.empty() || !port_cell.empty())
140  log_cmd_error("Cant use -set together with -unset and/or -port.\n");
141 
142  RTLIL::SigSpec sig_lhs, sig_rhs;
143  if (!RTLIL::SigSpec::parse_sel(sig_lhs, design, module, set_lhs))
144  log_cmd_error("Failed to parse set lhs expression `%s'.\n", set_lhs.c_str());
145  if (!RTLIL::SigSpec::parse_rhs(sig_lhs, sig_rhs, module, set_rhs))
146  log_cmd_error("Failed to parse set rhs expression `%s'.\n", set_rhs.c_str());
147 
148  sigmap.apply(sig_lhs);
149  sigmap.apply(sig_rhs);
150 
151  if (!flag_nounset)
152  unset_drivers(design, module, sigmap, sig_lhs);
153 
154  module->connect(RTLIL::SigSig(sig_lhs, sig_rhs));
155  }
156  else
157  if (!unset_expr.empty())
158  {
159  if (!port_cell.empty() || flag_nounset)
160  log_cmd_error("Cant use -unset together with -port and/or -nounset.\n");
161 
162  RTLIL::SigSpec sig;
163  if (!RTLIL::SigSpec::parse_sel(sig, design, module, unset_expr))
164  log_cmd_error("Failed to parse unset expression `%s'.\n", unset_expr.c_str());
165 
166  sigmap.apply(sig);
167  unset_drivers(design, module, sigmap, sig);
168  }
169  else
170  if (!port_cell.empty())
171  {
172  if (flag_nounset)
173  log_cmd_error("Cant use -port together with -nounset.\n");
174 
175  if (module->cells_.count(RTLIL::escape_id(port_cell)) == 0)
176  log_cmd_error("Can't find cell %s.\n", port_cell.c_str());
177 
178  RTLIL::SigSpec sig;
179  if (!RTLIL::SigSpec::parse_sel(sig, design, module, port_expr))
180  log_cmd_error("Failed to parse port expression `%s'.\n", port_expr.c_str());
181 
182  module->cells_.at(RTLIL::escape_id(port_cell))->setPort(RTLIL::escape_id(port_port), sigmap(sig));
183  }
184  else
185  log_cmd_error("Expected -set, -unset, or -port.\n");
186  }
bool selected(T1 *module) const
Definition: rtlil.h:551
static bool parse_sel(RTLIL::SigSpec &sig, RTLIL::Design *design, RTLIL::Module *module, std::string str)
Definition: rtlil.cc:3058
const std::vector< RTLIL::SigSig > & connections() const
Definition: rtlil.cc:1307
RTLIL::Module * module
Definition: abc.cc:94
USING_YOSYS_NAMESPACE static PRIVATE_NAMESPACE_BEGIN void unset_drivers(RTLIL::Design *design, RTLIL::Module *module, SigMap &sigmap, RTLIL::SigSpec &sig)
Definition: connect.cc:29
void apply(RTLIL::SigBit &bit) const
Definition: sigtools.h:383
static std::string escape_id(std::string str)
Definition: rtlil.h:251
void connect(const RTLIL::SigSig &conn)
Definition: rtlil.cc:1278
RTLIL::IdString name
Definition: rtlil.h:599
static const char * id2cstr(const RTLIL::IdString &str)
Definition: rtlil.h:267
void log_cmd_error(const char *format,...)
Definition: log.cc:211
std::map< RTLIL::IdString, RTLIL::Process * > processes
Definition: rtlil.h:602
std::map< RTLIL::IdString, RTLIL::Module * > modules_
Definition: rtlil.h:507
#define NULL
std::map< RTLIL::IdString, RTLIL::Cell * > cells_
Definition: rtlil.h:596
static bool parse_rhs(const RTLIL::SigSpec &lhs, RTLIL::SigSpec &sig, RTLIL::Module *module, std::string str)
Definition: rtlil.cc:3078
void add(RTLIL::SigSpec from, RTLIL::SigSpec to)
Definition: sigtools.h:347
std::pair< SigSpec, SigSpec > SigSig
Definition: rtlil.h:71

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void Pass::extra_args ( std::vector< std::string >  args,
size_t  argidx,
RTLIL::Design design,
bool  select = true 
)
inherited

Definition at line 128 of file register.cc.

129 {
130  for (; argidx < args.size(); argidx++)
131  {
132  std::string arg = args[argidx];
133 
134  if (arg.substr(0, 1) == "-")
135  cmd_error(args, argidx, "Unknown option or option in arguments.");
136 
137  if (!select)
138  cmd_error(args, argidx, "Extra argument.");
139 
140  handle_extra_select_args(this, args, argidx, args.size(), design);
141  break;
142  }
143  // cmd_log_args(args);
144 }
void cmd_error(const std::vector< std::string > &args, size_t argidx, std::string msg)
Definition: register.cc:110
void handle_extra_select_args(Pass *pass, std::vector< std::string > args, size_t argidx, size_t args_size, RTLIL::Design *design)
Definition: select.cc:803

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virtual void ConnectPass::help ( )
inlinevirtual

Reimplemented from Pass.

Definition at line 46 of file connect.cc.

47  {
48  // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
49  log("\n");
50  log(" connect [-nomap] [-nounset] -set <lhs-expr> <rhs-expr>\n");
51  log("\n");
52  log("Create a connection. This is equivialent to adding the statement 'assign\n");
53  log("<lhs-expr> = <rhs-expr>;' to the verilog input. Per default, all existing\n");
54  log("drivers for <lhs-expr> are unconnected. This can be overwritten by using\n");
55  log("the -nounset option.\n");
56  log("\n");
57  log("\n");
58  log(" connect [-nomap] -unset <expr>\n");
59  log("\n");
60  log("Unconnect all existing drivers for the specified expression.\n");
61  log("\n");
62  log("\n");
63  log(" connect [-nomap] -port <cell> <port> <expr>\n");
64  log("\n");
65  log("Connect the specified cell port to the specified cell port.\n");
66  log("\n");
67  log("\n");
68  log("Per default signal alias names are resolved and all signal names are mapped\n");
69  log("the the signal name of the primary driver. Using the -nomap option deactivates\n");
70  log("this behavior.\n");
71  log("\n");
72  log("The connect command operates in one module only. Either only one module must\n");
73  log("be selected or an active module must be set using the 'cd' command.\n");
74  log("\n");
75  log("This command does not operate on module with processes.\n");
76  log("\n");
77  }
void log(const char *format,...)
Definition: log.cc:180

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void Pass::init_register ( )
staticinherited

Definition at line 54 of file register.cc.

55 {
56  while (first_queued_pass) {
59  }
60 }
Pass * first_queued_pass
Definition: register.cc:31
Pass * next_queued_pass
Definition: register.h:60
virtual void run_register()
Definition: register.cc:48

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void Pass::post_execute ( Pass::pre_post_exec_state_t  state)
inherited

Definition at line 84 of file register.cc.

85 {
86  int64_t time_ns = PerformanceTimer::query() - state.begin_ns;
87  runtime_ns += time_ns;
88  current_pass = state.parent_pass;
89  if (current_pass)
90  current_pass->runtime_ns -= time_ns;
91 }
static int64_t query()
Definition: log.h:151
int64_t runtime_ns
Definition: register.h:37
Pass * current_pass
Definition: register.cc:32
Pass * parent_pass
Definition: register.h:40
int64_t begin_ns
Definition: register.h:41

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Pass::pre_post_exec_state_t Pass::pre_execute ( )
inherited

Definition at line 74 of file register.cc.

75 {
76  pre_post_exec_state_t state;
77  call_counter++;
78  state.begin_ns = PerformanceTimer::query();
79  state.parent_pass = current_pass;
80  current_pass = this;
81  return state;
82 }
static int64_t query()
Definition: log.h:151
Pass * current_pass
Definition: register.cc:32
int call_counter
Definition: register.h:36

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void Pass::run_register ( )
virtualinherited

Reimplemented in Backend, and Frontend.

Definition at line 48 of file register.cc.

49 {
50  log_assert(pass_register.count(pass_name) == 0);
51  pass_register[pass_name] = this;
52 }
std::string pass_name
Definition: register.h:29
#define log_assert(_assert_expr_)
Definition: log.h:85
std::map< std::string, Pass * > pass_register
Definition: register.cc:35

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Field Documentation

int Pass::call_counter
inherited

Definition at line 36 of file register.h.

Pass* Pass::next_queued_pass
inherited

Definition at line 60 of file register.h.

std::string Pass::pass_name
inherited

Definition at line 29 of file register.h.

int64_t Pass::runtime_ns
inherited

Definition at line 37 of file register.h.

std::string Pass::short_help
inherited

Definition at line 29 of file register.h.


The documentation for this struct was generated from the following file: