Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
- i -
- ID
: yosys.h
- id()
: verilog_backend.cc
, test_autotb.cc
- id2vl()
: ast.cc
- idx()
: test_autotb.cc
- idy()
: test_autotb.cc
- if()
: verilog_lexer.cc
, ilang_lexer.cc
- IlangBackend
: ilang_backend.cc
- IlangFrontend
: ilang_frontend.cc
- implement_pattern_cache()
: fsm_map.cc
- IMPORT_DPI
: verilog_lexer.cc
- INIT_W
: demo_cmp.cc
, demo_vec.cc
- INIT_X
: demo_vec.cc
, demo_cmp.cc
- INIT_Y
: demo_cmp.cc
, demo_vec.cc
- INIT_Z
: demo_cmp.cc
, demo_vec.cc
- INITIAL
: ilang_lexer.cc
, verilog_lexer.cc
- initial_tv
: log.cc
- input()
: ilang_lexer.cc
, verilog_lexer.cc
- input_buffer
: preproc.cc
- input_buffer_charp
: preproc.cc
- input_file()
: preproc.cc
- insert_input()
: preproc.cc
- INT16_MAX
: verilog_lexer.cc
, ilang_lexer.cc
- INT16_MIN
: ilang_lexer.cc
, verilog_lexer.cc
- INT32_MAX
: ilang_lexer.cc
, verilog_lexer.cc
- INT32_MIN
: ilang_lexer.cc
, verilog_lexer.cc
- INT8_MAX
: verilog_lexer.cc
, ilang_lexer.cc
- INT8_MIN
: verilog_lexer.cc
, ilang_lexer.cc
- IntersynthBackend
: intersynth.cc
- inv_mode
: freduce.cc
- IopadmapPass
: iopadmap.cc
- is_reg_wire()
: verilog_backend.cc
- isatty()
: verilog_lexer.cc
, ilang_lexer.cc