test_autotb.cc File Reference

#include "kernel/yosys.h"
#include <stdlib.h>
#include <stdio.h>
#include <time.h>

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Data Structures
struct	TestAutotbBackend

Functions
USING_YOSYS_NAMESPACE static PRIVATE_NAMESPACE_BEGIN std::string	id (std::string internal_id)
static std::string	idx (std::string str)
static std::string	idy (std::string str1, std::string str2=std::string(), std::string str3=std::string())
static void	autotest (std::ostream &f, RTLIL::Design *design, int num_iter)

Variables
TestAutotbBackend	TestAutotbBackend

Function Documentation

static void autotest ( std::ostream &  f, RTLIL::Design *  design, int  num_iter  )

static

Definition at line 74 of file test_autotb.cc.

{
    f << stringf("module testbench;\n\n");

    f << stringf("integer i;\n\n");

    f << stringf("reg [31:0] xorshift128_x = 123456789;\n");
    f << stringf("reg [31:0] xorshift128_y = 362436069;\n");
    f << stringf("reg [31:0] xorshift128_z = 521288629;\n");
    f << stringf("reg [31:0] xorshift128_w = %u; // <-- seed value\n", int(time(NULL)));
    f << stringf("reg [31:0] xorshift128_t;\n\n");
    f << stringf("task xorshift128;\n");
    f << stringf("begin\n");
    f << stringf("\txorshift128_t = xorshift128_x ^ (xorshift128_x << 11);\n");
    f << stringf("\txorshift128_x = xorshift128_y;\n");
    f << stringf("\txorshift128_y = xorshift128_z;\n");
    f << stringf("\txorshift128_z = xorshift128_w;\n");
    f << stringf("\txorshift128_w = xorshift128_w ^ (xorshift128_w >> 19) ^ xorshift128_t ^ (xorshift128_t >> 8);\n");
    f << stringf("end\n");
    f << stringf("endtask\n\n");

    for (auto it = design->modules_.begin(); it != design->modules_.end(); it++)
    {
        std::map<std::string, int> signal_in;
        std::map<std::string, std::string> signal_const;
        std::map<std::string, int> signal_clk;
        std::map<std::string, int> signal_out;

        RTLIL::Module *mod = it->second;

        if (mod->get_bool_attribute("\\gentb_skip"))
            continue;

        int count_ports = 0;
        log("Generating test bench for module `%s'.\n", it->first.c_str());
        for (auto it2 = mod->wires_.begin(); it2 != mod->wires_.end(); it2++) {
            RTLIL::Wire *wire = it2->second;
            if (wire->port_output) {
                count_ports++;
                signal_out[idy("sig", mod->name.str(), wire->name.str())] = wire->width;
                f << stringf("wire [%d:0] %s;\n", wire->width-1, idy("sig", mod->name.str(), wire->name.str()).c_str());
            } else if (wire->port_input) {
                count_ports++;
                bool is_clksignal = wire->get_bool_attribute("\\gentb_clock");
                for (auto it3 = mod->processes.begin(); it3 != mod->processes.end(); it3++)
                for (auto it4 = it3->second->syncs.begin(); it4 != it3->second->syncs.end(); it4++) {
                    if ((*it4)->type == RTLIL::ST0 || (*it4)->type == RTLIL::ST1)
                        continue;
                    RTLIL::SigSpec &signal = (*it4)->signal;
                    for (auto &c : signal.chunks())
                        if (c.wire == wire)
                            is_clksignal = true;
                }
                if (is_clksignal && wire->attributes.count("\\gentb_constant") == 0) {
                    signal_clk[idy("sig", mod->name.str(), wire->name.str())] = wire->width;
                } else {
                    signal_in[idy("sig", mod->name.str(), wire->name.str())] = wire->width;
                    if (wire->attributes.count("\\gentb_constant") != 0)
                        signal_const[idy("sig", mod->name.str(), wire->name.str())] = wire->attributes["\\gentb_constant"].as_string();
                }
                f << stringf("reg [%d:0] %s;\n", wire->width-1, idy("sig", mod->name.str(), wire->name.str()).c_str());
            }
        }
        f << stringf("%s %s(\n", id(mod->name.str()).c_str(), idy("uut", mod->name.str()).c_str());
        for (auto it2 = mod->wires_.begin(); it2 != mod->wires_.end(); it2++) {
            RTLIL::Wire *wire = it2->second;
            if (wire->port_output || wire->port_input)
                f << stringf("\t.%s(%s)%s\n", id(wire->name.str()).c_str(),
                        idy("sig", mod->name.str(), wire->name.str()).c_str(), --count_ports ? "," : "");
        }
        f << stringf(");\n\n");

        f << stringf("task %s;\n", idy(mod->name.str(), "reset").c_str());
        f << stringf("begin\n");
        int delay_counter = 0;
        for (auto it = signal_in.begin(); it != signal_in.end(); it++)
            f << stringf("\t%s <= #%d 0;\n", it->first.c_str(), ++delay_counter*2);
        for (auto it = signal_clk.begin(); it != signal_clk.end(); it++)
            f << stringf("\t%s <= #%d 0;\n", it->first.c_str(), ++delay_counter*2);
        for (auto it = signal_clk.begin(); it != signal_clk.end(); it++) {
            f << stringf("\t#100; %s <= 1;\n", it->first.c_str());
            f << stringf("\t#100; %s <= 0;\n", it->first.c_str());
        }
        delay_counter = 0;
        for (auto it = signal_in.begin(); it != signal_in.end(); it++)
            f << stringf("\t%s <= #%d ~0;\n", it->first.c_str(), ++delay_counter*2);
        for (auto it = signal_clk.begin(); it != signal_clk.end(); it++) {
            f << stringf("\t#100; %s <= 1;\n", it->first.c_str());
            f << stringf("\t#100; %s <= 0;\n", it->first.c_str());
        }
        delay_counter = 0;
        for (auto it = signal_in.begin(); it != signal_in.end(); it++) {
            if (signal_const.count(it->first) == 0)
                continue;
            f << stringf("\t%s <= #%d 'b%s;\n", it->first.c_str(), ++delay_counter*2, signal_const[it->first].c_str());
        }
        f << stringf("end\n");
        f << stringf("endtask\n\n");

        f << stringf("task %s;\n", idy(mod->name.str(), "update_data").c_str());
        f << stringf("begin\n");
        delay_counter = 0;
        for (auto it = signal_in.begin(); it != signal_in.end(); it++) {
            if (signal_const.count(it->first) > 0)
                continue;
            f << stringf("\txorshift128;\n");
            f << stringf("\t%s <= #%d { xorshift128_x, xorshift128_y, xorshift128_z, xorshift128_w };\n", it->first.c_str(), ++delay_counter*2);
        }
        f << stringf("end\n");
        f << stringf("endtask\n\n");

        f << stringf("task %s;\n", idy(mod->name.str(), "update_clock").c_str());
        f << stringf("begin\n");
        if (signal_clk.size()) {
            f << stringf("\txorshift128;\n");
            f << stringf("\t{");
            int total_clock_bits = 0;
            for (auto it = signal_clk.begin(); it != signal_clk.end(); it++) {
                f << stringf("%s %s", it == signal_clk.begin() ? "" : ",", it->first.c_str());
                total_clock_bits += it->second;
            }
            f << stringf(" } = {");
            for (auto it = signal_clk.begin(); it != signal_clk.end(); it++)
                f << stringf("%s %s", it == signal_clk.begin() ? "" : ",", it->first.c_str());
            f << stringf(" } ^ (%d'b1 << (xorshift128_w %% %d));\n", total_clock_bits, total_clock_bits);
        }
        f << stringf("end\n");
        f << stringf("endtask\n\n");

        char shorthand = 'A';
        std::vector<std::string> header1;
        std::string header2 = "";

        f << stringf("task %s;\n", idy(mod->name.str(), "print_status").c_str());
        f << stringf("begin\n");
        f << stringf("\t$display(\"#OUT# %%b %%b %%b %%t %%d\", {");
        if (signal_in.size())
            for (auto it = signal_in.begin(); it != signal_in.end(); it++) {
                f << stringf("%s %s", it == signal_in.begin() ? "" : ",", it->first.c_str());
                int len = it->second;
                if (len > 1)
                    header2 += "/", len--;
                while (len > 1)
                    header2 += "-", len--;
                if (len > 0)
                    header2 += shorthand, len--;
                header1.push_back("    " + it->first);
                header1.back()[0] = shorthand++;
            }
        else {
            f << stringf(" 1'bx");
            header2 += "#";
        }
        f << stringf(" }, {");
        header2 += " ";
        if (signal_clk.size()) {
            for (auto it = signal_clk.begin(); it != signal_clk.end(); it++) {
                f << stringf("%s %s", it == signal_clk.begin() ? "" : ",", it->first.c_str());
                int len = it->second;
                if (len > 1)
                    header2 += "/", len--;
                while (len > 1)
                    header2 += "-", len--;
                if (len > 0)
                    header2 += shorthand, len--;
                header1.push_back("    " + it->first);
                header1.back()[0] = shorthand++;
            }
        } else {
            f << stringf(" 1'bx");
            header2 += "#";
        }
        f << stringf(" }, {");
        header2 += " ";
        if (signal_out.size()) {
            for (auto it = signal_out.begin(); it != signal_out.end(); it++) {
                f << stringf("%s %s", it == signal_out.begin() ? "" : ",", it->first.c_str());
                int len = it->second;
                if (len > 1)
                    header2 += "/", len--;
                while (len > 1)
                    header2 += "-", len--;
                if (len > 0)
                    header2 += shorthand, len--;
                header1.push_back("    " + it->first);
                header1.back()[0] = shorthand++;
            }
        } else {
            f << stringf(" 1'bx");
            header2 += "#";
        }
        f << stringf(" }, $time, i);\n");
        f << stringf("end\n");
        f << stringf("endtask\n\n");

        f << stringf("task %s;\n", idy(mod->name.str(), "print_header").c_str());
        f << stringf("begin\n");
        f << stringf("\t$display(\"#OUT#\");\n");
        for (auto &hdr : header1)
            f << stringf("\t$display(\"#OUT#   %s\");\n", hdr.c_str());
        f << stringf("\t$display(\"#OUT#\");\n");
        f << stringf("\t$display(\"#OUT# %s\");\n", header2.c_str());
        f << stringf("end\n");
        f << stringf("endtask\n\n");

        f << stringf("task %s;\n", idy(mod->name.str(), "test").c_str());
        f << stringf("begin\n");
        f << stringf("\t$display(\"#OUT#\\n#OUT# ==== %s ====\");\n", idy(mod->name.str()).c_str());
        f << stringf("\t%s;\n", idy(mod->name.str(), "reset").c_str());
        f << stringf("\tfor (i=0; i<%d; i=i+1) begin\n", num_iter);
        f << stringf("\t\tif (i %% 20 == 0) %s;\n", idy(mod->name.str(), "print_header").c_str());
        f << stringf("\t\t#100; %s;\n", idy(mod->name.str(), "update_data").c_str());
        f << stringf("\t\t#100; %s;\n", idy(mod->name.str(), "update_clock").c_str());
        f << stringf("\t\t#100; %s;\n", idy(mod->name.str(), "print_status").c_str());
        f << stringf("\tend\n");
        f << stringf("end\n");
        f << stringf("endtask\n\n");
    }

    f << stringf("initial begin\n");
    f << stringf("\t// $dumpfile(\"testbench.vcd\");\n");
    f << stringf("\t// $dumpvars(0, testbench);\n");
    for (auto it = design->modules_.begin(); it != design->modules_.end(); it++)
        if (!it->second->get_bool_attribute("\\gentb_skip"))
            f << stringf("\t%s;\n", idy(it->first.str(), "test").c_str());
    f << stringf("\t$finish;\n");
    f << stringf("end\n\n");

    f << stringf("endmodule\n");
}

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USING_YOSYS_NAMESPACE static PRIVATE_NAMESPACE_BEGIN std::string id ( std::string  internal_id )

static

Definition at line 28 of file test_autotb.cc.

{
    const char *str = internal_id.c_str();
    bool do_escape = false;

    if (*str == '\\')
        str++;

    if ('0' <= *str && *str <= '9')
        do_escape = true;

    for (int i = 0; str[i]; i++) {
        if ('0' <= str[i] && str[i] <= '9')
            continue;
        if ('a' <= str[i] && str[i] <= 'z')
            continue;
        if ('A' <= str[i] && str[i] <= 'Z')
            continue;
        if (str[i] == '_')
            continue;
        do_escape = true;
        break;
    }

    if (do_escape)
        return "\\" + std::string(str) + " ";
    return std::string(str);
}

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static std::string idx ( std::string  str )

static

Definition at line 57 of file test_autotb.cc.

{
    if (str[0] == '\\')
        return str.substr(1);
    return str;
}

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static std::string idy ( std::string  str1, std::string  str2 = std::string(), std::string  str3 = std::string()  )

static

Definition at line 64 of file test_autotb.cc.

{
    str1 = idx(str1);
    if (!str2.empty())
        str1 += "_" + idx(str2);
    if (!str3.empty())
        str1 += "_" + idx(str3);
    return id(str1);
}

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Variable Documentation

TestAutotbBackend TestAutotbBackend