yosys-master
 All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Friends Macros
DeletePass Struct Reference
+ Inheritance diagram for DeletePass:
+ Collaboration diagram for DeletePass:

Public Member Functions

 DeletePass ()
 
virtual void help ()
 
virtual void execute (std::vector< std::string > args, RTLIL::Design *design)
 
pre_post_exec_state_t pre_execute ()
 
void post_execute (pre_post_exec_state_t state)
 
void cmd_log_args (const std::vector< std::string > &args)
 
void cmd_error (const std::vector< std::string > &args, size_t argidx, std::string msg)
 
void extra_args (std::vector< std::string > args, size_t argidx, RTLIL::Design *design, bool select=true)
 
virtual void run_register ()
 

Static Public Member Functions

static void call (RTLIL::Design *design, std::string command)
 
static void call (RTLIL::Design *design, std::vector< std::string > args)
 
static void call_on_selection (RTLIL::Design *design, const RTLIL::Selection &selection, std::string command)
 
static void call_on_selection (RTLIL::Design *design, const RTLIL::Selection &selection, std::vector< std::string > args)
 
static void call_on_module (RTLIL::Design *design, RTLIL::Module *module, std::string command)
 
static void call_on_module (RTLIL::Design *design, RTLIL::Module *module, std::vector< std::string > args)
 
static void init_register ()
 
static void done_register ()
 

Data Fields

std::string pass_name
 
std::string short_help
 
int call_counter
 
int64_t runtime_ns
 
Passnext_queued_pass
 

Detailed Description

Definition at line 25 of file delete.cc.

Constructor & Destructor Documentation

DeletePass::DeletePass ( )
inline

Definition at line 26 of file delete.cc.

26 : Pass("delete", "delete objects in the design") { }
Pass(std::string name, std::string short_help="** document me **")
Definition: register.cc:40

Member Function Documentation

void Pass::call ( RTLIL::Design design,
std::string  command 
)
staticinherited

Definition at line 146 of file register.cc.

147 {
148  std::vector<std::string> args;
149 
150  std::string cmd_buf = command;
151  std::string tok = next_token(cmd_buf, " \t\r\n");
152 
153  if (tok.empty() || tok[0] == '#')
154  return;
155 
156  if (tok[0] == '!') {
157  cmd_buf = command.substr(command.find('!') + 1);
158  while (!cmd_buf.empty() && (cmd_buf.back() == ' ' || cmd_buf.back() == '\t' ||
159  cmd_buf.back() == '\r' || cmd_buf.back() == '\n'))
160  cmd_buf.resize(cmd_buf.size()-1);
161  log_header("Shell command: %s\n", cmd_buf.c_str());
162  int retCode = run_command(cmd_buf);
163  if (retCode != 0)
164  log_cmd_error("Shell command returned error code %d.\n", retCode);
165  return;
166  }
167 
168  while (!tok.empty()) {
169  if (tok == "#")
170  break;
171  if (tok.back() == ';') {
172  int num_semikolon = 0;
173  while (!tok.empty() && tok.back() == ';')
174  tok.resize(tok.size()-1), num_semikolon++;
175  if (!tok.empty())
176  args.push_back(tok);
177  call(design, args);
178  args.clear();
179  if (num_semikolon == 2)
180  call(design, "clean");
181  if (num_semikolon == 3)
182  call(design, "clean -purge");
183  } else
184  args.push_back(tok);
185  tok = next_token(cmd_buf, " \t\r\n");
186  }
187 
188  call(design, args);
189 }
static std::string next_token(bool pass_newline=false)
Definition: preproc.cc:96
void log_header(const char *format,...)
Definition: log.cc:188
int run_command(const std::string &command, std::function< void(const std::string &)> process_line)
Definition: yosys.cc:195
void log_cmd_error(const char *format,...)
Definition: log.cc:211
static void call(RTLIL::Design *design, std::string command)
Definition: register.cc:146

+ Here is the call graph for this function:

+ Here is the caller graph for this function:

void Pass::call ( RTLIL::Design design,
std::vector< std::string >  args 
)
staticinherited

Definition at line 191 of file register.cc.

192 {
193  if (args.size() == 0 || args[0][0] == '#')
194  return;
195 
196  if (echo_mode) {
197  log("%s", create_prompt(design, 0));
198  for (size_t i = 0; i < args.size(); i++)
199  log("%s%s", i ? " " : "", args[i].c_str());
200  log("\n");
201  }
202 
203  if (pass_register.count(args[0]) == 0)
204  log_cmd_error("No such command: %s (type 'help' for a command overview)\n", args[0].c_str());
205 
206  size_t orig_sel_stack_pos = design->selection_stack.size();
207  auto state = pass_register[args[0]]->pre_execute();
208  pass_register[args[0]]->execute(args, design);
209  pass_register[args[0]]->post_execute(state);
210  while (design->selection_stack.size() > orig_sel_stack_pos)
211  design->selection_stack.pop_back();
212 
213  design->check();
214 }
bool echo_mode
Definition: register.cc:30
std::vector< RTLIL::Selection > selection_stack
Definition: rtlil.h:509
const char * create_prompt(RTLIL::Design *design, int recursion_counter)
Definition: yosys.cc:400
void check()
Definition: rtlil.cc:357
void log_cmd_error(const char *format,...)
Definition: log.cc:211
void log(const char *format,...)
Definition: log.cc:180
std::map< std::string, Pass * > pass_register
Definition: register.cc:35

+ Here is the call graph for this function:

void Pass::call_on_module ( RTLIL::Design design,
RTLIL::Module module,
std::string  command 
)
staticinherited

Definition at line 240 of file register.cc.

241 {
242  std::string backup_selected_active_module = design->selected_active_module;
243  design->selected_active_module = module->name.str();
244  design->selection_stack.push_back(RTLIL::Selection(false));
245  design->selection_stack.back().select(module);
246 
247  Pass::call(design, command);
248 
249  design->selection_stack.pop_back();
250  design->selected_active_module = backup_selected_active_module;
251 }
std::string str() const
Definition: rtlil.h:182
std::vector< RTLIL::Selection > selection_stack
Definition: rtlil.h:509
RTLIL::IdString name
Definition: rtlil.h:599
std::string selected_active_module
Definition: rtlil.h:511
static void call(RTLIL::Design *design, std::string command)
Definition: register.cc:146

+ Here is the call graph for this function:

+ Here is the caller graph for this function:

void Pass::call_on_module ( RTLIL::Design design,
RTLIL::Module module,
std::vector< std::string >  args 
)
staticinherited

Definition at line 253 of file register.cc.

254 {
255  std::string backup_selected_active_module = design->selected_active_module;
256  design->selected_active_module = module->name.str();
257  design->selection_stack.push_back(RTLIL::Selection(false));
258  design->selection_stack.back().select(module);
259 
260  Pass::call(design, args);
261 
262  design->selection_stack.pop_back();
263  design->selected_active_module = backup_selected_active_module;
264 }
std::string str() const
Definition: rtlil.h:182
std::vector< RTLIL::Selection > selection_stack
Definition: rtlil.h:509
RTLIL::IdString name
Definition: rtlil.h:599
std::string selected_active_module
Definition: rtlil.h:511
static void call(RTLIL::Design *design, std::string command)
Definition: register.cc:146

+ Here is the call graph for this function:

void Pass::call_on_selection ( RTLIL::Design design,
const RTLIL::Selection selection,
std::string  command 
)
staticinherited

Definition at line 216 of file register.cc.

217 {
218  std::string backup_selected_active_module = design->selected_active_module;
219  design->selected_active_module.clear();
220  design->selection_stack.push_back(selection);
221 
222  Pass::call(design, command);
223 
224  design->selection_stack.pop_back();
225  design->selected_active_module = backup_selected_active_module;
226 }
std::vector< RTLIL::Selection > selection_stack
Definition: rtlil.h:509
std::string selected_active_module
Definition: rtlil.h:511
static void call(RTLIL::Design *design, std::string command)
Definition: register.cc:146

+ Here is the call graph for this function:

void Pass::call_on_selection ( RTLIL::Design design,
const RTLIL::Selection selection,
std::vector< std::string >  args 
)
staticinherited

Definition at line 228 of file register.cc.

229 {
230  std::string backup_selected_active_module = design->selected_active_module;
231  design->selected_active_module.clear();
232  design->selection_stack.push_back(selection);
233 
234  Pass::call(design, args);
235 
236  design->selection_stack.pop_back();
237  design->selected_active_module = backup_selected_active_module;
238 }
std::vector< RTLIL::Selection > selection_stack
Definition: rtlil.h:509
std::string selected_active_module
Definition: rtlil.h:511
static void call(RTLIL::Design *design, std::string command)
Definition: register.cc:146

+ Here is the call graph for this function:

void Pass::cmd_error ( const std::vector< std::string > &  args,
size_t  argidx,
std::string  msg 
)
inherited

Definition at line 110 of file register.cc.

111 {
112  std::string command_text;
113  int error_pos = 0;
114 
115  for (size_t i = 0; i < args.size(); i++) {
116  if (i < argidx)
117  error_pos += args[i].size() + 1;
118  command_text = command_text + (command_text.empty() ? "" : " ") + args[i];
119  }
120 
121  log("\nSyntax error in command `%s':\n", command_text.c_str());
122  help();
123 
124  log_cmd_error("Command syntax error: %s\n> %s\n> %*s^\n",
125  msg.c_str(), command_text.c_str(), error_pos, "");
126 }
virtual void help()
Definition: register.cc:93
void log_cmd_error(const char *format,...)
Definition: log.cc:211
void log(const char *format,...)
Definition: log.cc:180

+ Here is the call graph for this function:

+ Here is the caller graph for this function:

void Pass::cmd_log_args ( const std::vector< std::string > &  args)
inherited

Definition at line 100 of file register.cc.

101 {
102  if (args.size() <= 1)
103  return;
104  log("Full command line:");
105  for (size_t i = 0; i < args.size(); i++)
106  log(" %s", args[i].c_str());
107  log("\n");
108 }
void log(const char *format,...)
Definition: log.cc:180

+ Here is the call graph for this function:

void Pass::done_register ( )
staticinherited

Definition at line 62 of file register.cc.

63 {
64  frontend_register.clear();
65  pass_register.clear();
66  backend_register.clear();
68 }
std::map< std::string, Frontend * > frontend_register
Definition: register.cc:34
Pass * first_queued_pass
Definition: register.cc:31
#define log_assert(_assert_expr_)
Definition: log.h:85
#define NULL
std::map< std::string, Pass * > pass_register
Definition: register.cc:35
std::map< std::string, Backend * > backend_register
Definition: register.cc:36

+ Here is the caller graph for this function:

virtual void DeletePass::execute ( std::vector< std::string >  args,
RTLIL::Design design 
)
inlinevirtual

Implements Pass.

Definition at line 43 of file delete.cc.

44  {
45  bool flag_input = false;
46  bool flag_output = false;
47 
48  size_t argidx;
49  for (argidx = 1; argidx < args.size(); argidx++)
50  {
51  if (args[argidx] == "-input") {
52  flag_input = true;
53  continue;
54  }
55  if (args[argidx] == "-output") {
56  flag_output = true;
57  continue;
58  }
59  if (args[argidx] == "-port") {
60  flag_input = true;
61  flag_output = true;
62  continue;
63  }
64  break;
65  }
66  extra_args(args, argidx, design);
67 
68  std::vector<RTLIL::IdString> delete_mods;
69 
70  for (auto &mod_it : design->modules_)
71  {
72  if (design->selected_whole_module(mod_it.first) && !flag_input && !flag_output) {
73  delete_mods.push_back(mod_it.first);
74  continue;
75  }
76 
77  if (!design->selected_module(mod_it.first))
78  continue;
79 
80  RTLIL::Module *module = mod_it.second;
81 
82  if (flag_input || flag_output) {
83  for (auto &it : module->wires_)
84  if (design->selected(module, it.second)) {
85  if (flag_input)
86  it.second->port_input = false;
87  if (flag_output)
88  it.second->port_output = false;
89  }
90  module->fixup_ports();
91  continue;
92  }
93 
94  std::set<RTLIL::Wire*> delete_wires;
95  std::set<RTLIL::Cell*> delete_cells;
96  std::set<RTLIL::IdString> delete_procs;
97  std::set<RTLIL::IdString> delete_mems;
98 
99  for (auto &it : module->wires_)
100  if (design->selected(module, it.second))
101  delete_wires.insert(it.second);
102 
103  for (auto &it : module->memories)
104  if (design->selected(module, it.second))
105  delete_mems.insert(it.first);
106 
107  for (auto &it : module->cells_) {
108  if (design->selected(module, it.second))
109  delete_cells.insert(it.second);
110  if ((it.second->type == "$memrd" || it.second->type == "$memwr") &&
111  delete_mems.count(it.second->parameters.at("\\MEMID").decode_string()) != 0)
112  delete_cells.insert(it.second);
113  }
114 
115  for (auto &it : module->processes)
116  if (design->selected(module, it.second))
117  delete_procs.insert(it.first);
118 
119  for (auto &it : delete_mems) {
120  delete module->memories.at(it);
121  module->memories.erase(it);
122  }
123 
124  for (auto &it : delete_cells)
125  module->remove(it);
126 
127  for (auto &it : delete_procs) {
128  delete module->processes.at(it);
129  module->processes.erase(it);
130  }
131 
132  module->remove(delete_wires);
133 
134  module->fixup_ports();
135  }
136 
137  for (auto &it : delete_mods) {
138  delete design->modules_.at(it);
139  design->modules_.erase(it);
140  }
141  }
bool selected(T1 *module) const
Definition: rtlil.h:551
bool selected_module(RTLIL::IdString mod_name) const
Definition: rtlil.cc:379
std::map< RTLIL::IdString, RTLIL::Wire * > wires_
Definition: rtlil.h:595
std::map< RTLIL::IdString, RTLIL::Memory * > memories
Definition: rtlil.h:601
RTLIL::Module * module
Definition: abc.cc:94
void fixup_ports()
Definition: rtlil.cc:1312
bool selected_whole_module(RTLIL::IdString mod_name) const
Definition: rtlil.cc:388
std::map< RTLIL::IdString, RTLIL::Process * > processes
Definition: rtlil.h:602
std::map< RTLIL::IdString, RTLIL::Module * > modules_
Definition: rtlil.h:507
std::map< RTLIL::IdString, RTLIL::Cell * > cells_
Definition: rtlil.h:596
void remove(const std::set< RTLIL::Wire * > &wires)
Definition: rtlil.cc:1158
void extra_args(std::vector< std::string > args, size_t argidx, RTLIL::Design *design, bool select=true)
Definition: register.cc:128

+ Here is the call graph for this function:

void Pass::extra_args ( std::vector< std::string >  args,
size_t  argidx,
RTLIL::Design design,
bool  select = true 
)
inherited

Definition at line 128 of file register.cc.

129 {
130  for (; argidx < args.size(); argidx++)
131  {
132  std::string arg = args[argidx];
133 
134  if (arg.substr(0, 1) == "-")
135  cmd_error(args, argidx, "Unknown option or option in arguments.");
136 
137  if (!select)
138  cmd_error(args, argidx, "Extra argument.");
139 
140  handle_extra_select_args(this, args, argidx, args.size(), design);
141  break;
142  }
143  // cmd_log_args(args);
144 }
void cmd_error(const std::vector< std::string > &args, size_t argidx, std::string msg)
Definition: register.cc:110
void handle_extra_select_args(Pass *pass, std::vector< std::string > args, size_t argidx, size_t args_size, RTLIL::Design *design)
Definition: select.cc:803

+ Here is the call graph for this function:

virtual void DeletePass::help ( )
inlinevirtual

Reimplemented from Pass.

Definition at line 27 of file delete.cc.

28  {
29  // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
30  log("\n");
31  log(" delete [selection]\n");
32  log("\n");
33  log("Deletes the selected objects. This will also remove entire modules, if the\n");
34  log("whole module is selected.\n");
35  log("\n");
36  log("\n");
37  log(" delete {-input|-output|-port} [selection]\n");
38  log("\n");
39  log("Does not delete any object but removes the input and/or output flag on the\n");
40  log("selected wires, thus 'deleting' module ports.\n");
41  log("\n");
42  }
void log(const char *format,...)
Definition: log.cc:180

+ Here is the call graph for this function:

void Pass::init_register ( )
staticinherited

Definition at line 54 of file register.cc.

55 {
56  while (first_queued_pass) {
59  }
60 }
Pass * first_queued_pass
Definition: register.cc:31
Pass * next_queued_pass
Definition: register.h:60
virtual void run_register()
Definition: register.cc:48

+ Here is the call graph for this function:

+ Here is the caller graph for this function:

void Pass::post_execute ( Pass::pre_post_exec_state_t  state)
inherited

Definition at line 84 of file register.cc.

85 {
86  int64_t time_ns = PerformanceTimer::query() - state.begin_ns;
87  runtime_ns += time_ns;
88  current_pass = state.parent_pass;
89  if (current_pass)
90  current_pass->runtime_ns -= time_ns;
91 }
static int64_t query()
Definition: log.h:151
int64_t runtime_ns
Definition: register.h:37
Pass * current_pass
Definition: register.cc:32
Pass * parent_pass
Definition: register.h:40
int64_t begin_ns
Definition: register.h:41

+ Here is the call graph for this function:

+ Here is the caller graph for this function:

Pass::pre_post_exec_state_t Pass::pre_execute ( )
inherited

Definition at line 74 of file register.cc.

75 {
76  pre_post_exec_state_t state;
77  call_counter++;
78  state.begin_ns = PerformanceTimer::query();
79  state.parent_pass = current_pass;
80  current_pass = this;
81  return state;
82 }
static int64_t query()
Definition: log.h:151
Pass * current_pass
Definition: register.cc:32
int call_counter
Definition: register.h:36

+ Here is the call graph for this function:

+ Here is the caller graph for this function:

void Pass::run_register ( )
virtualinherited

Reimplemented in Backend, and Frontend.

Definition at line 48 of file register.cc.

49 {
50  log_assert(pass_register.count(pass_name) == 0);
51  pass_register[pass_name] = this;
52 }
std::string pass_name
Definition: register.h:29
#define log_assert(_assert_expr_)
Definition: log.h:85
std::map< std::string, Pass * > pass_register
Definition: register.cc:35

+ Here is the caller graph for this function:

Field Documentation

int Pass::call_counter
inherited

Definition at line 36 of file register.h.

Pass* Pass::next_queued_pass
inherited

Definition at line 60 of file register.h.

std::string Pass::pass_name
inherited

Definition at line 29 of file register.h.

int64_t Pass::runtime_ns
inherited

Definition at line 37 of file register.h.

std::string Pass::short_help
inherited

Definition at line 29 of file register.h.


The documentation for this struct was generated from the following file: