Inheritance diagram for SelectPass:

Collaboration diagram for SelectPass:

Public Member Functions
	SelectPass ()

virtual void	help ()

virtual void	execute (std::vector< std::string > args, RTLIL::Design *design)

pre_post_exec_state_t	pre_execute ()

void	post_execute (pre_post_exec_state_t state)

void	cmd_log_args (const std::vector< std::string > &args)

void	cmd_error (const std::vector< std::string > &args, size_t argidx, std::string msg)

void	extra_args (std::vector< std::string > args, size_t argidx, RTLIL::Design *design, bool select=true)

virtual void	run_register ()

Static Public Member Functions
static void	call (RTLIL::Design *design, std::string command)

static void	call (RTLIL::Design *design, std::vector< std::string > args)

static void	call_on_selection (RTLIL::Design *design, const RTLIL::Selection &selection, std::string command)

static void	call_on_selection (RTLIL::Design *design, const RTLIL::Selection &selection, std::vector< std::string > args)

static void	call_on_module (RTLIL::Design design, RTLIL::Module module, std::string command)

static void	call_on_module (RTLIL::Design design, RTLIL::Module module, std::vector< std::string > args)

static void	init_register ()

static void	done_register ()

Data Fields
std::string	pass_name

std::string	short_help

int	call_counter

int64_t	runtime_ns

Pass *	next_queued_pass

Detailed Description

Definition at line 828 of file select.cc.

Constructor & Destructor Documentation

SelectPass::SelectPass ( )

inline

Definition at line 829 of file select.cc.

829 : Pass("select", "modify and view the list of selected objects") { }

Pass::Pass

Pass(std::string name, std::string short_help="** document me **")

Definition: register.cc:40

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Member Function Documentation

void Pass::call	(	RTLIL::Design *	design,
		std::string	command
	)

staticinherited

Definition at line 146 of file register.cc.

 {
     std::vector<std::string> args;
 
     std::string cmd_buf = command;
     std::string tok = next_token(cmd_buf, " \t\r\n");
 
     if (tok.empty() || tok[0] == '#')
         return;
 
     if (tok[0] == '!') {
         cmd_buf = command.substr(command.find('!') + 1);
         while (!cmd_buf.empty() && (cmd_buf.back() == ' ' || cmd_buf.back() == '\t' ||
                 cmd_buf.back() == '\r' || cmd_buf.back() == '\n'))
             cmd_buf.resize(cmd_buf.size()-1);
         log_header("Shell command: %s\n", cmd_buf.c_str());
         int retCode = run_command(cmd_buf);
         if (retCode != 0)
             log_cmd_error("Shell command returned error code %d.\n", retCode);
         return;
     }
 
     while (!tok.empty()) {
         if (tok == "#")
             break;
         if (tok.back() == ';') {
             int num_semikolon = 0;
             while (!tok.empty() && tok.back() == ';')
                 tok.resize(tok.size()-1), num_semikolon++;
             if (!tok.empty())
                 args.push_back(tok);
             call(design, args);
             args.clear();
             if (num_semikolon == 2)
                 call(design, "clean");
             if (num_semikolon == 3)
                 call(design, "clean -purge");
         } else
             args.push_back(tok);
         tok = next_token(cmd_buf, " \t\r\n");
     }
 
     call(design, args);
 }

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void Pass::call	(	RTLIL::Design *	design,
		std::vector< std::string >	args
	)

staticinherited

Definition at line 191 of file register.cc.

 {
     if (args.size() == 0 || args[0][0] == '#')
         return;
 
     if (echo_mode) {
         log("%s", create_prompt(design, 0));
         for (size_t i = 0; i < args.size(); i++)
             log("%s%s", i ? " " : "", args[i].c_str());
         log("\n");
     }
 
     if (pass_register.count(args[0]) == 0)
         log_cmd_error("No such command: %s (type 'help' for a command overview)\n", args[0].c_str());
 
     size_t orig_sel_stack_pos = design->selection_stack.size();
     auto state = pass_register[args[0]]->pre_execute();
     pass_register[args[0]]->execute(args, design);
     pass_register[args[0]]->post_execute(state);
     while (design->selection_stack.size() > orig_sel_stack_pos)
         design->selection_stack.pop_back();
 
     design->check();
 }

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void Pass::call_on_module	(	RTLIL::Design *	design,
		RTLIL::Module *	module,
		std::string	command
	)

staticinherited

Definition at line 240 of file register.cc.

 {
     std::string backup_selected_active_module = design->selected_active_module;
     design->selected_active_module = module->name.str();
     design->selection_stack.push_back(RTLIL::Selection(false));
     design->selection_stack.back().select(module);
 
     Pass::call(design, command);
 
     design->selection_stack.pop_back();
     design->selected_active_module = backup_selected_active_module;
 }

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void Pass::call_on_module	(	RTLIL::Design *	design,
		RTLIL::Module *	module,
		std::vector< std::string >	args
	)

staticinherited

Definition at line 253 of file register.cc.

 {
     std::string backup_selected_active_module = design->selected_active_module;
     design->selected_active_module = module->name.str();
     design->selection_stack.push_back(RTLIL::Selection(false));
     design->selection_stack.back().select(module);
 
     Pass::call(design, args);
 
     design->selection_stack.pop_back();
     design->selected_active_module = backup_selected_active_module;
 }

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void Pass::call_on_selection	(	RTLIL::Design *	design,
		const RTLIL::Selection &	selection,
		std::string	command
	)

staticinherited

Definition at line 216 of file register.cc.

 {
     std::string backup_selected_active_module = design->selected_active_module;
     design->selected_active_module.clear();
     design->selection_stack.push_back(selection);
 
     Pass::call(design, command);
 
     design->selection_stack.pop_back();
     design->selected_active_module = backup_selected_active_module;
 }

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void Pass::call_on_selection	(	RTLIL::Design *	design,
		const RTLIL::Selection &	selection,
		std::vector< std::string >	args
	)

staticinherited

Definition at line 228 of file register.cc.

 {
     std::string backup_selected_active_module = design->selected_active_module;
     design->selected_active_module.clear();
     design->selection_stack.push_back(selection);
 
     Pass::call(design, args);
 
     design->selection_stack.pop_back();
     design->selected_active_module = backup_selected_active_module;
 }

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void Pass::cmd_error	(	const std::vector< std::string > &	args,
		size_t	argidx,
		std::string	msg
	)

inherited

Definition at line 110 of file register.cc.

 {
     std::string command_text;
     int error_pos = 0;
 
     for (size_t i = 0; i < args.size(); i++) {
         if (i < argidx)
             error_pos += args[i].size() + 1;
         command_text = command_text + (command_text.empty() ? "" : " ") + args[i];
     }
 
     log("\nSyntax error in command `%s':\n", command_text.c_str());
     help();
 
     log_cmd_error("Command syntax error: %s\n> %s\n> %*s^\n",
             msg.c_str(), command_text.c_str(), error_pos, "");
 }

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void Pass::cmd_log_args ( const std::vector< std::string > & args )

inherited

Definition at line 100 of file register.cc.

 {
     if (args.size() <= 1)
         return;
     log("Full command line:");
     for (size_t i = 0; i < args.size(); i++)
         log(" %s", args[i].c_str());
     log("\n");
 }

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void Pass::done_register ( )

staticinherited

Definition at line 62 of file register.cc.

 {
     frontend_register.clear();
     pass_register.clear();
     backend_register.clear();
     log_assert(first_queued_pass == NULL);
 }

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virtual void SelectPass::execute	(	std::vector< std::string >	args,
		RTLIL::Design *	design
	)

inlinevirtual

Implements Pass.

Definition at line 1024 of file select.cc.

     {
         bool add_mode = false;
         bool del_mode = false;
         bool clear_mode = false;
         bool none_mode = false;
         bool list_mode = false;
         bool count_mode = false;
         bool got_module = false;
         bool assert_none = false;
         bool assert_any = false;
         int assert_count = -1;
         std::string write_file;
         std::string set_name;
         std::string sel_str;
 
         work_stack.clear();
 
         size_t argidx;
         for (argidx = 1; argidx < args.size(); argidx++)
         {
             std::string arg = args[argidx];
             if (arg == "-add") {
                 add_mode = true;
                 continue;
             }
             if (arg == "-del") {
                 del_mode = true;
                 continue;
             }
             if (arg == "-assert-none") {
                 assert_none = true;
                 continue;
             }
             if (arg == "-assert-any") {
                 assert_any = true;
                 continue;
             }
             if (arg == "-assert-count" && argidx+1 < args.size()) {
                 assert_count = atoi(args[++argidx].c_str());
                 continue;
             }
             if (arg == "-clear") {
                 clear_mode = true;
                 continue;
             }
             if (arg == "-none") {
                 none_mode = true;
                 continue;
             }
             if (arg == "-list") {
                 list_mode = true;
                 continue;
             }
             if (arg == "-write" && argidx+1 < args.size()) {
                 write_file = args[++argidx];
                 continue;
             }
             if (arg == "-count") {
                 count_mode = true;
                 continue;
             }
             if (arg == "-module" && argidx+1 < args.size()) {
                 RTLIL::IdString mod_name = RTLIL::escape_id(args[++argidx]);
                 if (design->modules_.count(mod_name) == 0)
                     log_cmd_error("No such module: %s\n", id2cstr(mod_name));
                 design->selected_active_module = mod_name.str();
                 got_module = true;
                 continue;
             }
             if (arg == "-set" && argidx+1 < args.size()) {
                 set_name = RTLIL::escape_id(args[++argidx]);
                 continue;
             }
             if (arg.size() > 0 && arg[0] == '-')
                 log_cmd_error("Unknown option %s.\n", arg.c_str());
             select_stmt(design, arg);
             sel_str += " " + arg;
         }
 
         if (clear_mode && args.size() != 2)
             log_cmd_error("Option -clear can not be combined with any other options.\n");
 
         if (none_mode && args.size() != 2)
             log_cmd_error("Option -none can not be combined with any other options.\n");
 
         if (add_mode + del_mode + assert_none + assert_any + (assert_count >= 0) > 1)
             log_cmd_error("Options -add, -del, -assert-none, -assert-any or -assert-count can not be combined.\n");
 
         if ((list_mode || !write_file.empty() || count_mode) && (add_mode || del_mode || assert_none || assert_any || assert_count >= 0))
             log_cmd_error("Options -list, -write and -count can not be combined with -add, -del, -assert-none, -assert-any or -assert-count.\n");
 
         if (!set_name.empty() && (list_mode || !write_file.empty() || count_mode || add_mode || del_mode || assert_none || assert_any || assert_count >= 0))
             log_cmd_error("Option -set can not be combined with -list, -write, -count, -add, -del, -assert-none, -assert-any or -assert-count.\n");
 
         if (work_stack.size() == 0 && got_module) {
             RTLIL::Selection sel;
             select_filter_active_mod(design, sel);
             work_stack.push_back(sel);
         }
 
         while (work_stack.size() > 1) {
             select_op_union(design, work_stack.front(), work_stack.back());
             work_stack.pop_back();
         }
 
         log_assert(design->selection_stack.size() > 0);
 
         if (clear_mode) {
             design->selection_stack.back() = RTLIL::Selection(true);
             design->selected_active_module = std::string();
             return;
         }
 
         if (none_mode) {
             design->selection_stack.back() = RTLIL::Selection(false);
             return;
         }
 
         if (list_mode || count_mode || !write_file.empty())
         {
         #define LOG_OBJECT(...) { if (list_mode) log(__VA_ARGS__); if (f != NULL) fprintf(f, __VA_ARGS__); total_count++; }
             int total_count = 0;
             FILE *f = NULL;
             if (!write_file.empty()) {
                 f = fopen(write_file.c_str(), "w");
                 if (f == NULL)
                     log_error("Can't open '%s' for writing: %s\n", write_file.c_str(), strerror(errno));
             }
             RTLIL::Selection *sel = &design->selection_stack.back();
             if (work_stack.size() > 0)
                 sel = &work_stack.back();
             sel->optimize(design);
             for (auto mod_it : design->modules_)
             {
                 if (sel->selected_whole_module(mod_it.first) && list_mode)
                     log("%s\n", id2cstr(mod_it.first));
                 if (sel->selected_module(mod_it.first)) {
                     for (auto &it : mod_it.second->wires_)
                         if (sel->selected_member(mod_it.first, it.first))
                             LOG_OBJECT("%s/%s\n", id2cstr(mod_it.first), id2cstr(it.first))
                     for (auto &it : mod_it.second->memories)
                         if (sel->selected_member(mod_it.first, it.first))
                             LOG_OBJECT("%s/%s\n", id2cstr(mod_it.first), id2cstr(it.first))
                     for (auto &it : mod_it.second->cells_)
                         if (sel->selected_member(mod_it.first, it.first))
                             LOG_OBJECT("%s/%s\n", id2cstr(mod_it.first), id2cstr(it.first))
                     for (auto &it : mod_it.second->processes)
                         if (sel->selected_member(mod_it.first, it.first))
                             LOG_OBJECT("%s/%s\n", id2cstr(mod_it.first), id2cstr(it.first))
                 }
             }
             if (count_mode)
                 log("%d objects.\n", total_count);
             if (f != NULL)
                 fclose(f);
         #undef LOG_OBJECT
             return;
         }
 
         if (add_mode)
         {
             if (work_stack.size() == 0)
                 log_cmd_error("Nothing to add to selection.\n");
             select_op_union(design, design->selection_stack.back(), work_stack.back());
             design->selection_stack.back().optimize(design);
             return;
         }
 
         if (del_mode)
         {
             if (work_stack.size() == 0)
                 log_cmd_error("Nothing to delete from selection.\n");
             select_op_diff(design, design->selection_stack.back(), work_stack.back());
             design->selection_stack.back().optimize(design);
             return;
         }
 
         if (assert_none)
         {
             if (work_stack.size() == 0)
                 log_cmd_error("No selection to check.\n");
             if (!work_stack.back().empty())
                 log_error("Assertation failed: selection is not empty:%s\n", sel_str.c_str());
             return;
         }
 
         if (assert_any)
         {
             if (work_stack.size() == 0)
                 log_cmd_error("No selection to check.\n");
             if (work_stack.back().empty())
                 log_error("Assertation failed: selection is empty:%s\n", sel_str.c_str());
             return;
         }
 
         if (assert_count >= 0)
         {
             int total_count = 0;
             if (work_stack.size() == 0)
                 log_cmd_error("No selection to check.\n");
             RTLIL::Selection *sel = &work_stack.back();
             sel->optimize(design);
             for (auto mod_it : design->modules_)
                 if (sel->selected_module(mod_it.first)) {
                     for (auto &it : mod_it.second->wires_)
                         if (sel->selected_member(mod_it.first, it.first))
                             total_count++;
                     for (auto &it : mod_it.second->memories)
                         if (sel->selected_member(mod_it.first, it.first))
                             total_count++;
                     for (auto &it : mod_it.second->cells_)
                         if (sel->selected_member(mod_it.first, it.first))
                             total_count++;
                     for (auto &it : mod_it.second->processes)
                         if (sel->selected_member(mod_it.first, it.first))
                             total_count++;
                 }
             if (assert_count != total_count)
                 log_error("Assertation failed: selection contains %d elements instead of the asserted %d:%s\n",
                         total_count, assert_count, sel_str.c_str());
             return;
         }
 
         if (!set_name.empty())
         {
             if (work_stack.size() == 0)
                 design->selection_vars[set_name] = RTLIL::Selection(false);
             else
                 design->selection_vars[set_name] = work_stack.back();
             return;
         }
 
         if (work_stack.size() == 0) {
             RTLIL::Selection &sel = design->selection_stack.back();
             if (sel.full_selection)
                 log("*\n");
             for (auto &it : sel.selected_modules)
                 log("%s\n", id2cstr(it));
             for (auto &it : sel.selected_members)
                 for (auto &it2 : it.second)
                     log("%s/%s\n", id2cstr(it.first), id2cstr(it2));
             return;
         }
 
         design->selection_stack.back() = work_stack.back();
         design->selection_stack.back().optimize(design);
     }

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void Pass::extra_args	(	std::vector< std::string >	args,
		size_t	argidx,
		RTLIL::Design *	design,
		bool	select = `true`
	)

inherited

Definition at line 128 of file register.cc.

 {
     for (; argidx < args.size(); argidx++)
     {
         std::string arg = args[argidx];
 
         if (arg.substr(0, 1) == "-")
             cmd_error(args, argidx, "Unknown option or option in arguments.");
 
         if (!select)
             cmd_error(args, argidx, "Extra argument.");
 
         handle_extra_select_args(this, args, argidx, args.size(), design);
         break;
     }
     // cmd_log_args(args);
 }

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virtual void SelectPass::help ( )

inlinevirtual

Reimplemented from Pass.

Definition at line 830 of file select.cc.

     {
         //   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
         log("\n");
         log("    select [ -add | -del | -set <name> ] <selection>\n");
         log("    select [ -assert-none | -assert-any ] <selection>\n");
         log("    select [ -list | -write <filename> | -count | -clear ]\n");
         log("    select -module <modname>\n");
         log("\n");
         log("Most commands use the list of currently selected objects to determine which part\n");
         log("of the design to operate on. This command can be used to modify and view this\n");
         log("list of selected objects.\n");
         log("\n");
         log("Note that many commands support an optional [selection] argument that can be\n");
         log("used to override the global selection for the command. The syntax of this\n");
         log("optional argument is identical to the syntax of the <selection> argument\n");
         log("described here.\n");
         log("\n");
         log("    -add, -del\n");
         log("        add or remove the given objects to the current selection.\n");
         log("        without this options the current selection is replaced.\n");
         log("\n");
         log("    -set <name>\n");
         log("        do not modify the current selection. instead save the new selection\n");
         log("        under the given name (see @<name> below). to save the current selection,\n");
         log("        use \"select -set <name> %%\"\n");
         log("\n");
         log("    -assert-none\n");
         log("        do not modify the current selection. instead assert that the given\n");
         log("        selection is empty. i.e. produce an error if any object matching the\n");
         log("        selection is found.\n");
         log("\n");
         log("    -assert-any\n");
         log("        do not modify the current selection. instead assert that the given\n");
         log("        selection is non-empty. i.e. produce an error if no object matching\n");
         log("        the selection is found.\n");
         log("\n");
         log("    -assert-count N\n");
         log("        do not modify the current selection. instead assert that the given\n");
         log("        selection contains exactly N objects.\n");
         log("\n");
         log("    -list\n");
         log("        list all objects in the current selection\n");
         log("\n");
         log("    -write <filename>\n");
         log("        like -list but write the output to the specified file\n");
         log("\n");
         log("    -count\n");
         log("        count all objects in the current selection\n");
         log("\n");
         log("    -clear\n");
         log("        clear the current selection. this effectively selects the whole\n");
         log("        design. it also resets the selected module (see -module). use the\n");
         log("        command 'select *' to select everything but stay in the current module.\n");
         log("\n");
         log("    -none\n");
         log("        create an empty selection. the current module is unchanged.\n");
         log("\n");
         log("    -module <modname>\n");
         log("        limit the current scope to the specified module.\n");
         log("        the difference between this and simply selecting the module\n");
         log("        is that all object names are interpreted relative to this\n");
         log("        module after this command until the selection is cleared again.\n");
         log("\n");
         log("When this command is called without an argument, the current selection\n");
         log("is displayed in a compact form (i.e. only the module name when a whole module\n");
         log("is selected).\n");
         log("\n");
         log("The <selection> argument itself is a series of commands for a simple stack\n");
         log("machine. Each element on the stack represents a set of selected objects.\n");
         log("After this commands have been executed, the union of all remaining sets\n");
         log("on the stack is computed and used as selection for the command.\n");
         log("\n");
         log("Pushing (selecting) object when not in -module mode:\n");
         log("\n");
         log("    <mod_pattern>\n");
         log("        select the specified module(s)\n");
         log("\n");
         log("    <mod_pattern>/<obj_pattern>\n");
         log("        select the specified object(s) from the module(s)\n");
         log("\n");
         log("Pushing (selecting) object when in -module mode:\n");
         log("\n");
         log("    <obj_pattern>\n");
         log("        select the specified object(s) from the current module\n");
         log("\n");
         log("A <mod_pattern> can be a module name, wildcard expression (*, ?, [..])\n");
         log("matching module names, or one of the following:\n");
         log("\n");
         log("    A:<pattern>, A:<pattern>=<pattern>\n");
         log("        all modules with an attribute matching the given pattern\n");
         log("        in addition to = also <, <=, >=, and > are supported\n");
         log("\n");
         log("An <obj_pattern> can be an object name, wildcard expression, or one of\n");
         log("the following:\n");
         log("\n");
         log("    w:<pattern>\n");
         log("        all wires with a name matching the given wildcard pattern\n");
         log("\n");
         log("    i:<pattern>, o:<pattern>, x:<pattern>\n");
         log("        all inputs (i:), outputs (o:) or any ports (x:) with matching names\n");
         log("\n");
         log("    s:<size>, s:<min>:<max>\n");
         log("        all wires with a matching width\n");
         log("\n");
         log("    m:<pattern>\n");
         log("        all memories with a name matching the given pattern\n");
         log("\n");
         log("    c:<pattern>\n");
         log("        all cells with a name matching the given pattern\n");
         log("\n");
         log("    t:<pattern>\n");
         log("        all cells with a type matching the given pattern\n");
         log("\n");
         log("    p:<pattern>\n");
         log("        all processes with a name matching the given pattern\n");
         log("\n");
         log("    a:<pattern>\n");
         log("        all objects with an attribute name matching the given pattern\n");
         log("\n");
         log("    a:<pattern>=<pattern>\n");
         log("        all objects with a matching attribute name-value-pair.\n");
         log("        in addition to = also <, <=, >=, and > are supported\n");
         log("\n");
         log("    r:<pattern>, r:<pattern>=<pattern>\n");
         log("        cells with matching parameters. also with <, <=, >= and >.\n");
         log("\n");
         log("    n:<pattern>\n");
         log("        all objects with a name matching the given pattern\n");
         log("        (i.e. 'n:' is optional as it is the default matching rule)\n");
         log("\n");
         log("    @<name>\n");
         log("        push the selection saved prior with 'select -set <name> ...'\n");
         log("\n");
         log("The following actions can be performed on the top sets on the stack:\n");
         log("\n");
         log("    %%\n");
         log("        push a copy of the current selection to the stack\n");
         log("\n");
         log("    %%%%\n");
         log("        replace the stack with a union of all elements on it\n");
         log("\n");
         log("    %%n\n");
         log("        replace top set with its invert\n");
         log("\n");
         log("    %%u\n");
         log("        replace the two top sets on the stack with their union\n");
         log("\n");
         log("    %%i\n");
         log("        replace the two top sets on the stack with their intersection\n");
         log("\n");
         log("    %%d\n");
         log("        pop the top set from the stack and subtract it from the new top\n");
         log("\n");
         log("    %%D\n");
         log("        like %%d but swap the roles of two top sets on the stack\n");
         log("\n");
         log("    %%c\n");
         log("        create a copy of the top set rom the stack and push it\n");
         log("\n");
         log("    %%x[<num1>|*][.<num2>][:<rule>[:<rule>..]]\n");
         log("        expand top set <num1> num times according to the specified rules.\n");
         log("        (i.e. select all cells connected to selected wires and select all\n");
         log("        wires connected to selected cells) The rules specify which cell\n");
         log("        ports to use for this. the syntax for a rule is a '-' for exclusion\n");
         log("        and a '+' for inclusion, followed by an optional comma separated\n");
         log("        list of cell types followed by an optional comma separated list of\n");
         log("        cell ports in square brackets. a rule can also be just a cell or wire\n");
         log("        name that limits the expansion (is included but does not go beyond).\n");
         log("        select at most <num2> objects. a warning message is printed when this\n");
         log("        limit is reached. When '*' is used instead of <num1> then the process\n");
         log("        is repeated until no further object are selected.\n");
         log("\n");
         log("    %%ci[<num1>|*][.<num2>][:<rule>[:<rule>..]]\n");
         log("    %%co[<num1>|*][.<num2>][:<rule>[:<rule>..]]\n");
         log("        simmilar to %%x, but only select input (%%ci) or output cones (%%co)\n");
         log("\n");
         log("    %%a\n");
         log("        expand top set by selecting all wires that are (at least in part)\n");
         log("        aliases for selected wires.\n");
         log("\n");
         log("    %%s\n");
         log("        expand top set by adding all modules of instantiated cells in selected\n");
         log("        modules\n");
         log("\n");
         log("    %%m\n");
         log("        expand top set by selecting all modules that contain selected objects\n");
         log("\n");
         log("Example: the following command selects all wires that are connected to a\n");
         log("'GATE' input of a 'SWITCH' cell:\n");
         log("\n");
         log("    select */t:SWITCH %%x:+[GATE] */t:SWITCH %%d\n");
         log("\n");
     }

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void Pass::init_register ( )

staticinherited

Definition at line 54 of file register.cc.

 {
     while (first_queued_pass) {
         first_queued_pass->run_register();
         first_queued_pass = first_queued_pass->next_queued_pass;
     }
 }

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void Pass::post_execute ( Pass::pre_post_exec_state_t state )

inherited

Definition at line 84 of file register.cc.

 {
     int64_t time_ns = PerformanceTimer::query() - state.begin_ns;
     runtime_ns += time_ns;
     current_pass = state.parent_pass;
     if (current_pass)
         current_pass->runtime_ns -= time_ns;
 }

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Pass::pre_post_exec_state_t Pass::pre_execute ( )

inherited

Definition at line 74 of file register.cc.

 {
     pre_post_exec_state_t state;
     call_counter++;
     state.begin_ns = PerformanceTimer::query();
     state.parent_pass = current_pass;
     current_pass = this;
     return state;
 }

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void Pass::run_register ( )

virtualinherited

Reimplemented in Backend, and Frontend.

Definition at line 48 of file register.cc.

 {
     log_assert(pass_register.count(pass_name) == 0);
     pass_register[pass_name] = this;
 }

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Field Documentation

int Pass::call_counter

inherited

Definition at line 36 of file register.h.

Pass* Pass::next_queued_pass

inherited

Definition at line 60 of file register.h.

std::string Pass::pass_name

inherited

Definition at line 29 of file register.h.

int64_t Pass::runtime_ns

inherited

Definition at line 37 of file register.h.

std::string Pass::short_help

inherited

Definition at line 29 of file register.h.

The documentation for this struct was generated from the following file:

select.cc

Public Member Functions

Static Public Member Functions

Data Fields

Detailed Description

Constructor & Destructor Documentation

Member Function Documentation

Field Documentation