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TraceRegressionTest.cpp
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3 // $Id$
4 
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14 // not, see <http://www.gnu.org/licenses/>.
15 
16 /// \file
17 /// \brief Regression test for Tracer class.
18 
19 #include <boost/test/unit_test.hpp>
20 #include "torc/architecture/XdlImporter.hpp"
21 #include "torc/architecture/DDB.hpp"
22 #include "torc/router/Trace.hpp"
23 #include <map>
24 
25 //#include <boost/filesystem/convenience.hpp>
26 #include "torc/common/DirectoryTree.hpp"
27 //#include "torc/physical/Factory.hpp"
28 //#include "torc/physical/XdlExporter.hpp"
29 #include "torc/physical/OutputStreamHelpers.hpp"
30 #include "torc/common/TestHelpers.hpp"
31 #include <fstream>
32 
33 namespace torc {
34 namespace router {
35 
36 struct TraceVirtex5TestFixture {
37  int& argc;
38  char**&argv;
39  torc::common::DirectoryTree directoryTree;
40  boost::filesystem::path testPath;
41  boost::filesystem::path referencePath;
42  std::fstream fileStream;
43  architecture::XdlImporter importer;
44  torc::physical::DesignSharedPtr designPtr;
45  architecture::DDB* ddbPtr;
46  std::map<architecture::Tilewire, int> sinkCounts;
47  architecture::Tilewire sourceTw;
48  architecture::Tilewire sourceTw2;
49 
50  TraceVirtex5TestFixture() : argc(boost::unit_test::framework::master_test_suite().argc),
51  argv(boost::unit_test::framework::master_test_suite().argv),
52  directoryTree(argv[0]),
53  testPath(directoryTree.getExecutablePath() / "regression"),
54  referencePath(testPath / "TraceRegressionTest.Virtex5.xdl"),
55  fileStream(referencePath.string().c_str())
56  //importer(fileStream, referencePath.string()),
57  //ddbPtr(importer.releaseDDBPtr()),
58  //tracer(*ddbPtr)
59  {
60  BOOST_REQUIRE(argc >= 1);
61  BOOST_REQUIRE(fileStream.good());
62  importer(fileStream, referencePath.string());
63  designPtr = importer.getDesignPtr();
64  BOOST_REQUIRE(designPtr.get() != 0);
65  ddbPtr = importer.releaseDDBPtr();
66  BOOST_REQUIRE(ddbPtr != 0);
67 
68  BOOST_CHECK_EQUAL(designPtr->getNetCount(), 1u);
69  BOOST_CHECK_EQUAL(ddbPtr->getArcUsage().getArcUsageCount(), 53u);
70  BOOST_TEST_MESSAGE("The pip count should include the routethrough.");
71  BOOST_CHECK_EQUAL(ddbPtr->getArcUsage().getArcUsageCount(), 54u);
72 
73  sourceTw = ddbPtr->lookupTilewire("CLBLL_X16Y39", "L_C");
74  sourceTw2 = ddbPtr->lookupTilewire("CLBLL_X16Y39", "L_CMUX");
75 
76  architecture::Tilewire tempTw;
77  tempTw = ddbPtr->lookupTilewire("CLBLM_X13Y42", "L_D1");
78  sinkCounts.insert(std::pair<architecture::Tilewire, int>(tempTw, 0));
79  tempTw = ddbPtr->lookupTilewire("CLBLM_X18Y36", "L_A1");
80  sinkCounts.insert(std::pair<architecture::Tilewire, int>(tempTw, 0));
81  tempTw = ddbPtr->lookupTilewire("CLBLM_X18Y36", "L_D3");
82  sinkCounts.insert(std::pair<architecture::Tilewire, int>(tempTw, 0));
83  tempTw = ddbPtr->lookupTilewire("CLBLM_X13Y36", "M_B6");
84  sinkCounts.insert(std::pair<architecture::Tilewire, int>(tempTw, 0));
85  tempTw = ddbPtr->lookupTilewire("CLBLM_X13Y36", "M_C5");
86  sinkCounts.insert(std::pair<architecture::Tilewire, int>(tempTw, 0));
87  tempTw = ddbPtr->lookupTilewire("CLBLM_X13Y36", "M_D3");
88  sinkCounts.insert(std::pair<architecture::Tilewire, int>(tempTw, 0));
89  tempTw = ddbPtr->lookupTilewire("CLBLM_X13Y42", "L_D2");
90  sinkCounts.insert(std::pair<architecture::Tilewire, int>(tempTw, 0));
91  tempTw = ddbPtr->lookupTilewire("CLBLL_X16Y42", "L_A1");
92  sinkCounts.insert(std::pair<architecture::Tilewire, int>(tempTw, 0));
93  tempTw = ddbPtr->lookupTilewire("CLBLL_X16Y42", "L_CE");
94  sinkCounts.insert(std::pair<architecture::Tilewire, int>(tempTw, 0));
95  tempTw = ddbPtr->lookupTilewire("CLBLM_X18Y40", "L_BX");
96  sinkCounts.insert(std::pair<architecture::Tilewire, int>(tempTw, 0));
97  tempTw = ddbPtr->lookupTilewire("CLBLM_X18Y40", "L_B4");
98  sinkCounts.insert(std::pair<architecture::Tilewire, int>(tempTw, 0));
99  }
100  ~TraceVirtex5TestFixture() {
101  BOOST_CHECK_EQUAL(TraceNode::sLiveNodes, 0);
102  delete ddbPtr;
103  }
104 };
105 
106 struct TraceVirtexTristateTestFixture {
107  int& argc;
108  char**&argv;
109  torc::common::DirectoryTree directoryTree;
110  boost::filesystem::path testPath;
111  boost::filesystem::path referencePath;
112  std::fstream fileStream;
113  architecture::XdlImporter importer;
114  torc::physical::DesignSharedPtr designPtr;
115  architecture::DDB* ddbPtr;
116  std::map<architecture::Tilewire, int> sinkCounts;
117  architecture::Tilewire sourceTw1;
118  architecture::Tilewire sourceTw2;
119 
120  TraceVirtexTristateTestFixture() : argc(boost::unit_test::framework::master_test_suite().argc),
121  argv(boost::unit_test::framework::master_test_suite().argv),
122  directoryTree(argv[0]),
123  testPath(directoryTree.getExecutablePath() / "regression"),
124  referencePath(testPath / "TraceRegressionTest.VirtexTbuf.xdl"),
125  fileStream(referencePath.string().c_str())
126  //importer(fileStream, referencePath.string()),
127  //ddbPtr(importer.releaseDDBPtr()),
128  //tracer(*ddbPtr)
129  {
130  BOOST_REQUIRE(argc >= 1);
131  BOOST_REQUIRE(fileStream.good());
132  importer(fileStream, referencePath.string());
133  designPtr = importer.getDesignPtr();
134  BOOST_REQUIRE(designPtr.get() != 0);
135  ddbPtr = importer.releaseDDBPtr();
136  BOOST_REQUIRE(ddbPtr != 0);
137 
138  BOOST_CHECK_EQUAL(designPtr->getNetCount(), 1u);
139  BOOST_CHECK_EQUAL(ddbPtr->getArcUsage().getArcUsageCount(), 34u); //33 without bidir
140 
141  sourceTw1 = ddbPtr->lookupTilewire("R7C14", "TBUF_OUT0");
142  sourceTw2 = ddbPtr->lookupTilewire("R7C18", "TBUF_OUT0");
143 
144  architecture::Tilewire tempTw;
145  tempTw = ddbPtr->lookupTilewire("R7C14", "S0_F_B1");
146  sinkCounts.insert(std::pair<architecture::Tilewire, int>(tempTw, 0));
147  tempTw = ddbPtr->lookupTilewire("R7C14", "S1_F_B1");
148  sinkCounts.insert(std::pair<architecture::Tilewire, int>(tempTw, 0));
149  tempTw = ddbPtr->lookupTilewire("R7C14", "S1_G_B1");
150  sinkCounts.insert(std::pair<architecture::Tilewire, int>(tempTw, 0));
151  tempTw = ddbPtr->lookupTilewire("R7C14", "S0_G_B1");
152  sinkCounts.insert(std::pair<architecture::Tilewire, int>(tempTw, 0));
153  tempTw = ddbPtr->lookupTilewire("R7C18", "S1_G_B1");
154  sinkCounts.insert(std::pair<architecture::Tilewire, int>(tempTw, 0));
155  tempTw = ddbPtr->lookupTilewire("R7C18", "S0_F_B1");
156  sinkCounts.insert(std::pair<architecture::Tilewire, int>(tempTw, 0));
157  tempTw = ddbPtr->lookupTilewire("R7C18", "S1_F_B1");
158  sinkCounts.insert(std::pair<architecture::Tilewire, int>(tempTw, 0));
159  }
160  ~TraceVirtexTristateTestFixture() {
161  BOOST_CHECK_EQUAL(TraceNode::sLiveNodes, 0);
162  delete ddbPtr;
163  }
164 };
165 
166 BOOST_AUTO_TEST_SUITE(router)
167 
168 BOOST_FIXTURE_TEST_SUITE(TraceRegressionVirtex, TraceVirtexTristateTestFixture)
169 
170 BOOST_AUTO_TEST_CASE(FullNet) {
171  std::cout << *ddbPtr;
172  Trace trace(*ddbPtr, sourceTw1, Trace::eTraceFullNet);
173  TraceNodePtrVector& sources = trace.getSources();
174  BOOST_CHECK_EQUAL(sources.size(), 2u);
175  TraceNodePtrVector& sinks = trace.getSinks();
176  BOOST_CHECK_EQUAL(sinks.size(), 7u);
177  TraceNodePtrVector& branchpoints = trace.getBranchPoints();
178  BOOST_CHECK_EQUAL(branchpoints.size(), 4u);
179  architecture::ArcVector& arcs = trace.getArcs();
180  BOOST_CHECK_EQUAL(arcs.size(), 34u);
181 }
182 
183 BOOST_AUTO_TEST_SUITE_END()
184 
185 BOOST_FIXTURE_TEST_SUITE(TraceRegressionVirtex5, TraceVirtex5TestFixture)
186 
187 /// \brief Unit test for the findTop and normalizeDepth functions in the Tracer.
188 BOOST_AUTO_TEST_CASE(FullNet) {
189  std::cout << *ddbPtr;
190  Trace trace(*ddbPtr, sourceTw, Trace::eTraceFullNet);
191  TraceNodePtrVector& sources = trace.getSources();
192  BOOST_CHECK_EQUAL(sources.size(), 1u);
193  TraceNodePtrVector& sinks = trace.getSinks();
194  BOOST_CHECK_EQUAL(sinks.size(), 8u);
195  TraceNodePtrVector& branchpoints = trace.getBranchPoints();
196  BOOST_CHECK_EQUAL(branchpoints.size(), 5u);
197  architecture::ArcVector& arcs = trace.getArcs();
198  BOOST_CHECK_EQUAL(arcs.size(), 34u);
199 }
200 
201 /*
202 /// \brief Unit test for the traceSource function in the Tracer.
203 BOOST_AUTO_TEST_CASE(router_tracer_tracetosinks) {
204  Tracer tracer(*ddbPtr);
205  RouteTreeNode* rtn;
206  RouteTreeNode* rtn2;
207  rtn = tracer.traceToSinks(sourceTw);
208  rtn2 = tracer.traceToSinks(sourceTw2);
209  rtn->normalizeDepth();
210  rtn2->normalizeDepth();
211  std::vector<RouteTreeNode*> vec;
212  std::vector<RouteTreeNode*> wavefront;
213  //vec.push_back(rtn);
214  //vec.push_back(rtn2);
215  wavefront.push_back(rtn);
216  wavefront.push_back(rtn2);
217  while (wavefront.size() != 0) {
218  RouteTreeNode* node = wavefront.back();
219  wavefront.pop_back();
220  vec.push_back(node);
221  for (unsigned int i = 0; i < node->getNumChildren(); i++) {
222  wavefront.push_back(node->getChild(i));
223  }
224  }
225  std::map<architecture::Tilewire, int>::iterator it;
226  for (unsigned int i = 0 ; i < vec.size(); i++) {
227  it = sinkCounts.find(vec[i]->getSinkTilewire());
228  if (it != sinkCounts.end()) {
229  it->second++;
230  }
231  }
232  BOOST_TEST_MESSAGE(*ddbPtr);
233  for (it = sinkCounts.begin(); it != sinkCounts.end(); it++) {
234  BOOST_TEST_MESSAGE("Checking sink " << it->first);
235  BOOST_CHECK(it->second == 1);
236  }
237 }
238 
239 /// \brief Unit test for the traceBranch function in the Tracer.
240 BOOST_AUTO_TEST_CASE(router_tracer_tracebranch) {
241  Tracer tracer(*ddbPtr);
242  architecture::Tilewire branchSource = ddbPtr->lookupTilewire("INT_X14Y37", "SL2END0");
243  RouteTreeNode* rtn;
244  rtn = tracer.traceBranch(branchSource);
245  rtn->normalizeDepth();
246  std::vector<RouteTreeNode*> vec;
247  std::vector<RouteTreeNode*> wavefront;
248  vec.push_back(rtn);
249  wavefront.push_back(rtn);
250  while (wavefront.size() != 0) {
251  RouteTreeNode* node = wavefront.back();
252  wavefront.pop_back();
253  vec.push_back(node);
254  for (unsigned int i = 0; i < node->getNumChildren(); i++) {
255  wavefront.push_back(node->getChild(i));
256  }
257  }
258  std::map<architecture::Tilewire, int>::iterator it;
259  for (unsigned int i = 0 ; i < vec.size(); i++) {
260 std::cout << "NODE: " << vec[i]->getArc() << std::endl;
261  it = sinkCounts.find(vec[i]->getSinkTilewire());
262  if (it != sinkCounts.end()) {
263  it->second++;
264  }
265  }
266  BOOST_TEST_MESSAGE(*ddbPtr);
267  for (it = sinkCounts.begin(); it != sinkCounts.end(); it++) {
268  BOOST_TEST_MESSAGE("Checking sink " << it->first);
269  BOOST_CHECK_EQUAL(it->second, 1);
270  //std::cout << it->first << " " << it->second << std::endl;
271  }
272 }
273 
274 /// \brief Unit test for the traceSink function in the Tracer.
275 BOOST_AUTO_TEST_CASE(router_tracer_tracesink) {
276 }
277 
278 /// \brief Unit test for the traceFull function in the Tracer.
279 BOOST_AUTO_TEST_CASE(router_tracer_tracefull) {
280  Tracer tracer(*ddbPtr);
281  architecture::Tilewire branchSource = ddbPtr->lookupTilewire("INT_X14Y37", "SL2END0");
282 std::cout << *ddbPtr << "START: " << branchSource << std::endl;
283  RouteTreeNode* rtn;
284  rtn = tracer.traceFull(branchSource);
285  rtn->normalizeDepth();
286  rtn = (RouteTreeNode*)rtn->getTop();
287  std::vector<RouteTreeNode*> vec;
288  std::vector<RouteTreeNode*> wavefront;
289  wavefront.push_back(rtn);
290  while (wavefront.size() != 0) {
291  RouteTreeNode* node = wavefront.back();
292  wavefront.pop_back();
293  vec.push_back(node);
294  for (unsigned int i = 0; i < node->getNumChildren(); i++) {
295  wavefront.push_back(node->getChild(i));
296  }
297  }
298  std::map<architecture::Tilewire, int>::iterator it;
299  for (unsigned int i = 0 ; i < vec.size(); i++) {
300 std::cout << "NODE: " << vec[i]->getArc() << std::endl;
301  it = sinkCounts.find(vec[i]->getSinkTilewire());
302  if (it != sinkCounts.end()) {
303  it->second++;
304  }
305  }
306  BOOST_TEST_MESSAGE(*ddbPtr);
307  for (it = sinkCounts.begin(); it != sinkCounts.end(); it++) {
308  BOOST_TEST_MESSAGE("Checking sink " << it->first);
309  BOOST_CHECK_EQUAL(it->second, 1);
310  //std::cout << it->first << " " << it->second << std::endl;
311  }
312 }
313 */
314 BOOST_AUTO_TEST_SUITE_END()
315 
316 BOOST_AUTO_TEST_SUITE_END()
317 
318 } // namespace router
319 } // namespace torc
torc::router::TraceVirtex5TestFixture::designPtr
torc::physical::DesignSharedPtr designPtr
Definition: TraceRegressionTest.cpp:44
torc::router::Trace::getSources
TraceNodePtrVector & getSources()
Get trace source nodes.
Definition: Trace.hpp:113
torc::architecture::DDB
Device database, including complete wiring and logic support.
Definition: DDB.hpp:42
torc::router::TraceVirtex5TestFixture::sinkCounts
std::map< architecture::Tilewire, int > sinkCounts
Definition: TraceRegressionTest.cpp:46
torc::physical::XdlImporter::getDesignPtr
DesignSharedPtr getDesignPtr(void)
Returns a shared pointer for the design.
Definition: physical/XdlImporter.hpp:143
DirectoryTree.hpp
Header for the DirectoryTree class.
torc::router::TraceNodePtrVector
std::vector< TraceNode * > TraceNodePtrVector
Vector of TraceNode pointer.
Definition: TraceNode.hpp:192
torc::router::Trace::getBranchPoints
TraceNodePtrVector & getBranchPoints()
Get trace branch point nodes.
Definition: Trace.hpp:117
torc::architecture::XdlImporter::releaseDDBPtr
DDB * releaseDDBPtr(void)
Releases ownership of the device database. The caller is now responsible for deleting it...
Definition: architecture/XdlImporter.hpp:62
torc::architecture::ArcVector
std::vector< Arc > ArcVector
Vector of Arc objects.
Definition: Arc.hpp:78
torc::bitstream::string
std::string string
Definition: LibGenFactory.hpp:35
TestHelpers.hpp
Header for Boost.Test helper functions.
torc::router::Trace::getArcs
ArcVector & getArcs()
Get all Arcs found during the trace.
Definition: Trace.hpp:121
torc::architecture::XdlImporter
Architecture aware importer from XDL format into a physical design.
Definition: architecture/XdlImporter.hpp:33
torc::router::Trace
Provides path extraction from usage information in a DDB instance..
Definition: Trace.hpp:36
torc::architecture::Tilewire
Encapsulation of a device tile and wire pair.
Definition: Tilewire.hpp:39
torc::common::DirectoryTree
Encapsulation of filesystem paths that are used by the library.
Definition: DirectoryTree.hpp:28
OutputStreamHelpers.hpp
Header for torc::physical output stream helpers.
Trace.hpp
Header for the Trace class.
torc::router::TraceVirtexTristateTestFixture::sinkCounts
std::map< architecture::Tilewire, int > sinkCounts
Definition: TraceRegressionTest.cpp:116
torc::bitstream::path
boost::filesystem::path path
Definition: LibGenFactory.hpp:36
torc::router::TraceNode::sLiveNodes
static boost::int32_t sLiveNodes
Static allocation and deallocation count.
Definition: TraceNode.hpp:85
torc::physical::DesignSharedPtr
boost::shared_ptr< Design > DesignSharedPtr
Shared pointer encapsulation of a Design.
Definition: physical/Design.hpp:134
torc::router::TraceVirtex5TestFixture::directoryTree
torc::common::DirectoryTree directoryTree
Definition: TraceRegressionTest.cpp:39
DDB.hpp
Header for the DDB class.
torc::router::BOOST_AUTO_TEST_CASE
BOOST_AUTO_TEST_CASE(NetRouterHeuristicT)
Unit test for the Heuristic.
Definition: NetRouterHeuristicUnitTest.cpp:32
XdlImporter.hpp
Header for the XdlImporter class.
torc::router::Trace::getSinks
TraceNodePtrVector & getSinks()
Get trace sink nodes.
Definition: Trace.hpp:109