yosys-master
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#include <modtools.h>
Data Structures | |
struct | PortBit |
Public Member Functions | |
void | add_wire (RTLIL::Wire *wire) |
void | add_cell_port (RTLIL::Cell *cell, RTLIL::IdString port, std::vector< RTLIL::SigBit > bits, bool is_output, bool is_input) |
void | add_cell (RTLIL::Cell *cell) |
ModWalker () | |
ModWalker (RTLIL::Design *design, RTLIL::Module *module, CellTypes *filter_ct=NULL) | |
void | setup (RTLIL::Design *design, RTLIL::Module *module, CellTypes *filter_ct=NULL) |
template<typename T > | |
bool | get_drivers (std::set< PortBit > &result, RTLIL::SigBit bit) const |
template<typename T > | |
bool | get_consumers (std::set< PortBit > &result, RTLIL::SigBit bit) const |
template<typename T > | |
bool | get_inputs (std::set< RTLIL::SigBit > &result, RTLIL::SigBit bit) const |
template<typename T > | |
bool | get_outputs (std::set< RTLIL::SigBit > &result, RTLIL::SigBit bit) const |
template<typename T > | |
bool | get_drivers (std::set< PortBit > &result, const T &bits) const |
template<typename T > | |
bool | get_consumers (std::set< PortBit > &result, const T &bits) const |
template<typename T > | |
bool | get_inputs (std::set< RTLIL::SigBit > &result, const T &bits) const |
template<typename T > | |
bool | get_outputs (std::set< RTLIL::SigBit > &result, const T &bits) const |
bool | get_drivers (std::set< PortBit > &result, RTLIL::SigSpec signal) const |
bool | get_consumers (std::set< PortBit > &result, RTLIL::SigSpec signal) const |
bool | get_inputs (std::set< RTLIL::SigBit > &result, RTLIL::SigSpec signal) const |
bool | get_outputs (std::set< RTLIL::SigBit > &result, RTLIL::SigSpec signal) const |
template<typename T > | |
bool | has_drivers (const T &sig) const |
template<typename T > | |
bool | has_consumers (const T &sig) const |
template<typename T > | |
bool | has_inputs (const T &sig) const |
template<typename T > | |
bool | has_outputs (const T &sig) const |
bool | has_drivers (RTLIL::SigSpec sig) const |
bool | has_consumers (RTLIL::SigSpec sig) const |
bool | has_inputs (RTLIL::SigSpec sig) const |
bool | has_outputs (RTLIL::SigSpec sig) const |
Data Fields | |
RTLIL::Design * | design |
RTLIL::Module * | module |
CellTypes | ct |
SigMap | sigmap |
std::map< RTLIL::SigBit, std::set< PortBit > > | signal_drivers |
std::map< RTLIL::SigBit, std::set< PortBit > > | signal_consumers |
std::set< RTLIL::SigBit > | signal_inputs |
std::set< RTLIL::SigBit > | signal_outputs |
std::map< RTLIL::Cell *, std::set< RTLIL::SigBit > > | cell_outputs |
std::map< RTLIL::Cell *, std::set< RTLIL::SigBit > > | cell_inputs |
Definition at line 181 of file modtools.h.
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Definition at line 265 of file modtools.h.
std::map<RTLIL::Cell*, std::set<RTLIL::SigBit> > ModWalker::cell_inputs |
Definition at line 208 of file modtools.h.
std::map<RTLIL::Cell*, std::set<RTLIL::SigBit> > ModWalker::cell_outputs |
Definition at line 208 of file modtools.h.
CellTypes ModWalker::ct |
Definition at line 201 of file modtools.h.
RTLIL::Design* ModWalker::design |
Definition at line 198 of file modtools.h.
RTLIL::Module* ModWalker::module |
Definition at line 199 of file modtools.h.
SigMap ModWalker::sigmap |
Definition at line 202 of file modtools.h.
std::map<RTLIL::SigBit, std::set<PortBit> > ModWalker::signal_consumers |
Definition at line 205 of file modtools.h.
std::map<RTLIL::SigBit, std::set<PortBit> > ModWalker::signal_drivers |
Definition at line 204 of file modtools.h.
std::set<RTLIL::SigBit> ModWalker::signal_inputs |
Definition at line 206 of file modtools.h.
std::set<RTLIL::SigBit> ModWalker::signal_outputs |
Definition at line 206 of file modtools.h.