239 std::map<std::string, std::string> setCellAttr, setWireAttr;
240 bool allCellTypes =
false;
241 bool selectMode =
false;
244 log_header(
"Executing SCC pass (detecting logic loops).\n");
247 for (argidx = 1; argidx <
args.size(); argidx++) {
248 if (
args[argidx] ==
"-max_depth" && argidx+1 <
args.size()) {
249 maxDepth = atoi(
args[++argidx].c_str());
252 if (
args[argidx] ==
"-all_cell_types") {
256 if (
args[argidx] ==
"-set_attr" && argidx+2 <
args.size()) {
257 setCellAttr[
args[argidx+1]] = args[argidx+2];
258 setWireAttr[args[argidx+1]] = args[argidx+2];
262 if (
args[argidx] ==
"-set_cell_attr" && argidx+2 <
args.size()) {
263 setCellAttr[
args[argidx+1]] = args[argidx+2];
267 if (
args[argidx] ==
"-set_wire_attr" && argidx+2 <
args.size()) {
268 setWireAttr[
args[argidx+1]] = args[argidx+2];
272 if (
args[argidx] ==
"-select") {
281 if (setCellAttr.size() > 0 || setWireAttr.size() > 0)
282 log_cmd_error(
"The -set*_attr options are not implemented at the moment!\n");
286 for (
auto &mod_it : design->
modules_)
287 if (design->
selected(mod_it.second))
289 SccWorker worker(design, mod_it.second, allCellTypes, maxDepth);
292 worker.select(newSelection);
bool selected(T1 *module) const
std::vector< RTLIL::Selection > selection_stack
void log_header(const char *format,...)
#define log_assert(_assert_expr_)
void log_cmd_error(const char *format,...)
std::map< RTLIL::IdString, RTLIL::Module * > modules_
void extra_args(std::vector< std::string > args, size_t argidx, RTLIL::Design *design, bool select=true)