Inheritance diagram for SubCircuitSolver:

Collaboration diagram for SubCircuitSolver:

Public Member Functions
	SubCircuitSolver ()

bool	compareAttributes (const std::set< RTLIL::IdString > &attr, const std::map< RTLIL::IdString, RTLIL::Const > &needleAttr, const std::map< RTLIL::IdString, RTLIL::Const > &haystackAttr)

RTLIL::Const	unified_param (RTLIL::IdString cell_type, RTLIL::IdString param, RTLIL::Const value)

virtual bool	userCompareNodes (const std::string &, const std::string &, void needleUserData, const std::string &, const std::string &, void haystackUserData, const std::map< std::string, std::string > &portMapping)

void	setVerbose ()

void	addGraph (std::string graphId, const Graph &graph)

void	addCompatibleTypes (std::string needleTypeId, std::string haystackTypeId)

void	addCompatibleConstants (int needleConstant, int haystackConstant)

void	addSwappablePorts (std::string needleTypeId, std::string portId1, std::string portId2, std::string portId3=std::string(), std::string portId4=std::string())

void	addSwappablePorts (std::string needleTypeId, std::set< std::string > ports)

void	addSwappablePortsPermutation (std::string needleTypeId, std::map< std::string, std::string > portMapping)

void	solve (std::vector< Result > &results, std::string needleGraphId, std::string haystackGraphId, bool allowOverlap=true, int maxSolutions=-1)

void	solve (std::vector< Result > &results, std::string needleGraphId, std::string haystackGraphId, const std::map< std::string, std::set< std::string >> &initialMapping, bool allowOverlap=true, int maxSolutions=-1)

void	mine (std::vector< MineResult > &results, int minNodes, int maxNodes, int minMatches, int limitMatchesPerGraph=-1)

void	clearOverlapHistory ()

void	clearConfig ()

Data Fields
bool	ignore_parameters

std::set< std::pair < RTLIL::IdString, RTLIL::IdString > >	ignored_parameters

std::set< RTLIL::IdString >	cell_attr

std::set< RTLIL::IdString >	wire_attr

Protected Member Functions
virtual std::string	userAnnotateEdge (const std::string &graphId, const std::string &fromNodeId, void fromUserData, const std::string &toNodeId, void toUserData)

virtual bool	userCompareEdge (const std::string &needleGraphId, const std::string &needleFromNodeId, void needleFromUserData, const std::string &needleToNodeId, void needleToUserData, const std::string &haystackGraphId, const std::string &haystackFromNodeId, void haystackFromUserData, const std::string &haystackToNodeId, void haystackToUserData)

virtual bool	userCheckSolution (const Result &result)

Detailed Description

Definition at line 34 of file extract.cc.

Constructor & Destructor Documentation

SubCircuitSolver::SubCircuitSolver ( )

inline

Definition at line 41 of file extract.cc.

                        : ignore_parameters(false)
     {
     }

Member Function Documentation

void SubCircuit::Solver::addCompatibleConstants	(	int	needleConstant,
		int	haystackConstant
	)

inherited

Definition at line 1642 of file subcircuit.cc.

 {
     worker->addCompatibleConstants(needleConstant, haystackConstant);
 }

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void SubCircuit::Solver::addCompatibleTypes	(	std::string	needleTypeId,
		std::string	haystackTypeId
	)

inherited

Definition at line 1637 of file subcircuit.cc.

 {
     worker->addCompatibleTypes(needleTypeId, haystackTypeId);
 }

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void SubCircuit::Solver::addGraph	(	std::string	graphId,
		const Graph &	graph
	)

inherited

Definition at line 1632 of file subcircuit.cc.

 {
     worker->addGraph(graphId, graph);
 }

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void SubCircuit::Solver::addSwappablePorts	(	std::string	needleTypeId,
		std::string	portId1,
		std::string	portId2,
		std::string	portId3 = `std::string()`,
		std::string	portId4 = `std::string()`
	)

inherited

Definition at line 1647 of file subcircuit.cc.

 {
     std::set<std::string> ports;
     ports.insert(portId1);
     ports.insert(portId2);
     ports.insert(portId3);
     ports.insert(portId4);
     ports.erase(std::string());
     addSwappablePorts(needleTypeId, ports);
 }

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void SubCircuit::Solver::addSwappablePorts	(	std::string	needleTypeId,
		std::set< std::string >	ports
	)

inherited

Definition at line 1658 of file subcircuit.cc.

 {
     worker->addSwappablePorts(needleTypeId, ports);
 }

void SubCircuit::Solver::addSwappablePortsPermutation	(	std::string	needleTypeId,
		std::map< std::string, std::string >	portMapping
	)

inherited

Definition at line 1663 of file subcircuit.cc.

 {
     worker->addSwappablePortsPermutation(needleTypeId, portMapping);
 }

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void SubCircuit::Solver::clearConfig ( )

inherited

Definition at line 1690 of file subcircuit.cc.

 {
     worker->clearConfig();
 }

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void SubCircuit::Solver::clearOverlapHistory ( )

inherited

Definition at line 1685 of file subcircuit.cc.

 {
     worker->clearOverlapHistory();
 }

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bool SubCircuitSolver::compareAttributes	(	const std::set< RTLIL::IdString > &	attr,
		const std::map< RTLIL::IdString, RTLIL::Const > &	needleAttr,
		const std::map< RTLIL::IdString, RTLIL::Const > &	haystackAttr
	)

inline

Definition at line 45 of file extract.cc.

     {
         for (auto &it : attr) {
             size_t nc = needleAttr.count(it), hc = haystackAttr.count(it);
             if (nc != hc || (nc > 0 && needleAttr.at(it) != haystackAttr.at(it)))
                 return false;
         }
         return true;
     }

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void SubCircuit::Solver::mine	(	std::vector< MineResult > &	results,
		int	minNodes,
		int	maxNodes,
		int	minMatches,
		int	limitMatchesPerGraph = `-1`
	)

inherited

Definition at line 1680 of file subcircuit.cc.

 {
     worker->mine(results, minNodes, maxNodes, minMatches, limitMatchesPerGraph);
 }

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void SubCircuit::Solver::setVerbose ( )

inherited

Definition at line 1627 of file subcircuit.cc.

 {
     worker->setVerbose();
 }

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void SubCircuit::Solver::solve	(	std::vector< Result > &	results,
		std::string	needleGraphId,
		std::string	haystackGraphId,
		bool	allowOverlap = `true`,
		int	maxSolutions = `-1`
	)

inherited

Definition at line 1668 of file subcircuit.cc.

 {
     std::map<std::string, std::set<std::string>> emptyInitialMapping;
     worker->solve(results, needleGraphId, haystackGraphId, emptyInitialMapping, allowOverlap, maxSolutions);
 }

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void SubCircuit::Solver::solve	(	std::vector< Result > &	results,
		std::string	needleGraphId,
		std::string	haystackGraphId,
		const std::map< std::string, std::set< std::string >> &	initialMapping,
		bool	allowOverlap = `true`,
		int	maxSolutions = `-1`
	)

inherited

Definition at line 1674 of file subcircuit.cc.

 {
     worker->solve(results, needleGraphId, haystackGraphId, initialMappings, allowOverlap, maxSolutions);
 }

RTLIL::Const SubCircuitSolver::unified_param	(	RTLIL::IdString	cell_type,
		RTLIL::IdString	param,
		RTLIL::Const	value
	)

inline

Definition at line 55 of file extract.cc.

     {
         if (cell_type.substr(0, 1) != "$" || cell_type.substr(0, 2) == "$_")
             return value;
 
     #define param_bool(_n) if (param == _n) return value.as_bool();
         param_bool("\\ARST_POLARITY");
         param_bool("\\A_SIGNED");
         param_bool("\\B_SIGNED");
         param_bool("\\CLK_ENABLE");
         param_bool("\\CLK_POLARITY");
         param_bool("\\CLR_POLARITY");
         param_bool("\\EN_POLARITY");
         param_bool("\\SET_POLARITY");
         param_bool("\\TRANSPARENT");
     #undef param_bool
 
     #define param_int(_n) if (param == _n) return value.as_int();
         param_int("\\ABITS")
         param_int("\\A_WIDTH")
         param_int("\\B_WIDTH")
         param_int("\\CTRL_IN_WIDTH")
         param_int("\\CTRL_OUT_WIDTH")
         param_int("\\OFFSET")
         param_int("\\PRIORITY")
         param_int("\\RD_PORTS")
         param_int("\\SIZE")
         param_int("\\STATE_BITS")
         param_int("\\STATE_NUM")
         param_int("\\STATE_NUM_LOG2")
         param_int("\\STATE_RST")
         param_int("\\S_WIDTH")
         param_int("\\TRANS_NUM")
         param_int("\\WIDTH")
         param_int("\\WR_PORTS")
         param_int("\\Y_WIDTH")
     #undef param_int
 
         return value;
     }

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std::string Solver::userAnnotateEdge	(	const std::string &	graphId,
		const std::string &	fromNodeId,
		void *	fromUserData,
		const std::string &	toNodeId,
		void *	toUserData
	)

protectedvirtualinherited

Definition at line 1602 of file subcircuit.cc.

 {
     return std::string();
 }

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bool Solver::userCheckSolution ( const Result & result )

protectedvirtualinherited

Definition at line 1612 of file subcircuit.cc.

 {
     return true;
 }

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bool Solver::userCompareEdge	(	const std::string &	needleGraphId,
		const std::string &	needleFromNodeId,
		void *	needleFromUserData,
		const std::string &	needleToNodeId,
		void *	needleToUserData,
		const std::string &	haystackGraphId,
		const std::string &	haystackFromNodeId,
		void *	haystackFromUserData,
		const std::string &	haystackToNodeId,
		void *	haystackToUserData
	)

protectedvirtualinherited

Definition at line 1607 of file subcircuit.cc.

 {
     return true;
 }

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virtual bool SubCircuitSolver::userCompareNodes	(	const std::string &	,
		const std::string &	,
		void *	needleUserData,
		const std::string &	,
		const std::string &	,
		void *	haystackUserData,
		const std::map< std::string, std::string > &	portMapping
	)

inlinevirtual

Reimplemented from SubCircuit::Solver.

Definition at line 96 of file extract.cc.

     {
         RTLIL::Cell *needleCell = (RTLIL::Cell*) needleUserData;
         RTLIL::Cell *haystackCell = (RTLIL::Cell*) haystackUserData;
 
         if (!needleCell || !haystackCell) {
             log_assert(!needleCell && !haystackCell);
             return true;
         }
 
         if (!ignore_parameters) {
             std::map<RTLIL::IdString, RTLIL::Const> needle_param, haystack_param;
             for (auto &it : needleCell->parameters)
                 if (!ignored_parameters.count(std::pair<RTLIL::IdString, RTLIL::IdString>(needleCell->type, it.first)))
                     needle_param[it.first] = unified_param(needleCell->type, it.first, it.second);
             for (auto &it : haystackCell->parameters)
                 if (!ignored_parameters.count(std::pair<RTLIL::IdString, RTLIL::IdString>(haystackCell->type, it.first)))
                     haystack_param[it.first] = unified_param(haystackCell->type, it.first, it.second);
             if (needle_param != haystack_param)
                 return false;
         }
 
         if (cell_attr.size() > 0 && !compareAttributes(cell_attr, needleCell->attributes, haystackCell->attributes))
             return false;
 
         if (wire_attr.size() > 0)
         {
             RTLIL::Wire *lastNeedleWire = NULL;
             RTLIL::Wire *lastHaystackWire = NULL;
             std::map<RTLIL::IdString, RTLIL::Const> emptyAttr;
 
             for (auto &conn : needleCell->connections())
             {
                 RTLIL::SigSpec needleSig = conn.second;
                 RTLIL::SigSpec haystackSig = haystackCell->getPort(portMapping.at(conn.first.str()));
 
                 for (int i = 0; i < std::min(needleSig.size(), haystackSig.size()); i++) {
                     RTLIL::Wire *needleWire = needleSig[i].wire, *haystackWire = haystackSig[i].wire;
                     if (needleWire != lastNeedleWire || haystackWire != lastHaystackWire)
                         if (!compareAttributes(wire_attr, needleWire ? needleWire->attributes : emptyAttr, haystackWire ? haystackWire->attributes : emptyAttr))
                             return false;
                     lastNeedleWire = needleWire, lastHaystackWire = haystackWire;
                 }
             }
         }
 
         return true;
     }

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Field Documentation

std::set<RTLIL::IdString> SubCircuitSolver::cell_attr

Definition at line 39 of file extract.cc.

bool SubCircuitSolver::ignore_parameters

Definition at line 37 of file extract.cc.

std::set<std::pair<RTLIL::IdString, RTLIL::IdString> > SubCircuitSolver::ignored_parameters

Definition at line 38 of file extract.cc.

std::set<RTLIL::IdString> SubCircuitSolver::wire_attr

Definition at line 39 of file extract.cc.

The documentation for this class was generated from the following file:

extract.cc

Public Member Functions

Data Fields

Protected Member Functions

Detailed Description

Constructor & Destructor Documentation

Member Function Documentation

Field Documentation