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Data Structures | Public Member Functions | Data Fields
ConnwrappersWorker Struct Reference

Data Structures

struct  portdecl_t
 

Public Member Functions

void add_port (std::string celltype, std::string portname, std::string widthparam, std::string signparam)
 
void add_port (std::string celltype, std::string portname, std::string widthparam, bool is_signed)
 
void work (RTLIL::Design *design, RTLIL::Module *module)
 

Data Fields

std::set< RTLIL::IdString > decl_celltypes
 
std::map< std::pair
< RTLIL::IdString,
RTLIL::IdString >, portdecl_t > 		decls
 

Detailed Description

Definition at line 28 of file connwrappers.cc.

Member Function Documentation

void ConnwrappersWorker::add_port ( std::string  celltype,
std::string  portname,
std::string  widthparam,
std::string  signparam 
)
inline

Definition at line 39 of file connwrappers.cc.

40  {
41  std::pair<std::string, std::string> key(RTLIL::escape_id(celltype), RTLIL::escape_id(portname));
42  decl_celltypes.insert(key.first);
43 
44  if (decls.count(key))
45  log_cmd_error("Duplicate port decl: %s %s\n", celltype.c_str(), portname.c_str());
46 
47  portdecl_t decl;
48  decl.widthparam = RTLIL::escape_id(widthparam);
49  decl.signparam = RTLIL::escape_id(signparam);
50  decl.is_signed = false;
51  decls[key] = decl;
52  }
ConnwrappersWorker::decl_celltypes
std::set< RTLIL::IdString > decl_celltypes
Definition: connwrappers.cc:36
RTLIL::escape_id
static std::string escape_id(std::string str)
Definition: rtlil.h:251
ConnwrappersWorker::decls
std::map< std::pair< RTLIL::IdString, RTLIL::IdString >, portdecl_t > decls
Definition: connwrappers.cc:37
log_cmd_error
void log_cmd_error(const char *format,...)
Definition: log.cc:211

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void ConnwrappersWorker::add_port ( std::string  celltype,
std::string  portname,
std::string  widthparam,
bool  is_signed 
)
inline

Definition at line 54 of file connwrappers.cc.

55  {
56  std::pair<std::string, std::string> key(RTLIL::escape_id(celltype), RTLIL::escape_id(portname));
57  decl_celltypes.insert(key.first);
58 
59  if (decls.count(key))
60  log_cmd_error("Duplicate port decl: %s %s\n", celltype.c_str(), portname.c_str());
61 
62  portdecl_t decl;
63  decl.widthparam = RTLIL::escape_id(widthparam);
64  decl.is_signed = is_signed;
65  decls[key] = decl;
66  }
ConnwrappersWorker::decl_celltypes
std::set< RTLIL::IdString > decl_celltypes
Definition: connwrappers.cc:36
RTLIL::escape_id
static std::string escape_id(std::string str)
Definition: rtlil.h:251
ConnwrappersWorker::decls
std::map< std::pair< RTLIL::IdString, RTLIL::IdString >, portdecl_t > decls
Definition: connwrappers.cc:37
log_cmd_error
void log_cmd_error(const char *format,...)
Definition: log.cc:211

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void ConnwrappersWorker::work ( RTLIL::Design *  design,
RTLIL::Module *  module 
)
inline

Definition at line 68 of file connwrappers.cc.

69  {
70  std::map<RTLIL::SigBit, std::pair<bool, RTLIL::SigSpec>> extend_map;
71  SigMap sigmap(module);
72 
73  for (auto &it : module->cells_)
74  {
75  RTLIL::Cell *cell = it.second;
76 
77  if (!decl_celltypes.count(cell->type))
78  continue;
79 
80  for (auto &conn : cell->connections())
81  {
82  std::pair<RTLIL::IdString, RTLIL::IdString> key(cell->type, conn.first);
83 
84  if (!decls.count(key))
85  continue;
86 
87  portdecl_t &decl = decls.at(key);
88 
89  if (!cell->parameters.count(decl.widthparam))
90  continue;
91 
92  if (!decl.signparam.empty() && !cell->parameters.count(decl.signparam))
93  continue;
94 
95  int inner_width = cell->parameters.at(decl.widthparam).as_int();
96  int outer_width = conn.second.size();
97  bool is_signed = decl.signparam.empty() ? decl.is_signed : cell->parameters.at(decl.signparam).as_bool();
98 
99  if (inner_width >= outer_width)
100  continue;
101 
102  RTLIL::SigSpec sig = sigmap(conn.second);
103  extend_map[sig.extract(inner_width - 1, 1)] = std::pair<bool, RTLIL::SigSpec>(is_signed,
104  sig.extract(inner_width, outer_width - inner_width));
105  }
106  }
107 
108  for (auto &it : module->cells_)
109  {
110  RTLIL::Cell *cell = it.second;
111 
112  if (!design->selected(module, cell))
113  continue;
114 
115  for (auto &conn : cell->connections_)
116  {
117  std::vector<RTLIL::SigBit> sigbits = sigmap(conn.second).to_sigbit_vector();
118  RTLIL::SigSpec old_sig;
119 
120  for (size_t i = 0; i < sigbits.size(); i++)
121  {
122  if (!extend_map.count(sigbits[i]))
123  continue;
124 
125  bool is_signed = extend_map.at(sigbits[i]).first;
126  RTLIL::SigSpec extend_sig = extend_map.at(sigbits[i]).second;
127 
128  int extend_width = 0;
129  RTLIL::SigBit extend_bit = is_signed ? sigbits[i] : RTLIL::SigBit(RTLIL::State::S0);
130  while (extend_width < extend_sig.size() && i + extend_width + 1 < sigbits.size() &&
131  sigbits[i + extend_width + 1] == extend_bit) extend_width++;
132 
133  if (extend_width == 0)
134  continue;
135 
136  if (old_sig.size() == 0)
137  old_sig = conn.second;
138 
139  conn.second.replace(i+1, extend_sig.extract(0, extend_width));
140  i += extend_width;
141  }
142 
143  if (old_sig.size())
144  log("Connected extended bits of %s.%s:%s: %s -> %s\n", RTLIL::id2cstr(module->name), RTLIL::id2cstr(cell->name),
145  RTLIL::id2cstr(conn.first), log_signal(old_sig), log_signal(conn.second));
146  }
147  }
148  }
RTLIL::Design::selected
bool selected(T1 *module) const
Definition: rtlil.h:551
ConnwrappersWorker::decl_celltypes
std::set< RTLIL::IdString > decl_celltypes
Definition: connwrappers.cc:36
log_signal
const char * log_signal(const RTLIL::SigSpec &sig, bool autoint)
Definition: log.cc:269
RTLIL::Cell::name
RTLIL::IdString name
Definition: rtlil.h:853
RTLIL::Cell::type
RTLIL::IdString type
Definition: rtlil.h:854
RTLIL::Cell::parameters
std::map< RTLIL::IdString, RTLIL::Const > parameters
Definition: rtlil.h:856
RTLIL::SigSpec::size
int size() const
Definition: rtlil.h:1019
RTLIL::Module::name
RTLIL::IdString name
Definition: rtlil.h:599
ConnwrappersWorker::decls
std::map< std::pair< RTLIL::IdString, RTLIL::IdString >, portdecl_t > decls
Definition: connwrappers.cc:37
RTLIL::id2cstr
static const char * id2cstr(const RTLIL::IdString &str)
Definition: rtlil.h:267
RTLIL::SigSpec::replace
void replace(const RTLIL::SigSpec &pattern, const RTLIL::SigSpec &with)
Definition: rtlil.cc:2297
RTLIL::Module::cells_
std::map< RTLIL::IdString, RTLIL::Cell * > cells_
Definition: rtlil.h:596
log
void log(const char *format,...)
Definition: log.cc:180
RTLIL::SigSpec::extract
RTLIL::SigSpec extract(const RTLIL::SigSpec &pattern, const RTLIL::SigSpec *other=NULL) const
Definition: rtlil.cc:2414
RTLIL::Cell::connections_
std::map< RTLIL::IdString, RTLIL::SigSpec > connections_
Definition: rtlil.h:855
RTLIL::Cell::connections
const std::map< RTLIL::IdString, RTLIL::SigSpec > & connections() const
Definition: rtlil.cc:1814

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Field Documentation

std::set<RTLIL::IdString> ConnwrappersWorker::decl_celltypes

Definition at line 36 of file connwrappers.cc.

std::map<std::pair<RTLIL::IdString, RTLIL::IdString>, portdecl_t> ConnwrappersWorker::decls

Definition at line 37 of file connwrappers.cc.

The documentation for this struct was generated from the following file: