Data Structure Index

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P	s_clb_to_clb_directs	s_mode	s_pl_blocks_to_be_moved	s_rt_node
	s_clock	s_mode_power	s_pl_macro	s_sdc_clock
PowerCallibInputs	s_clock_arch	s_model	s_pl_macro_member	s_sdc_exclusive_group
PowerCallibSize	s_clock_network	s_model_chain_pattern	s_pl_moved_block	s_seg_details
PowerSpicedComponent	s_cluster_placement_primitive	s_model_ports	s_place_region	s_segment_inf
c	s_cluster_placement_stats	s_model_stats	s_placer_opts	s_slack
	s_det_routing_arch	s_molecule_link	s_port	s_solution_inf
cap	s_direct_inf	s_mux	s_port_power	s_switch_inf
e	s_file_name_opts	s_mux_arch	s_power_arch	s_tedge
	s_fmap_cell	s_mux_node	s_power_breakdown	s_timing_constraints
ezxml	s_grid_loc_def	s_mux_size_distribution	s_power_buffer_sc_levr_inf	s_timing_inf
ezxml_root	s_grid_tile	s_net	s_power_buffer_size_inf	s_timing_stats
f	s_hash	s_net_power	s_power_buffer_strength_inf	s_tnode
	s_hash_iterator	s_options	s_power_commonly_used	s_token
found_connectivity	s_heap	s_override_constraint	s_power_mux_info	s_TokenPair
found_pins	s_interconnect	s_pack_molecule	s_power_mux_volt_inf	s_trace
r	s_interconnect_pins	s_pack_pattern_block	s_power_mux_volt_pair	s_transistor_inf
	s_interconnect_power	s_pack_pattern_connections	s_power_nmos_leakage_inf	s_transistor_size_inf
relapos_rec_s	s_io	s_pack_patterns	s_power_nmos_leakage_pair	s_type_descriptor
s	s_ivec	s_packer_opts	s_power_nmos_mux_inf	s_vpr_setup
	s_legal_pos	s_pb	s_power_opts	slre
s_annealing_sched	s_linked_edge	s_pb_graph_edge	s_power_output	t
s_arch	s_linked_f_pointer	s_pb_graph_node	s_power_tech
s_bb	s_linked_int	s_pb_graph_node_power	s_power_usage	t_button
s_block	s_linked_rc_edge	s_pb_graph_pin	s_prepacked_tnode_data	t_gl_state
s_chan	s_linked_rc_ptr	s_pb_graph_pin_power	s_rc_node	t_point
s_chan_width_dist	s_linked_rt_edge	s_pb_stats	s_router_opts	t_report
s_chunk	s_linked_vptr	s_pb_type	s_rr_indexed_data	t_rr_node_route_inf
s_class	s_log	s_pb_type_power	s_rr_node
s_clb_grid	s_logical_block	s_pin_to_pin_annotation	s_rr_node_power

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