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DesignPass Struct Reference
+ Inheritance diagram for DesignPass:
+ Collaboration diagram for DesignPass:

Public Member Functions

 DesignPass ()
 
virtual ~DesignPass ()
 
virtual void help ()
 
virtual void execute (std::vector< std::string > args, RTLIL::Design *design)
 
pre_post_exec_state_t pre_execute ()
 
void post_execute (pre_post_exec_state_t state)
 
void cmd_log_args (const std::vector< std::string > &args)
 
void cmd_error (const std::vector< std::string > &args, size_t argidx, std::string msg)
 
void extra_args (std::vector< std::string > args, size_t argidx, RTLIL::Design *design, bool select=true)
 
virtual void run_register ()
 

Static Public Member Functions

static void call (RTLIL::Design *design, std::string command)
 
static void call (RTLIL::Design *design, std::vector< std::string > args)
 
static void call_on_selection (RTLIL::Design *design, const RTLIL::Selection &selection, std::string command)
 
static void call_on_selection (RTLIL::Design *design, const RTLIL::Selection &selection, std::vector< std::string > args)
 
static void call_on_module (RTLIL::Design *design, RTLIL::Module *module, std::string command)
 
static void call_on_module (RTLIL::Design *design, RTLIL::Module *module, std::vector< std::string > args)
 
static void init_register ()
 
static void done_register ()
 

Data Fields

std::string pass_name
 
std::string short_help
 
int call_counter
 
int64_t runtime_ns
 
Passnext_queued_pass
 

Detailed Description

Definition at line 30 of file design.cc.

Constructor & Destructor Documentation

DesignPass::DesignPass ( )
inline

Definition at line 31 of file design.cc.

31 : Pass("design", "save, restore and reset current design") { }
Pass(std::string name, std::string short_help="** document me **")
Definition: register.cc:40
virtual DesignPass::~DesignPass ( )
inlinevirtual

Definition at line 32 of file design.cc.

32  {
33  for (auto &it : saved_designs)
34  delete it.second;
35  saved_designs.clear();
36  for (auto &it : pushed_designs)
37  delete it;
38  pushed_designs.clear();
39  }
std::vector< RTLIL::Design * > pushed_designs
Definition: design.cc:28
YOSYS_NAMESPACE_BEGIN std::map< std::string, RTLIL::Design * > saved_designs
Definition: design.cc:27

Member Function Documentation

void Pass::call ( RTLIL::Design design,
std::string  command 
)
staticinherited

Definition at line 146 of file register.cc.

147 {
148  std::vector<std::string> args;
149 
150  std::string cmd_buf = command;
151  std::string tok = next_token(cmd_buf, " \t\r\n");
152 
153  if (tok.empty() || tok[0] == '#')
154  return;
155 
156  if (tok[0] == '!') {
157  cmd_buf = command.substr(command.find('!') + 1);
158  while (!cmd_buf.empty() && (cmd_buf.back() == ' ' || cmd_buf.back() == '\t' ||
159  cmd_buf.back() == '\r' || cmd_buf.back() == '\n'))
160  cmd_buf.resize(cmd_buf.size()-1);
161  log_header("Shell command: %s\n", cmd_buf.c_str());
162  int retCode = run_command(cmd_buf);
163  if (retCode != 0)
164  log_cmd_error("Shell command returned error code %d.\n", retCode);
165  return;
166  }
167 
168  while (!tok.empty()) {
169  if (tok == "#")
170  break;
171  if (tok.back() == ';') {
172  int num_semikolon = 0;
173  while (!tok.empty() && tok.back() == ';')
174  tok.resize(tok.size()-1), num_semikolon++;
175  if (!tok.empty())
176  args.push_back(tok);
177  call(design, args);
178  args.clear();
179  if (num_semikolon == 2)
180  call(design, "clean");
181  if (num_semikolon == 3)
182  call(design, "clean -purge");
183  } else
184  args.push_back(tok);
185  tok = next_token(cmd_buf, " \t\r\n");
186  }
187 
188  call(design, args);
189 }
static std::string next_token(bool pass_newline=false)
Definition: preproc.cc:96
void log_header(const char *format,...)
Definition: log.cc:188
int run_command(const std::string &command, std::function< void(const std::string &)> process_line)
Definition: yosys.cc:195
void log_cmd_error(const char *format,...)
Definition: log.cc:211
static void call(RTLIL::Design *design, std::string command)
Definition: register.cc:146

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void Pass::call ( RTLIL::Design design,
std::vector< std::string >  args 
)
staticinherited

Definition at line 191 of file register.cc.

192 {
193  if (args.size() == 0 || args[0][0] == '#')
194  return;
195 
196  if (echo_mode) {
197  log("%s", create_prompt(design, 0));
198  for (size_t i = 0; i < args.size(); i++)
199  log("%s%s", i ? " " : "", args[i].c_str());
200  log("\n");
201  }
202 
203  if (pass_register.count(args[0]) == 0)
204  log_cmd_error("No such command: %s (type 'help' for a command overview)\n", args[0].c_str());
205 
206  size_t orig_sel_stack_pos = design->selection_stack.size();
207  auto state = pass_register[args[0]]->pre_execute();
208  pass_register[args[0]]->execute(args, design);
209  pass_register[args[0]]->post_execute(state);
210  while (design->selection_stack.size() > orig_sel_stack_pos)
211  design->selection_stack.pop_back();
212 
213  design->check();
214 }
bool echo_mode
Definition: register.cc:30
std::vector< RTLIL::Selection > selection_stack
Definition: rtlil.h:509
const char * create_prompt(RTLIL::Design *design, int recursion_counter)
Definition: yosys.cc:400
void check()
Definition: rtlil.cc:357
void log_cmd_error(const char *format,...)
Definition: log.cc:211
void log(const char *format,...)
Definition: log.cc:180
std::map< std::string, Pass * > pass_register
Definition: register.cc:35

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void Pass::call_on_module ( RTLIL::Design design,
RTLIL::Module module,
std::string  command 
)
staticinherited

Definition at line 240 of file register.cc.

241 {
242  std::string backup_selected_active_module = design->selected_active_module;
243  design->selected_active_module = module->name.str();
244  design->selection_stack.push_back(RTLIL::Selection(false));
245  design->selection_stack.back().select(module);
246 
247  Pass::call(design, command);
248 
249  design->selection_stack.pop_back();
250  design->selected_active_module = backup_selected_active_module;
251 }
std::string str() const
Definition: rtlil.h:182
std::vector< RTLIL::Selection > selection_stack
Definition: rtlil.h:509
RTLIL::IdString name
Definition: rtlil.h:599
std::string selected_active_module
Definition: rtlil.h:511
static void call(RTLIL::Design *design, std::string command)
Definition: register.cc:146

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void Pass::call_on_module ( RTLIL::Design design,
RTLIL::Module module,
std::vector< std::string >  args 
)
staticinherited

Definition at line 253 of file register.cc.

254 {
255  std::string backup_selected_active_module = design->selected_active_module;
256  design->selected_active_module = module->name.str();
257  design->selection_stack.push_back(RTLIL::Selection(false));
258  design->selection_stack.back().select(module);
259 
260  Pass::call(design, args);
261 
262  design->selection_stack.pop_back();
263  design->selected_active_module = backup_selected_active_module;
264 }
std::string str() const
Definition: rtlil.h:182
std::vector< RTLIL::Selection > selection_stack
Definition: rtlil.h:509
RTLIL::IdString name
Definition: rtlil.h:599
std::string selected_active_module
Definition: rtlil.h:511
static void call(RTLIL::Design *design, std::string command)
Definition: register.cc:146

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void Pass::call_on_selection ( RTLIL::Design design,
const RTLIL::Selection selection,
std::string  command 
)
staticinherited

Definition at line 216 of file register.cc.

217 {
218  std::string backup_selected_active_module = design->selected_active_module;
219  design->selected_active_module.clear();
220  design->selection_stack.push_back(selection);
221 
222  Pass::call(design, command);
223 
224  design->selection_stack.pop_back();
225  design->selected_active_module = backup_selected_active_module;
226 }
std::vector< RTLIL::Selection > selection_stack
Definition: rtlil.h:509
std::string selected_active_module
Definition: rtlil.h:511
static void call(RTLIL::Design *design, std::string command)
Definition: register.cc:146

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void Pass::call_on_selection ( RTLIL::Design design,
const RTLIL::Selection selection,
std::vector< std::string >  args 
)
staticinherited

Definition at line 228 of file register.cc.

229 {
230  std::string backup_selected_active_module = design->selected_active_module;
231  design->selected_active_module.clear();
232  design->selection_stack.push_back(selection);
233 
234  Pass::call(design, args);
235 
236  design->selection_stack.pop_back();
237  design->selected_active_module = backup_selected_active_module;
238 }
std::vector< RTLIL::Selection > selection_stack
Definition: rtlil.h:509
std::string selected_active_module
Definition: rtlil.h:511
static void call(RTLIL::Design *design, std::string command)
Definition: register.cc:146

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void Pass::cmd_error ( const std::vector< std::string > &  args,
size_t  argidx,
std::string  msg 
)
inherited

Definition at line 110 of file register.cc.

111 {
112  std::string command_text;
113  int error_pos = 0;
114 
115  for (size_t i = 0; i < args.size(); i++) {
116  if (i < argidx)
117  error_pos += args[i].size() + 1;
118  command_text = command_text + (command_text.empty() ? "" : " ") + args[i];
119  }
120 
121  log("\nSyntax error in command `%s':\n", command_text.c_str());
122  help();
123 
124  log_cmd_error("Command syntax error: %s\n> %s\n> %*s^\n",
125  msg.c_str(), command_text.c_str(), error_pos, "");
126 }
virtual void help()
Definition: register.cc:93
void log_cmd_error(const char *format,...)
Definition: log.cc:211
void log(const char *format,...)
Definition: log.cc:180

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void Pass::cmd_log_args ( const std::vector< std::string > &  args)
inherited

Definition at line 100 of file register.cc.

101 {
102  if (args.size() <= 1)
103  return;
104  log("Full command line:");
105  for (size_t i = 0; i < args.size(); i++)
106  log(" %s", args[i].c_str());
107  log("\n");
108 }
void log(const char *format,...)
Definition: log.cc:180

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void Pass::done_register ( )
staticinherited

Definition at line 62 of file register.cc.

63 {
64  frontend_register.clear();
65  pass_register.clear();
66  backend_register.clear();
68 }
std::map< std::string, Frontend * > frontend_register
Definition: register.cc:34
Pass * first_queued_pass
Definition: register.cc:31
#define log_assert(_assert_expr_)
Definition: log.h:85
#define NULL
std::map< std::string, Pass * > pass_register
Definition: register.cc:35
std::map< std::string, Backend * > backend_register
Definition: register.cc:36

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virtual void DesignPass::execute ( std::vector< std::string >  args,
RTLIL::Design design 
)
inlinevirtual

Implements Pass.

Definition at line 86 of file design.cc.

87  {
88  bool got_mode = false;
89  bool reset_mode = false;
90  bool push_mode = false;
91  bool pop_mode = false;
92  RTLIL::Design *copy_from_design = NULL, *copy_to_design = NULL;
93  std::string save_name, load_name, as_name;
94  std::vector<RTLIL::Module*> copy_src_modules;
95 
96  size_t argidx;
97  for (argidx = 1; argidx < args.size(); argidx++)
98  {
99  std::string arg = args[argidx];
100  if (!got_mode && args[argidx] == "-reset") {
101  got_mode = true;
102  reset_mode = true;
103  continue;
104  }
105  if (!got_mode && args[argidx] == "-push") {
106  got_mode = true;
107  push_mode = true;
108  continue;
109  }
110  if (!got_mode && args[argidx] == "-pop") {
111  got_mode = true;
112  pop_mode = true;
113  continue;
114  }
115  if (!got_mode && args[argidx] == "-save" && argidx+1 < args.size()) {
116  got_mode = true;
117  save_name = args[++argidx];
118  continue;
119  }
120  if (!got_mode && args[argidx] == "-stash" && argidx+1 < args.size()) {
121  got_mode = true;
122  save_name = args[++argidx];
123  reset_mode = true;
124  continue;
125  }
126  if (!got_mode && args[argidx] == "-load" && argidx+1 < args.size()) {
127  got_mode = true;
128  load_name = args[++argidx];
129  if (saved_designs.count(load_name) == 0)
130  log_cmd_error("No saved design '%s' found!\n", load_name.c_str());
131  continue;
132  }
133  if (!got_mode && args[argidx] == "-copy-from" && argidx+1 < args.size()) {
134  got_mode = true;
135  if (saved_designs.count(args[++argidx]) == 0)
136  log_cmd_error("No saved design '%s' found!\n", args[argidx].c_str());
137  copy_from_design = saved_designs.at(args[argidx]);
138  copy_to_design = design;
139  continue;
140  }
141  if (!got_mode && args[argidx] == "-copy-to" && argidx+1 < args.size()) {
142  got_mode = true;
143  if (saved_designs.count(args[++argidx]) == 0)
144  saved_designs[args[argidx]] = new RTLIL::Design;
145  copy_to_design = saved_designs.at(args[argidx]);
146  copy_from_design = design;
147  continue;
148  }
149  if (copy_from_design != NULL && args[argidx] == "-as" && argidx+1 < args.size()) {
150  got_mode = true;
151  as_name = args[++argidx];
152  continue;
153  }
154  break;
155  }
156 
157  if (copy_from_design != NULL)
158  {
159  if (copy_from_design != design && argidx == args.size())
160  cmd_error(args, argidx, "Missing selection.");
161 
162  RTLIL::Selection sel = design->selection_stack.back();
163  if (argidx != args.size()) {
164  handle_extra_select_args(this, args, argidx, args.size(), copy_from_design);
165  sel = copy_from_design->selection_stack.back();
166  copy_from_design->selection_stack.pop_back();
167  argidx = args.size();
168  }
169 
170  for (auto &it : copy_from_design->modules_) {
171  if (sel.selected_whole_module(it.first)) {
172  copy_src_modules.push_back(it.second);
173  continue;
174  }
175  if (sel.selected_module(it.first))
176  log_cmd_error("Module %s is only partly selected.\n", RTLIL::id2cstr(it.first));
177  }
178  }
179 
180  extra_args(args, argidx, design, false);
181 
182  if (!got_mode)
183  cmd_error(args, argidx, "Missing mode argument.");
184 
185  if (pop_mode && pushed_designs.empty())
186  log_cmd_error("No pushed designs.\n");
187 
188  if (copy_to_design != NULL)
189  {
190  if (!as_name.empty() && copy_src_modules.size() > 1)
191  log_cmd_error("Only one module can be selected in combination with -as.\n");
192 
193  for (auto mod : copy_src_modules)
194  {
195  std::string trg_name = as_name.empty() ? mod->name.str() : RTLIL::escape_id(as_name);
196 
197  if (copy_to_design->modules_.count(trg_name))
198  delete copy_to_design->modules_.at(trg_name);
199  copy_to_design->modules_[trg_name] = mod->clone();
200  copy_to_design->modules_[trg_name]->name = trg_name;
201  copy_to_design->modules_[trg_name]->design = copy_to_design;
202  }
203  }
204 
205  if (!save_name.empty() || push_mode)
206  {
207  RTLIL::Design *design_copy = new RTLIL::Design;
208 
209  for (auto &it : design->modules_)
210  design_copy->add(it.second->clone());
211 
212  design_copy->selection_stack = design->selection_stack;
213  design_copy->selection_vars = design->selection_vars;
214  design_copy->selected_active_module = design->selected_active_module;
215 
216  if (saved_designs.count(save_name))
217  delete saved_designs.at(save_name);
218 
219  if (push_mode)
220  pushed_designs.push_back(design_copy);
221  else
222  saved_designs[save_name] = design_copy;
223  }
224 
225  if (reset_mode || !load_name.empty() || push_mode || pop_mode)
226  {
227  for (auto &it : design->modules_)
228  delete it.second;
229  design->modules_.clear();
230 
231  design->selection_stack.clear();
232  design->selection_vars.clear();
233  design->selected_active_module.clear();
234 
235  design->selection_stack.push_back(RTLIL::Selection());
236  }
237 
238  if (!load_name.empty() || pop_mode)
239  {
240  RTLIL::Design *saved_design = pop_mode ? pushed_designs.back() : saved_designs.at(load_name);
241 
242  if (pop_mode)
243  pushed_designs.pop_back();
244 
245  for (auto &it : saved_design->modules_)
246  design->add(it.second->clone());
247 
248  design->selection_stack = saved_design->selection_stack;
249  design->selection_vars = saved_design->selection_vars;
250  design->selected_active_module = saved_design->selected_active_module;
251  }
252  }
void cmd_error(const std::vector< std::string > &args, size_t argidx, std::string msg)
Definition: register.cc:110
std::vector< RTLIL::Selection > selection_stack
Definition: rtlil.h:509
void handle_extra_select_args(Pass *pass, std::vector< std::string > args, size_t argidx, size_t args_size, RTLIL::Design *design)
Definition: select.cc:803
void add(RTLIL::Module *module)
Definition: rtlil.cc:259
static std::string escape_id(std::string str)
Definition: rtlil.h:251
std::map< RTLIL::IdString, RTLIL::Selection > selection_vars
Definition: rtlil.h:510
std::vector< RTLIL::Design * > pushed_designs
Definition: design.cc:28
YOSYS_NAMESPACE_BEGIN std::map< std::string, RTLIL::Design * > saved_designs
Definition: design.cc:27
static const char * id2cstr(const RTLIL::IdString &str)
Definition: rtlil.h:267
void log_cmd_error(const char *format,...)
Definition: log.cc:211
std::map< RTLIL::IdString, RTLIL::Module * > modules_
Definition: rtlil.h:507
#define NULL
std::string selected_active_module
Definition: rtlil.h:511
void extra_args(std::vector< std::string > args, size_t argidx, RTLIL::Design *design, bool select=true)
Definition: register.cc:128

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void Pass::extra_args ( std::vector< std::string >  args,
size_t  argidx,
RTLIL::Design design,
bool  select = true 
)
inherited

Definition at line 128 of file register.cc.

129 {
130  for (; argidx < args.size(); argidx++)
131  {
132  std::string arg = args[argidx];
133 
134  if (arg.substr(0, 1) == "-")
135  cmd_error(args, argidx, "Unknown option or option in arguments.");
136 
137  if (!select)
138  cmd_error(args, argidx, "Extra argument.");
139 
140  handle_extra_select_args(this, args, argidx, args.size(), design);
141  break;
142  }
143  // cmd_log_args(args);
144 }
void cmd_error(const std::vector< std::string > &args, size_t argidx, std::string msg)
Definition: register.cc:110
void handle_extra_select_args(Pass *pass, std::vector< std::string > args, size_t argidx, size_t args_size, RTLIL::Design *design)
Definition: select.cc:803

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virtual void DesignPass::help ( )
inlinevirtual

Reimplemented from Pass.

Definition at line 40 of file design.cc.

41  {
42  // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
43  log("\n");
44  log(" design -reset\n");
45  log("\n");
46  log("Clear the current design.\n");
47  log("\n");
48  log("\n");
49  log(" design -save <name>\n");
50  log("\n");
51  log("Save the current design under the given name.\n");
52  log("\n");
53  log("\n");
54  log(" design -stash <name>\n");
55  log("\n");
56  log("Save the current design under the given name and then clear the current design.\n");
57  log("\n");
58  log("\n");
59  log(" design -push\n");
60  log("\n");
61  log("Push the current design to the stack and then clear the current design.\n");
62  log("\n");
63  log("\n");
64  log(" design -pop\n");
65  log("\n");
66  log("Reset the current design and pop the last design from the stack.\n");
67  log("\n");
68  log("\n");
69  log(" design -load <name>\n");
70  log("\n");
71  log("Reset the current design and load the design previously saved under the given\n");
72  log("name.\n");
73  log("\n");
74  log("\n");
75  log(" design -copy-from <name> [-as <new_mod_name>] <selection>\n");
76  log("\n");
77  log("Copy modules from the specified design into the current one. The selection is\n");
78  log("evaluated in the other design.\n");
79  log("\n");
80  log("\n");
81  log(" design -copy-to <name> [-as <new_mod_name>] [selection]\n");
82  log("\n");
83  log("Copy modules from the current design into the soecified one.\n");
84  log("\n");
85  }
void log(const char *format,...)
Definition: log.cc:180

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void Pass::init_register ( )
staticinherited

Definition at line 54 of file register.cc.

55 {
56  while (first_queued_pass) {
59  }
60 }
Pass * first_queued_pass
Definition: register.cc:31
Pass * next_queued_pass
Definition: register.h:60
virtual void run_register()
Definition: register.cc:48

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void Pass::post_execute ( Pass::pre_post_exec_state_t  state)
inherited

Definition at line 84 of file register.cc.

85 {
86  int64_t time_ns = PerformanceTimer::query() - state.begin_ns;
87  runtime_ns += time_ns;
88  current_pass = state.parent_pass;
89  if (current_pass)
90  current_pass->runtime_ns -= time_ns;
91 }
static int64_t query()
Definition: log.h:151
int64_t runtime_ns
Definition: register.h:37
Pass * current_pass
Definition: register.cc:32
Pass * parent_pass
Definition: register.h:40
int64_t begin_ns
Definition: register.h:41

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Pass::pre_post_exec_state_t Pass::pre_execute ( )
inherited

Definition at line 74 of file register.cc.

75 {
76  pre_post_exec_state_t state;
77  call_counter++;
78  state.begin_ns = PerformanceTimer::query();
79  state.parent_pass = current_pass;
80  current_pass = this;
81  return state;
82 }
static int64_t query()
Definition: log.h:151
Pass * current_pass
Definition: register.cc:32
int call_counter
Definition: register.h:36

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void Pass::run_register ( )
virtualinherited

Reimplemented in Backend, and Frontend.

Definition at line 48 of file register.cc.

49 {
50  log_assert(pass_register.count(pass_name) == 0);
51  pass_register[pass_name] = this;
52 }
std::string pass_name
Definition: register.h:29
#define log_assert(_assert_expr_)
Definition: log.h:85
std::map< std::string, Pass * > pass_register
Definition: register.cc:35

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Field Documentation

int Pass::call_counter
inherited

Definition at line 36 of file register.h.

Pass* Pass::next_queued_pass
inherited

Definition at line 60 of file register.h.

std::string Pass::pass_name
inherited

Definition at line 29 of file register.h.

int64_t Pass::runtime_ns
inherited

Definition at line 37 of file register.h.

std::string Pass::short_help
inherited

Definition at line 29 of file register.h.


The documentation for this struct was generated from the following file: