torc-master
 All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Friends Macros Pages
DesignRegressionTest.cpp
Go to the documentation of this file.
1 // Torc - Copyright 2011-2013 University of Southern California. All Rights Reserved.
2 // $HeadURL$
3 // $Id$
4 
5 // This program is free software: you can redistribute it and/or modify it under the terms of the
6 // GNU General Public License as published by the Free Software Foundation, either version 3 of the
7 // License, or (at your option) any later version.
8 //
9 // This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
10 // without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
11 // the GNU General Public License for more details.
12 //
13 // You should have received a copy of the GNU General Public License along with this program. If
14 // not, see <http://www.gnu.org/licenses/>.
15 
16 /// \file
17 /// \brief Regression test for XDL Design class.
18 
19 #include <boost/test/unit_test.hpp>
20 #include <boost/filesystem/convenience.hpp>
21 #include "torc/common/DirectoryTree.hpp"
22 #include "torc/physical/Factory.hpp"
23 #include "torc/physical/XdlExporter.hpp"
24 #include "torc/physical/OutputStreamHelpers.hpp"
25 #include "torc/common/TestHelpers.hpp"
26 #include <fstream>
27 
28 namespace torc {
29 namespace physical {
30 
31 BOOST_AUTO_TEST_SUITE(physical)
32 
33 /// \brief Basic regression test for the entire XDL infrastructure.
34 /// \details Note: This is neither a pleasant nor recommended way to create a design.
35 BOOST_AUTO_TEST_CASE(DesignRegressionTest) {
36 
37  // determine whether or not to output additional debugging information; this serves primarily
38  // to show the user how certain design items can be accessed
39  bool debug = false;
40 
41  // create a design
42  DesignSharedPtr designPtr = Factory::newDesignPtr("blinker", "xc5vlx30", "ff324", "-1", "v3.2");
43  designPtr->setConfig("_DESIGN_PROP", "P3_PLACE_OPTIONS", "EFFORT_LEVEL:high");
44  designPtr->setConfig("_DESIGN_PROP", "", "P3_PLACED:");
45  designPtr->setConfig("_DESIGN_PROP", "", "P3_PLACE_OPTIONS:");
46  designPtr->setConfig("_DESIGN_PROP", "", "PK_NGMTIMESTAMP:1278102371");
47  BOOST_CHECK_EQUAL(designPtr->getConfigCount(), 4u);
48  if(debug) {
49  ConfigMap::const_iterator p = designPtr->configBegin();
50  ConfigMap::const_iterator e = designPtr->configEnd();
51  while(p != e) {
52  const std::string& setting = p->first;
53  const Config& config = p->second;
54  std::clog << "\t" << setting << ":" << config.getName() << ":" << config.getValue()
55  << std::endl;
56  p++;
57  }
58  }
59 
60  // create the modules (this design has no modules)
61  // verify the expected module count
62  BOOST_CHECK_EQUAL(designPtr->getModuleCount(), 0u);
63  if(debug) {
64  Design::ModuleSharedPtrConstIterator p = designPtr->modulesBegin();
65  Design::ModuleSharedPtrConstIterator e = designPtr->modulesEnd();
66  while(p != e) {
67  const ModuleSharedPtr& modulePtr = *p++;
68  std::clog << "\tmodule " << modulePtr->getName() << std::endl;
69  }
70  }
71 
72  // create the instances
73  // instance clk
74  InstanceSharedPtr clkInstPtr
75  = Factory::newInstancePtr("clk", "IOB", "CIOB_X17Y61", "B6", eInstanceBondingBonded);
76  clkInstPtr->setConfig("IMUX", "", "I");
77  clkInstPtr->setConfig("INBUF", "clk_ibuf/IBUFG", "");
78  clkInstPtr->setConfig("PAD", "clk", "");
79  clkInstPtr->setConfig("ISTANDARD", "", "LVCMOS25");
80  designPtr->addInstance(clkInstPtr);
81  // instance reset
82  InstanceSharedPtr resetInstPtr
83  = Factory::newInstancePtr("reset", "IOB", "CIOB_X17Y59", "F11", eInstanceBondingBonded);
84  resetInstPtr->setConfig("IMUX", "", "I");
85  resetInstPtr->setConfig("INBUF", "reset_ibuf", "");
86  resetInstPtr->setConfig("PAD", "reset", "");
87  resetInstPtr->setConfig("ISTANDARD", "", "LVCMOS25");
88  designPtr->addInstance(resetInstPtr);
89  // instance out
90  InstanceSharedPtr outInstPtr
91  = Factory::newInstancePtr("out", "IOB", "CIOB_X17Y59", "G11", eInstanceBondingBonded);
92  outInstPtr->setConfig("OUSED", "", "0");
93  outInstPtr->setConfig("OUTBUF", "out_obuf", "");
94  outInstPtr->setConfig("PAD", "out", "");
95  outInstPtr->setConfig("DRIVE", "", "12");
96  outInstPtr->setConfig("OSTANDARD", "", "LVCMOS25");
97  outInstPtr->setConfig("SLEW", "", "SLOW");
98  designPtr->addInstance(outInstPtr);
99  // instance clk_ibuf/BUFG
100  InstanceSharedPtr clkIbufInstPtr
101  = Factory::newInstancePtr("clk_ibuf/BUFG", "BUFG", "CLK_BUFGMUX_X47Y44", "BUFGCTRL_X0Y30");
102  clkIbufInstPtr->setConfig("BUFG", "clk_ibuf/BUFG", "");
103  designPtr->addInstance(clkIbufInstPtr);
104  // instance blink
105  InstanceSharedPtr blinkInstPtr
106  = Factory::newInstancePtr("blink", "SLICEL", "CLBLL_X16Y59", "SLICE_X27Y59");
107  blinkInstPtr->setConfig("CLKINV", "", "CLK");
108  blinkInstPtr->setConfig("D6LUT", "blink_i", "#LUT:O6=~A6");
109  blinkInstPtr->setConfig("DFF", "blink", "#FF");
110  blinkInstPtr->setConfig("DFFINIT", "", "INIT0");
111  blinkInstPtr->setConfig("DFFMUX", "", "O6");
112  blinkInstPtr->setConfig("DFFSR", "", "SRLOW");
113  blinkInstPtr->setConfig("SRUSED", "", "0");
114  blinkInstPtr->setConfig("SYNC_ATTR", "", "SYNC");
115  designPtr->addInstance(blinkInstPtr);
116  // instance XDL_DUMMY_IOI_X17Y59_OLOGIC_X1Y118
117  InstanceSharedPtr OLOGIC_X1Y118InstPtr
118  = Factory::newInstancePtr("XDL_DUMMY_IOI_X17Y59_OLOGIC_X1Y118", "OLOGIC", "IOI_X17Y59",
119  "OLOGIC_X1Y118");
120  OLOGIC_X1Y118InstPtr->setConfig("_NO_USER_LOGIC", "", "");
121  OLOGIC_X1Y118InstPtr->setConfig("_ROUTETHROUGH", "D1", "OQ");
122  designPtr->addInstance(OLOGIC_X1Y118InstPtr);
123  // instance XDL_DUMMY_IOI_X17Y59_ILOGIC_X1Y119
124  InstanceSharedPtr ILOGIC_X1Y119InstPtr
125  = Factory::newInstancePtr("XDL_DUMMY_IOI_X17Y59_ILOGIC_X1Y119", "ILOGIC", "IOI_X17Y59",
126  "ILOGIC_X1Y119");
127  ILOGIC_X1Y119InstPtr->setConfig("_NO_USER_LOGIC", "", "");
128  ILOGIC_X1Y119InstPtr->setConfig("_ROUTETHROUGH", "D", "O");
129  designPtr->addInstance(ILOGIC_X1Y119InstPtr);
130  // instance XDL_DUMMY_IOI_X17Y61_ILOGIC_X1Y123
131  InstanceSharedPtr ILOGIC_X1Y123InstPtr
132  = Factory::newInstancePtr("XDL_DUMMY_IOI_X17Y61_ILOGIC_X1Y123", "ILOGIC", "IOI_X17Y61",
133  "ILOGIC_X1Y123");
134  ILOGIC_X1Y123InstPtr->setConfig("_NO_USER_LOGIC", "", "");
135  ILOGIC_X1Y123InstPtr->setConfig("_ROUTETHROUGH", "D", "O");
136  designPtr->addInstance(ILOGIC_X1Y123InstPtr);
137  // verify that expected instance count
138  BOOST_CHECK_EQUAL(designPtr->getInstanceCount(), 8u);
139  if(debug) {
140  Design::InstanceSharedPtrConstIterator p = designPtr->instancesBegin();
141  Design::InstanceSharedPtrConstIterator e = designPtr->instancesEnd();
142  while(p != e) {
143  const InstanceSharedPtr& instancePtr = *p++;
144  std::clog << "\tinstance " << instancePtr->getName() << std::endl;
145  }
146  }
147 
148  // create the nets
149  // net blink
150  NetSharedPtr blinkNetPtr = Factory::newNetPtr("blink");
151  InstancePinSharedPtr blinkNetPin1Ptr = Factory::newInstancePinPtr(blinkInstPtr, "DQ");
152  blinkNetPtr->addSource(blinkNetPin1Ptr);
153  InstancePinSharedPtr blinkNetPin2Ptr = Factory::newInstancePinPtr(blinkInstPtr, "D6");
154  blinkNetPtr->addSink(blinkNetPin2Ptr);
155  InstancePinSharedPtr blinkNetPin3Ptr = Factory::newInstancePinPtr(outInstPtr, "O");
156  blinkNetPtr->addSink(blinkNetPin3Ptr);
157  blinkNetPtr->addPip(Factory::newPip("CLBLL_X16Y59", "L_DQ", "SITE_LOGIC_OUTS3",
158  ePipUnidirectionalBuffered));
159  blinkNetPtr->addPip(Factory::newPip("CLBLL_X16Y59", "SITE_IMUX_B47", "L_D6",
160  ePipUnidirectionalBuffered));
161  blinkNetPtr->addPip(Factory::newPip("INT_X16Y59", "EL2BEG2", "IMUX_B47",
162  ePipUnidirectionalBuffered));
163  blinkNetPtr->addPip(Factory::newPip("INT_X16Y59", "LOGIC_OUTS3", "EL2BEG2",
164  ePipUnidirectionalBuffered));
165  blinkNetPtr->addPip(Factory::newPip("INT_X17Y59", "EL2MID2", "IMUX_B41",
166  ePipUnidirectionalBuffered));
167  blinkNetPtr->addPip(Factory::newPip("IOI_X17Y59", "IOI_IMUX_B41", "IOI_O11",
168  ePipUnidirectionalBuffered));
169  blinkNetPtr->addPip(Factory::newPip("IOI_X17Y59", "IOI_O11", "IOI_O_PINWIRE1",
170  ePipUnidirectionalBuffered, Factory::newRoutethroughPtr("_ROUTETHROUGH",
171  "D1", "OQ", OLOGIC_X1Y118InstPtr, "D1", "OQ")));
172  blinkNetPtr->addPip(Factory::newPip("IOI_X17Y59", "IOI_O_PINWIRE1", "IOI_O1",
173  ePipUnidirectionalBuffered));
174  designPtr->addNet(blinkNetPtr);
175  // net clk
176  NetSharedPtr clkNetPtr = Factory::newNetPtr("clk");
177  clkNetPtr->setConfig("_BELSIG", "PAD,PAD,clk", "clk");
178  designPtr->addNet(clkNetPtr);
179  // net clk_c
180  NetSharedPtr clkCNetPtr = Factory::newNetPtr("clk_c");
181  InstancePinSharedPtr clkCNetPin1Ptr = Factory::newInstancePinPtr(clkIbufInstPtr, "O");
182  clkCNetPtr->addSource(clkCNetPin1Ptr);
183  InstancePinSharedPtr clkCNetPin2Ptr = Factory::newInstancePinPtr(blinkInstPtr, "CLK");
184  clkCNetPtr->addSink(clkCNetPin2Ptr);
185  clkCNetPtr->addPip(Factory::newPip("CLBLL_X16Y59", "SITE_CLK_B0", "L_CLK",
186  ePipUnidirectionalBuffered));
187  clkCNetPtr->addPip(Factory::newPip("CLK_BUFGMUX_X47Y44", "CLK_BUFGMUX_POSTMUX_GCLKP30",
188  "CLK_BUFGMUX_GCLKP30", ePipUnidirectionalBuffered));
189  clkCNetPtr->addPip(Factory::newPip("CLK_HROW_X17Y49", "CLK_HROW_GCLK_BUF30",
190  "CLK_HROW_HCLKL_P5", ePipUnidirectionalBuffered));
191  clkCNetPtr->addPip(Factory::newPip("HCLK_X16Y49", "HCLK_G_HCLK_P5", "HCLK_LEAF_GCLK5",
192  ePipUnidirectionalBuffered));
193  clkCNetPtr->addPip(Factory::newPip("INT_X16Y59", "GCLK5", "CLK_B0",
194  ePipUnidirectionalBuffered));
195  designPtr->addNet(clkCNetPtr);
196  // net clk_ibuf/IBUFG
197  NetSharedPtr clkIibufIbufgNetPtr = Factory::newNetPtr("clk_ibuf/IBUFG");
198  InstancePinSharedPtr clkIibufIbufgNetPin1Ptr = Factory::newInstancePinPtr(clkInstPtr, "I");
199  clkIibufIbufgNetPtr->addSource(clkIibufIbufgNetPin1Ptr);
200  InstancePinSharedPtr clkIibufIbufgNetPin2Ptr = Factory::newInstancePinPtr(clkIbufInstPtr, "I0");
201  clkIibufIbufgNetPtr->addSink(clkIibufIbufgNetPin2Ptr);
202  clkIibufIbufgNetPtr->addPip(Factory::newPip("CLK_BUFGMUX_X47Y44",
203  "CLK_BUFGMUX_MUXED_IN_CLKT_P28", "CLK_BUFGMUX_PREMUX0_CLK30",
204  ePipUnidirectionalBuffered));
205  clkIibufIbufgNetPtr->addPip(Factory::newPip("CLK_BUFGMUX_X47Y44", "CLK_BUFGMUX_PREMUX0_CLK30",
206  "CLK_BUFGMUX_CLKP0_30", ePipUnidirectionalBuffered));
207  clkIibufIbufgNetPtr->addPip(Factory::newPip("CLK_IOB_T_X17Y60", "CLK_IOB_CLK_BUF1",
208  "CLK_IOB_MUXED_CLKOUT28", ePipUnidirectionalBuffered));
209  clkIibufIbufgNetPtr->addPip(Factory::newPip("CLK_IOB_T_X17Y60", "CLK_IOB_PAD_CLK1",
210  "CLK_IOB_CLK_BUF1", ePipUnidirectionalBuffered));
211  clkIibufIbufgNetPtr->addPip(Factory::newPip("IOI_X17Y61", "IOI_D0", "IOI_I0",
212  ePipUnidirectionalBuffered, Factory::newRoutethroughPtr("_ROUTETHROUGH",
213  "D", "O", ILOGIC_X1Y123InstPtr, "D", "O")));
214  clkIibufIbufgNetPtr->addPip(Factory::newPip("IOI_X17Y61", "IOI_I0", "IOI_I_2GCLK0",
215  ePipUnidirectionalBuffered));
216  clkIibufIbufgNetPtr->addPip(Factory::newPip("IOI_X17Y61", "IOI_IBUF0", "IOI_D0",
217  ePipUnidirectionalBuffered));
218  designPtr->addNet(clkIibufIbufgNetPtr);
219  // net out
220  NetSharedPtr outNetPtr = Factory::newNetPtr("out");
221  outNetPtr->setConfig("_BELSIG", "PAD,PAD,out", "out");
222  designPtr->addNet(outNetPtr);
223  // net reset
224  NetSharedPtr resetNetPtr = Factory::newNetPtr("reset");
225  resetNetPtr->setConfig("_BELSIG", "PAD,PAD,reset", "reset");
226  designPtr->addNet(resetNetPtr);
227  // net reset_c
228  NetSharedPtr resetCNetPtr = Factory::newNetPtr("reset_c");
229  InstancePinSharedPtr resetCNetPin1Ptr = Factory::newInstancePinPtr(resetInstPtr, "I");
230  resetCNetPtr->addSource(resetCNetPin1Ptr);
231  InstancePinSharedPtr resetCNetPin2Ptr = Factory::newInstancePinPtr(blinkInstPtr, "SR");
232  resetCNetPtr->addSink(resetCNetPin2Ptr);
233  resetCNetPtr->addPip(Factory::newPip("CLBLL_X16Y59", "SITE_CTRL_B2", "L_SR",
234  ePipUnidirectionalBuffered));
235  resetCNetPtr->addPip(Factory::newPip("INT_INTERFACE_X17Y59", "INT_INTERFACE_LOGIC_OUTS_B11",
236  "INT_INTERFACE_LOGIC_OUTS11", ePipUnidirectionalBuffered));
237  resetCNetPtr->addPip(Factory::newPip("INT_X16Y59", "CTRL2", "CTRL_B2",
238  ePipUnidirectionalBuffered));
239  resetCNetPtr->addPip(Factory::newPip("INT_X16Y59", "WS2MID2", "CTRL2",
240  ePipUnidirectionalBuffered));
241  resetCNetPtr->addPip(Factory::newPip("INT_X17Y59", "LOGIC_OUTS11", "WS2BEG2",
242  ePipUnidirectionalBuffered));
243  resetCNetPtr->addPip(Factory::newPip("IOI_X17Y59", "IOI_D0", "IOI_I0",
244  ePipUnidirectionalBuffered, Factory::newRoutethroughPtr("_ROUTETHROUGH",
245  "D", "O", ILOGIC_X1Y119InstPtr, "D", "O")));
246  resetCNetPtr->addPip(Factory::newPip("IOI_X17Y59", "IOI_I0", "IOI_LOGIC_OUTS11",
247  ePipUnidirectionalBuffered));
248  resetCNetPtr->addPip(Factory::newPip("IOI_X17Y59", "IOI_IBUF0", "IOI_D0",
249  ePipUnidirectionalBuffered));
250  designPtr->addNet(resetCNetPtr);
251  // verify the expected net count
252  BOOST_CHECK_EQUAL(designPtr->getNetCount(), 7u);
253  if(debug) {
254  Design::NetSharedPtrConstIterator p = designPtr->netsBegin();
255  Design::NetSharedPtrConstIterator e = designPtr->netsEnd();
256  while(p != e) {
257  const NetSharedPtr& netPtr = *p++;
258  std::clog << "\tnet " << netPtr->getName() << std::endl;
259  }
260  }
261 
262  // create the appropriate file paths
263  boost::filesystem::path referencePath = torc::common::DirectoryTree::getExecutablePath()
264  / "torc" / "physical" / "DesignUnitTest.reference.xdl";
265  boost::filesystem::path generatedPath = torc::common::DirectoryTree::getExecutablePath()
266  / "regression" / "DesignUnitTest.generated.xdl";
267  // export the created design
268  std::fstream xdlExport(generatedPath.string().c_str(), std::ios_base::out);
269  XdlExporter fileExporter(xdlExport);
270  fileExporter(designPtr);
271 
272  // compare the reference and generated XDL
273  BOOST_CHECK(torc::common::fileContentsAreEqual(generatedPath, referencePath));
274 
275 }
276 
277 BOOST_AUTO_TEST_SUITE_END()
278 
279 } // namespace physical
280 } // namespace torc
281 
282 #if 0
283 /*
284 
285 # =======================================================
286 # XDL NCD CONVERSION MODE $Revision: 1.01$
287 # time: Fri Jul 2 18:17:55 2010
288 
289 # =======================================================
290 
291 
292 # =======================================================
293 # The syntax for the design statement is:
294 # design <design_name> <part> <ncd version>;
295 # or
296 # design <design_name> <device> <package> <speed> <ncd_version>
297 # =======================================================
298 design "blinker" xc5vlx30ff324-1 v3.2 ,
299  cfg "
300  _DESIGN_PROP:P3_PLACE_OPTIONS:EFFORT_LEVEL:high
301  _DESIGN_PROP::P3_PLACED:
302  _DESIGN_PROP::P3_PLACE_OPTIONS:
303  _DESIGN_PROP::PK_NGMTIMESTAMP:1278102371";
304 
305 
306 # =======================================================
307 # The syntax for instances is:
308 # instance <name> <sitedef>, placed <tile> <site>, cfg <string> ;
309 # or
310 # instance <name> <sitedef>, unplaced, cfg <string> ;
311 #
312 # For typing convenience you can abbreviate instance to inst.
313 #
314 # For IOs there are two special keywords: bonded and unbonded
315 # that can be used to designate whether the PAD of an unplaced IO is
316 # bonded out. If neither keyword is specified, bonded is assumed.
317 #
318 # The bonding of placed IOs is determined by the site they are placed in.
319 #
320 # If you specify bonded or unbonded for an instance that is not an
321 # IOB it is ignored.
322 #
323 # Shown below are three examples for IOs.
324 # instance IO1 IOB, unplaced ; # This will be bonded
325 # instance IO1 IOB, unplaced bonded ; # This will be bonded
326 # instance IO1 IOB, unplaced unbonded ; # This will be unbonded
327 # =======================================================
328 inst "clk" "IOB",placed CIOB_X17Y61 B6 ,
329  cfg " DIFFI_INUSED::#OFF DIFF_TERM::#OFF IMUX::I OUSED::#OFF PADOUTUSED::#OFF
330  PULLTYPE::#OFF TUSED::#OFF INBUF:clk_ibuf/IBUFG: PAD:clk:
331  ISTANDARD::LVCMOS25 "
332  ;
333 inst "reset" "IOB",placed CIOB_X17Y59 F11 ,
334  cfg " DIFFI_INUSED::#OFF DIFF_TERM::#OFF IMUX::I OUSED::#OFF PADOUTUSED::#OFF
335  PULLTYPE::#OFF TUSED::#OFF INBUF:reset_ibuf: PAD:reset:
336  ISTANDARD::LVCMOS25 "
337  ;
338 inst "out" "IOB",placed CIOB_X17Y59 G11 ,
339  cfg " DIFFI_INUSED::#OFF DIFF_TERM::#OFF IMUX::#OFF OUSED::0 PADOUTUSED::#OFF
340  PULLTYPE::#OFF TUSED::#OFF OUTBUF:out_obuf: PAD:out:
341  DRIVE::12 OSTANDARD::LVCMOS25 SLEW::SLOW "
342  ;
343 inst "clk_ibuf/BUFG" "BUFG",placed CLK_BUFGMUX_X47Y44 BUFGCTRL_X0Y30 ,
344  cfg " BUFG:clk_ibuf/BUFG: "
345  ;
346 inst "blink" "SLICEL",placed CLBLL_X16Y59 SLICE_X27Y59 ,
347  cfg " A5LUT::#OFF A6LUT::#OFF ACY0::#OFF AFF::#OFF AFFINIT::#OFF AFFMUX::#OFF
348  AFFSR::#OFF AOUTMUX::#OFF AUSED::#OFF B5LUT::#OFF B6LUT::#OFF BCY0::#OFF
349  BFF::#OFF BFFINIT::#OFF BFFMUX::#OFF BFFSR::#OFF BOUTMUX::#OFF BUSED::#OFF
350  C5LUT::#OFF C6LUT::#OFF CCY0::#OFF CEUSED::#OFF CFF::#OFF CFFINIT::#OFF
351  CFFMUX::#OFF CFFSR::#OFF CLKINV::CLK COUTMUX::#OFF COUTUSED::#OFF
352  CUSED::#OFF D5LUT::#OFF D6LUT:blink_i:#LUT:O6=~A6 DCY0::#OFF DFF:blink:#FF
353  DFFINIT::INIT0 DFFMUX::O6 DFFSR::SRLOW DOUTMUX::#OFF DUSED::#OFF
354  PRECYINIT::#OFF REVUSED::#OFF SRUSED::0 SYNC_ATTR::SYNC "
355  ;
356 inst "XDL_DUMMY_IOI_X17Y59_OLOGIC_X1Y118" "OLOGIC",placed IOI_X17Y59 OLOGIC_X1Y118 ,
357  cfg "_NO_USER_LOGIC:: _ROUTETHROUGH:D1:OQ "
358  ;
359 inst "XDL_DUMMY_IOI_X17Y59_ILOGIC_X1Y119" "ILOGIC",placed IOI_X17Y59 ILOGIC_X1Y119 ,
360  cfg "_NO_USER_LOGIC:: _ROUTETHROUGH:D:O "
361  ;
362 inst "XDL_DUMMY_IOI_X17Y61_ILOGIC_X1Y123" "ILOGIC",placed IOI_X17Y61 ILOGIC_X1Y123 ,
363  cfg "_NO_USER_LOGIC:: _ROUTETHROUGH:D:O "
364  ;
365 
366 # ================================================
367 # The syntax for nets is:
368 # net <name> <type>,
369 # outpin <inst_name> <inst_pin>,
370 # .
371 # .
372 # inpin <inst_name> <inst_pin>,
373 # .
374 # .
375 # pip <tile> <wire0> <dir> <wire1> , # [<rt>]
376 # .
377 # .
378 # ;
379 #
380 # There are three available wire types: wire, power and ground.
381 # If no type is specified, wire is assumed.
382 #
383 # Wire indicates that this a normal wire.
384 # Power indicates that this net is tied to a DC power source.
385 # You can use "power", "vcc" or "vdd" to specify a power net.
386 #
387 # Ground indicates that this net is tied to ground.
388 # You can use "ground", or "gnd" to specify a ground net.
389 #
390 # The <dir> token will be one of the following:
391 #
392 # Symbol Description
393 # ====== ==========================================
394 # == Bidirectional, unbuffered.
395 # => Bidirectional, buffered in one direction.
396 # =- Bidirectional, buffered in both directions.
397 # -> Directional, buffered.
398 #
399 # No pips exist for unrouted nets.
400 # ================================================
401 net "blink" ,
402  outpin "blink" DQ ,
403  inpin "blink" D6 ,
404  inpin "out" O ,
405  pip CLBLL_X16Y59 L_DQ -> SITE_LOGIC_OUTS3 ,
406  pip CLBLL_X16Y59 SITE_IMUX_B47 -> L_D6 ,
407  pip INT_X16Y59 EL2BEG2 -> IMUX_B47 ,
408  pip INT_X16Y59 LOGIC_OUTS3 -> EL2BEG2 ,
409  pip INT_X17Y59 EL2MID2 -> IMUX_B41 ,
410  pip IOI_X17Y59 IOI_IMUX_B41 -> IOI_O11 ,
411  pip IOI_X17Y59 IOI_O11 -> IOI_O_PINWIRE1 , # _ROUTETHROUGH:D1:OQ "XDL_DUMMY_IOI_X17Y59_OLOGIC_X1Y118" D1 -> OQ
412  pip IOI_X17Y59 IOI_O_PINWIRE1 -> IOI_O1 ,
413  ;
414 net "clk" , cfg " _BELSIG:PAD,PAD,clk:clk",
415  ;
416 net "clk_c" ,
417  outpin "clk_ibuf/BUFG" O ,
418  inpin "blink" CLK ,
419  pip CLBLL_X16Y59 SITE_CLK_B0 -> L_CLK ,
420  pip CLK_BUFGMUX_X47Y44 CLK_BUFGMUX_POSTMUX_GCLKP30 -> CLK_BUFGMUX_GCLKP30 ,
421  pip CLK_HROW_X17Y49 CLK_HROW_GCLK_BUF30 -> CLK_HROW_HCLKL_P5 ,
422  pip HCLK_X16Y49 HCLK_G_HCLK_P5 -> HCLK_LEAF_GCLK5 ,
423  pip INT_X16Y59 GCLK5 -> CLK_B0 ,
424  ;
425 net "clk_ibuf/IBUFG" ,
426  outpin "clk" I ,
427  inpin "clk_ibuf/BUFG" I0 ,
428  pip CLK_BUFGMUX_X47Y44 CLK_BUFGMUX_MUXED_IN_CLKT_P28 -> CLK_BUFGMUX_PREMUX0_CLK30 ,
429  pip CLK_BUFGMUX_X47Y44 CLK_BUFGMUX_PREMUX0_CLK30 -> CLK_BUFGMUX_CLKP0_30 ,
430  pip CLK_IOB_T_X17Y60 CLK_IOB_CLK_BUF1 -> CLK_IOB_MUXED_CLKOUT28 ,
431  pip CLK_IOB_T_X17Y60 CLK_IOB_PAD_CLK1 -> CLK_IOB_CLK_BUF1 ,
432  pip IOI_X17Y61 IOI_D0 -> IOI_I0 , # _ROUTETHROUGH:D:O "XDL_DUMMY_IOI_X17Y61_ILOGIC_X1Y123" D -> O
433  pip IOI_X17Y61 IOI_I0 -> IOI_I_2GCLK0 ,
434  pip IOI_X17Y61 IOI_IBUF0 -> IOI_D0 ,
435  ;
436 net "out" , cfg " _BELSIG:PAD,PAD,out:out",
437  ;
438 net "reset" , cfg " _BELSIG:PAD,PAD,reset:reset",
439  ;
440 net "reset_c" ,
441  outpin "reset" I ,
442  inpin "blink" SR ,
443  pip CLBLL_X16Y59 SITE_CTRL_B2 -> L_SR ,
444  pip INT_INTERFACE_X17Y59 INT_INTERFACE_LOGIC_OUTS_B11 -> INT_INTERFACE_LOGIC_OUTS11 ,
445  pip INT_X16Y59 CTRL2 -> CTRL_B2 ,
446  pip INT_X16Y59 WS2MID2 -> CTRL2 ,
447  pip INT_X17Y59 LOGIC_OUTS11 -> WS2BEG2 ,
448  pip IOI_X17Y59 IOI_D0 -> IOI_I0 , # _ROUTETHROUGH:D:O "XDL_DUMMY_IOI_X17Y59_ILOGIC_X1Y119" D -> O
449  pip IOI_X17Y59 IOI_I0 -> IOI_LOGIC_OUTS11 ,
450  pip IOI_X17Y59 IOI_IBUF0 -> IOI_D0 ,
451  ;
452 
453 # =======================================================
454 # SUMMARY
455 # Number of Module Defs: 0
456 # Number of Module Insts: 0
457 # Number of Primitive Insts: 5
458 # Number of Nets: 7
459 # =======================================================
460 */
461 #endif
DirectoryTree.hpp
Header for the DirectoryTree class.
torc::physical::Circuit::InstanceSharedPtrConstIterator
InstanceSharedPtrVector::const_iterator InstanceSharedPtrConstIterator
Constant iterator to Instance shared pointers.
Definition: Circuit.hpp:72
torc::physical::Factory::newNetPtr
static NetSharedPtr newNetPtr(const string &inName, ENetType inNetType=eNetTypeNormal)
Create and return a new Net share pointer.
Definition: physical/Factory.hpp:93
torc::physical::Design::ModuleSharedPtrConstIterator
ModuleSharedPtrVector::const_iterator ModuleSharedPtrConstIterator
Constant iterator for Module shared pointers.
Definition: physical/Design.hpp:66
torc::physical::InstancePinSharedPtr
boost::shared_ptr< class InstancePin > InstancePinSharedPtr
Shared pointer encapsulation of an InstancePin.
Definition: physical/Instance.hpp:39
torc::bitstream::string
std::string string
Definition: LibGenFactory.hpp:35
torc::physical::BOOST_AUTO_TEST_CASE
BOOST_AUTO_TEST_CASE(XdlUnpackUnitTest)
Unit test for the XdlUnpack class.
Definition: XdlUnpackUnitTest.cpp:35
torc::physical::ConfigMap::const_iterator
const_iterator const_iterator
Constant iterator to {setting,Config} pairs.
Definition: ConfigMap.hpp:52
TestHelpers.hpp
Header for Boost.Test helper functions.
torc::physical::ModuleSharedPtr
boost::shared_ptr< Module > ModuleSharedPtr
Shared pointer encapsulation of a Module.
Definition: Module.hpp:114
XdlExporter.hpp
Header for the XdlExport class.
torc::physical::Config
Configuration. A {name:value} pair.
Definition: Config.hpp:39
OutputStreamHelpers.hpp
Header for torc::physical output stream helpers.
torc::physical::Named::getName
const string & getName(void) const
Returns the object name.
Definition: Named.hpp:51
torc::physical::Factory::newPip
static torc::physical::Pip newPip(const string &inTileName, const string &inSourceWireName, const string &inSinkWireName, EPipDirection inPipDirection, RoutethroughSharedPtr inRoutethroughPtr=RoutethroughSharedPtr())
Construct a pip and return it.
Definition: physical/Factory.hpp:126
torc::physical::NetSharedPtr
boost::shared_ptr< Net > NetSharedPtr
Shared pointer encapsulation of a Net.
Definition: physical/Net.hpp:229
torc::physical::Factory::newInstancePtr
static InstanceSharedPtr newInstancePtr(const string &inName, const string &inType, const string &inTile, const string &inSite, EInstanceBonding inBonding=eInstanceBondingUnknown, InstanceReferenceSharedPtr inInstanceReferencePtr=InstanceReferenceSharedPtr())
Construct and return a new Instance shared pointer.
Definition: physical/Factory.hpp:81
torc::physical::Config::getValue
const string & getValue(void) const
Return the configuration value.
Definition: Config.hpp:86
torc::bitstream::path
boost::filesystem::path path
Definition: LibGenFactory.hpp:36
torc::physical::InstanceSharedPtr
boost::shared_ptr< Instance > InstanceSharedPtr
Shared pointer encapsulation of an Instance.
Definition: physical/Instance.hpp:188
torc::physical::DesignSharedPtr
boost::shared_ptr< Design > DesignSharedPtr
Shared pointer encapsulation of a Design.
Definition: physical/Design.hpp:134
torc::physical::Factory::newRoutethroughPtr
static RoutethroughSharedPtr newRoutethroughPtr(const string &inSetting, const string &inName, const string &inValue, const InstanceWeakPtr &inInstancePtr, const string &inSourceWireName, const string &inSinkWireName)
Construct and return a new Routethrough shared pointer.
Definition: physical/Factory.hpp:133
torc::physical::Factory::newInstancePinPtr
static InstancePinSharedPtr newInstancePinPtr(InstanceSharedPtr inInstancePtr, const string &inPinName)
Construct and return a new InstancePin shared pointer.
Definition: physical/Factory.hpp:111
torc::physical::Factory::newDesignPtr
static DesignSharedPtr newDesignPtr(const string &inName, const string &inDevice, const string &inPackage, const string &inSpeedGrade, const string &inXdlVersion)
Create and return a new Design shared pointer.
Definition: physical/Factory.hpp:44
torc::common::fileContentsAreEqual
bool fileContentsAreEqual(const boost::filesystem::path &inA, const boost::filesystem::path &inB)
Compare the raw contents of two files to determine whether they are identical.
Definition: common/TestHelpers.cpp:43
Factory.hpp
Header for the Factory class.
torc::common::DirectoryTree::getExecutablePath
static const boost::filesystem::path & getExecutablePath(void)
Returns the absolute path to the executable directory.
Definition: DirectoryTree.hpp:58
torc::physical::Circuit::NetSharedPtrConstIterator
NetSharedPtrVector::const_iterator NetSharedPtrConstIterator
Constant iterator to Net shared pointers.
Definition: Circuit.hpp:76
torc::physical::XdlExporter
Physical design exporter for XDL.
Definition: XdlExporter.hpp:31