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Architecture.hpp
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3 // $Id$
4 
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15 
16 /// \file
17 /// \brief Main torc::architecture namespace header.
18 
19 /// \namespace torc::architecture
20 /// \brief Namespace for the Torc architecture support, providing device logic and wiring
21 /// information, and design usage tracking.
22 
23 /// \namespace torc::architecture::xilinx
24 /// \brief Namespace for Xilinx architecture support.
25 /// \details This namespace defines types suitable for Xilinx architectures. These types may or
26 /// may not resemble those for other architectures.
27 
28 #ifndef TORC_ARCHITECTURE_HPP
29 #define TORC_ARCHITECTURE_HPP
30 
52 
53 #endif // TORC_ARCHITECTURE_HPP
Header for the Segments class.
Header for the WireUsage class.
Header for the WireInfo class.
Header for the Sites class.
Header for the Arc class.
Header for the DeviceDesignator class.
Header for the DDBStreamHelper class.
Header for torc::physical output stream helpers.
Header for the DDBConsoleStreams class.
Header for the Versions class.
Header for the ArcUsage class.
Header for the InstancePin class.
Header for the ExtendedWireInfo class.
Header for the Tilewire class.
Header for the Array class.
Header for the DigestStream class.
Header for the DDB class.
Header for the TileInfo class.
Header for the Tiles class.
Header for the XdlImporter class.
Device database types for Xilinx architectures.