#include "verilog_frontend.h"
#include "kernel/log.h"
#include <string.h>
#include <math.h>
Go to the source code of this file.
static int my_decimal_div_by_two |
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std::vector< uint8_t > & |
digits | ) |
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static |
Definition at line 47 of file const2ast.cc.
50 for (
size_t i = 0; i < digits.size(); i++) {
52 digits[i] += carry * 10;
53 carry = digits[i] % 2;
56 while (!digits.empty() && !digits.front())
57 digits.erase(digits.begin());
#define log_assert(_assert_expr_)
static int my_ilog2 |
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int |
x | ) |
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static |
Definition at line 62 of file const2ast.cc.
65 while (x != 0 && x != -1) {
static void my_strtobin |
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std::vector< RTLIL::State > & |
data, |
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const char * |
str, |
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int |
len_in_bits, |
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int |
base, |
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char |
case_type |
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) |
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static |
Definition at line 73 of file const2ast.cc.
76 std::vector<uint8_t> digits;
79 if (
'0' <= *str && *str <=
'9')
80 digits.push_back(*str -
'0');
81 else if (
'a' <= *str && *str <=
'f')
82 digits.push_back(10 + *str -
'a');
83 else if (
'A' <= *str && *str <=
'F')
84 digits.push_back(10 + *str -
'A');
85 else if (*str ==
'x' || *str ==
'X')
86 digits.push_back(0xf0);
87 else if (*str ==
'z' || *str ==
'Z')
88 digits.push_back(0xf1);
90 digits.push_back(0xf2);
96 if (len_in_bits < 0) {
97 while (!digits.empty())
99 while (data.size() < 32)
100 data.push_back(RTLIL::S0);
102 for (
int i = 0; i < len_in_bits; i++)
108 int bits_per_digit =
my_ilog2(base-1);
110 len_in_bits = std::max<int>(digits.size() * bits_per_digit, 32);
113 data.resize(len_in_bits);
115 for (
int i = 0; i < len_in_bits; i++) {
116 int bitmask = 1 << (i % bits_per_digit);
117 int digitidx = digits.size() - (i / bits_per_digit) - 1;
123 }
else if (digits[digitidx] == 0xf0)
125 else if (digits[digitidx] == 0xf1)
127 else if (digits[digitidx] == 0xf2)
130 data[i] = (digits[digitidx] & bitmask) ?
RTLIL::S1 : RTLIL::S0;
static int my_decimal_div_by_two(std::vector< uint8_t > &digits)
static int my_ilog2(int x)