19 #ifndef TORC_GENERIC_VERILOG_VERILOGNAMES_HPP
20 #define TORC_GENERIC_VERILOG_VERILOGNAMES_HPP
27 namespace generic {
class VerilogNamesUnitTest; }
78 #endif // TORC_GENERIC_VERILOG_VERILOGNAMES_HPP
static string getImportedVerilogLibraryName(void)
Returns the imported Verilog library name.
static string getImportedCellLibraryName(void)
Returns the imported cell library name.
static string sTorcAssignRHSPropertyName
Property name for the wire assignment right-hand-side.
static string getTorcAssignRHSPropertyName(void)
Property name for the wire assignment right-hand-side.
static string getTorcRangeMSBPropertyName(void)
Property name for the vector range MSB.
VerilogNames(void)
Protected constructor.
static string sImportedVerilogLibraryName
Library name for imported verilog.
static string sTorcRangeLSBPropertyName
Property name for the vector range LSB.
static string getTorcRangeLSBPropertyName(void)
Property name for the vector range LSB.
Encapsulation of library names used for Verilog importing and exporting.
friend class torc::generic::generic::VerilogNamesUnitTest
The unit test class has access to our internals.
static string sTorcRangeMSBPropertyName
Property name for the vector range MSB.
static string sImportedCellLibraryName
Library name for verilog library cells.
static string sImportedVerilogViewName
View name for imported verilog.
std::string string
Imported type name.
static string getImportedVerilogViewName(void)
Returns the imported Verilog view name.
static string sInferredBlackBoxesLibraryName
Library name for inferred black boxes.
static string getInferredBlackBoxesLibraryName(void)
Returns the inferred black box library name.