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Spartan3E.cpp
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15 
16 /// \file
17 /// \brief Source for the Spartan3E class.
18 
20 #include <iostream>
21 
22 /// \todo Warning: this will need to be moved elsewhere.
26 #include <fstream>
27 
28 namespace torc {
29 namespace bitstream {
30 
31  const char* Spartan3E::sPacketTypeName[ePacketTypeCount] = {
32  "[UNKNOWN TYPE 0]", "TYPE1", "TYPE2", "[UNKNOWN TYPE 3]", "[UNKNOWN TYPE 4]",
33  "[UNKNOWN TYPE 5]", "[UNKNOWN TYPE 6]", "[UNKNOWN TYPE 7]"
34  };
35 
36  const char* Spartan3E::sOpcodeName[eOpcodeCount] = {
37  "NOP", "READ", "WRITE", "RESERVED"
38  };
39 
40  const char* Spartan3E::sRegisterName[eRegisterCount] = {
41  "CRC", "FAR", "FDRI", "FDRO", "CMD", "CTL", "MASK", "STAT", "LOUT", "COR", "MFWR", "FLR",
42  "[UNKNOWN_REGISTER 12]", "[UNKNOWN_REGISTER 13]", "IDCODE"
43  };
44 
45  const char* Spartan3E::sCommandName[eCommandCount] = {
46  "NULL", "WCFG", "MFWR", "LFRM", "RCFG", "START", "RCAP", "RCRC", "AGHIGH", "SWITCH",
47  "GRESTORE", "SHUTDOWN", "GCAPTURE", "DESYNCH"
48  };
49 
50 #define VALUES (const char*[])
51 
52  /// \see Configuration Options Register Description: XAPP452, v1.1, June 25, 2008, Table 5.
53  const Bitstream::Subfield Spartan3E::sCOR[] = {
54  {0x00000007, 0, "GWE_cycle", "GWE_CYCLE", 5,
55  // bitgen: 6, 1, 2, 3, 4, 5, Done, Keep
56  // config: 001:"2", 010:"3", 011:"4", 100:"5", 101:"6"
57  VALUES{"[UNDEFINED 0]", "2", "3", "4", "5", "6", "[UNDEFINED 6]", "[UNDEFINED 7]", 0}},
58  {0x00000038, 3, "GTS_cycle", "GTS_CYCLE", 4,
59  // bitgen: 5, 1, 2, 3, 4, 6, Done, Keep
60  // config: 001:"2", 010:"3", 011:"4", 100:"5", 101:"6"
61  VALUES{"[UNDEFINED 0]", "2", "3", "4", "5", "6", "[UNDEFINED 6]", "[UNDEFINED 7]", 0}},
62  {0x000001c0, 6, "LCK_cycle", "LOCK_CYCLE", 7,
63  // bitgen: NoWait, 0, 1, 2, 3, 4, 5, 6
64  // config: 000:"1", 001:"2", 010:"3", 011:"4", 100:"5", 101:"6", 111:"NO_WAIT"
65  VALUES{"1", "2", "3", "4", "5", "6", "[UNDEFINED 6]", "NoWait", 0}},
66  {0x00000E00, 9, "Match_cycle", "MATCH_CYCLE", 7,
67  // bitgen: Auto, NoWait, 0, 1, 2, 3, 4, 5, 6
68  // config: 000:"1", 001:"2", 010:"3", 011:"4", 100:"5", 101:"6", 111:"NO_WAIT"
69  VALUES{"1", "2", "3", "4", "5", "6", "[UNDEFINED 6]", "NoWait", 0}},
70  {0x00007000, 12, "DONE_cycle", "DONE_CYCLE", 3,
71  // bitgen: 4, 1, 2, 3, 5, 6
72  // config: 001:"2", 010:"3", 011:"4", 100:"5", 101:"6"
73  VALUES{"[UNDEFINED 0]", "2", "3", "4", "5", "6", "[UNDEFINED 6]", "[UNDEFINED 7]", 0}},
74  {0x00018000, 15, "StartupClk", "SSCLKSRC", 0,
75  // bitgen: Cclk, UserClk, JtagClk
76  // config: 00:"CCLK", 01:"UserClk", 1x:"JTAGClk"
77  VALUES{"Cclk", "UserClk", "JtagClk", "JtagClk", 0}},
78  {0x00780000, 19, "ConfigRate", "OSCFSEL", 0,
79  // bitgen: 1, 3, 6, 12, 25, 50
80  // config: values undefined
81  VALUES{
82  "[UNKNOWN 0]", "[UNKNOWN 1]", "[UNKNOWN 2]", "[UNKNOWN 3]",
83  "[UNKNOWN 4]", "[UNKNOWN 5]", "[UNKNOWN 6]", "[UNKNOWN 7]",
84  "[UNKNOWN 8]", "[UNKNOWN 9]", "[UNKNOWN 10]", "[UNKNOWN 11]",
85  "[UNKNOWN 12]", "[UNKNOWN 13]", "[UNKNOWN 14]", "[UNKNOWN 15]",
86  0}},
87  {0x00800000, 23, "Capture", "SINGLE", 0,
88  // bitgen: n/a -- this comes from the CAPTURE site ONESHOT setting
89  // config: 0:"Readback is not single-shot", 1:"Readback is single-shot"
90  VALUES{"Continuous", "OneShot", 0}},
91  {0x01000000, 24, "DriveDone", "DRIVE_DONE", 0,
92  // bitgen: No, Yes
93  // config: 0:"DONE pin is open drain", 1:"DONE is actively driven high"
94  VALUES{"No", "Yes", 0}},
95  {0x02000000, 25, "DonePipe", "DONE_PIPE", 0,
96  // bitgen: No, Yes
97  // config: 0:"No pipeline stage for DONEIN", 1:"Add pipeline stage for DONEIN"
98  VALUES{"No", "Yes", 0}},
99  {0x20000000, 29, "CRC", "CRC_BYPASS", 0,
100  // bitgen: Enable, Disable
101  // config: 0:"CRC enabled", 1:"CRC disabled"
102  VALUES{"Enable", "Disable", 0}},
103  {0, 0, 0, 0, 0, 0}
104  };
105 
106  /// \see Status Register Description: XAPP452, v1.1, June 25, 2008, Table 4.
107  /// \note The "bitgen" names attempt to mimic the general bitgen convention.
108  const Bitstream::Subfield Spartan3E::sSTAT[] = {
109  {0x00000001, 0, "CRC_error", "CRC_ERROR", 0,
110  // bitgen: n/a
111  // config: 0:"No CRC error", 1:"CRC error"
112  VALUES{"No", "Yes", 0}},
113  {0x00000004, 2, "DCM_locked", "DCM_LOCK", 0,
114  // bitgen: n/a
115  // config: 0:"DCMs not locked", 1:"DCMs are locked"
116  VALUES{"No", "Yes", 0}},
117  {0x00000008, 3, "DCI_matched", "DCI_MATCH", 0,
118  // bitgen: n/a
119  // config: 0:"DCI not matched", 1:"DCI matched
120  VALUES{"No", "Yes", 0}},
121  {0x00000010, 4, "IN_error", "IN_ERROR", 0,
122  // bitgen: n/a
123  // config: 0:"No legacy input error", 1:"Legacy input error"
124  VALUES{"No", "Yes", 0}},
125  {0x00000020, 5, "GTS_CFG", "GTS_CFG_B", 0,
126  // bitgen: n/a
127  // config: 0:"All I/Os are placed in high-Z state", 1:"All I/Os behave as configured"
128  VALUES{"IoDisabled", "IoEnabled", 0}},
129  {0x00000040, 6, "GWE", "GWE", 0,
130  // bitgen: n/a
131  // config: 0:"FFs and block RAM are write disabled", 1:"FFs and block RAM are write
132  // enabled"
133  VALUES{"WriteDisabled", "WriteEnabled", 0}},
134  {0x00000080, 7, "GHIGH_B", "GHIGH_B", 0,
135  // bitgen: n/a
136  // config: 0:"GHIGH_B asserted", 1:"GHIGH_B deasserted"
137  VALUES{"InterconnectDisabled", "InterconnectEnabled", 0}},
138  {0x00000700, 8, "Mode", "MODE", 0,
139  // bitgen: n/a
140  // config: Status of the MODE pins (M2:M0)
141  VALUES{"MasterSerial", "SlaveSelectMap32", "[UNDEFINED 2]", "MasterSelectMap",
142  "[UNDEFINED 3]", "JTAG", "SlaveSelectMap8", "[UNDEFINED 6]", "SlaveSerial", 0}},
143  {0x00000800, 11, "INIT", "INIT", 0,
144  // bitgen: n/a
145  // config: Value on INIT pin
146  VALUES{"Deasserted", "Asserted", 0}},
147  {0x00001000, 12, "Done", "DONE", 0,
148  // bitgen: n/a
149  // config: Value on DONE pin
150  VALUES{"Deasserted", "Asserted", 0}},
151  {0x00002000, 13, "ID_error", "ID_ERROR", 0,
152  // bitgen: n/a
153  // config: 0:"No ID Error", 1:"ID Error"
154  VALUES{"No", "Yes", 0}},
155  {0, 0, 0, 0, 0, 0}
156  };
157 
158  /// \see Control Register Description: XAPP452, v1.1, June 25, 2008, Table 3.
159  const Bitstream::Subfield Spartan3E::sCTL[] = {
160  {0x00000001, 0, "GTS_USER_B", "GTS_USER_B", 0,
161  // bitgen: n/a?
162  // config: 0:"I/Os placed in high-Z state", 1:"I/Os active"
163  VALUES{"IoDisabled", "IoActive", 0}},
164  {0x00000008, 3, "Persist", "PERSIST", 0,
165  // bitgen: No, Yes
166  // config: 0:"No (default)", 1:"Yes"
167  VALUES{"No", "Yes", 0}},
168  {0x00000030, 4, "Security", "SBITS", 0,
169  // bitgen: None, Level1, Level2
170  // config: 00:"Read/Write OK (default)", 01:"Readback disabled", 1x:"Readback disabled,
171  // writing disabled except CRC register."
172  VALUES{"None", "Level1", "Level2", "Level2", 0}},
173  {0, 0, 0, 0, 0, 0}
174  };
175 
176  /// \see Control Mask Register Description: Inferred from Table 3.
177  const Bitstream::Subfield Spartan3E::sMASK[] = {
178  {0x00000001, 0, "GTS_USER_B", "GTS_USER_B", 0, VALUES{"Protected", "Writable", 0}},
179  {0x00000008, 3, "Persist", "PERSIST", 0, VALUES{"Protected", "Writable", 0}},
180  {0x00000080, 4, "Security", "SBITS", 0,
181  VALUES{"Protected", "[UNKNOWN 1]", "[UNKNOWN 2]", "Writable", 0}},
182  {0, 0, 0, 0, 0, 0}
183  };
184 
185  /// \brief Return the masked value for a subfield of the specified register.
186  uint32_t Spartan3E::makeSubfield(ERegister inRegister, const std::string& inSubfield,
187  const std::string& inSetting) {
188  const Subfield* subfields;
189  switch(inRegister) {
190  case eRegisterCOR: subfields = sCOR; break;
191  case eRegisterSTAT: subfields = sSTAT; break;
192  case eRegisterCTL: subfields = sCTL; break;
193  case eRegisterMASK: subfields = sMASK; break;
194  default: return 0;
195  }
196  for(uint32_t field = 0; subfields[field].mMask != 0; field++) {
197  const Subfield& subfield = subfields[field];
198  if(inSubfield != subfield.mBitgenName && inSubfield != subfield.mConfigGuideName)
199  continue;
200  const char** ptr = subfield.mValues;
201  for(uint32_t i = 0; *ptr != 0; i++, ptr++) {
202  if(inSetting == *ptr) return (i << subfield.mShift) & subfield.mMask;
203  }
204  }
205  return 0;
206  }
207 
208 
209 //#define GENERATE_STATIC_DEVICE_INFO
210 #ifndef GENERATE_STATIC_DEVICE_INFO
211 
212  extern DeviceInfo xc3s100e;
213  extern DeviceInfo xc3s250e;
214  extern DeviceInfo xc3s500e;
215  extern DeviceInfo xc3s1200e;
216  extern DeviceInfo xc3s1600e;
217 
218  void Spartan3E::initializeDeviceInfo(const std::string& inDeviceName) {
219  using namespace torc::common;
220  switch(mDevice) {
221  case eXC3S100E: setDeviceInfo(xc3s100e); break;
222  case eXC3S250E: setDeviceInfo(xc3s250e); break;
223  case eXC3S500E: setDeviceInfo(xc3s500e); break;
224  case eXC3S1200E: setDeviceInfo(xc3s1200e); break;
225  case eXC3S1600E: setDeviceInfo(xc3s1600e); break;
226  default: break;
227  }
228  }
229 
230 #else
231 
232  void Spartan3E::initializeDeviceInfo(const std::string& inDeviceName) {
233 
239 
240  // look up the device tile map
241  torc::architecture::DDB ddb(inDeviceName);
242  const torc::architecture::Tiles& tiles = ddb.getTiles();
243  uint32_t tileCount = tiles.getTileCount();
244  uint16_t rowCount = tiles.getRowCount();
245  uint16_t colCount = tiles.getColCount();
246  ColumnTypeVector columnTypes;
247 
248  // set up the tile index and name mappings, and the index to column def mapping
249  typedef std::map<TileTypeIndex, std::string> TileTypeIndexToName;
250  typedef std::map<std::string, TileTypeIndex> TileTypeNameToIndex;
251  TileTypeIndexToName tileTypeIndexToName;
252  TileTypeNameToIndex tileTypeNameToIndex;
253  TileTypeCount tileTypeCount = tiles.getTileTypeCount();
254  for(TileTypeIndex tileTypeIndex(0); tileTypeIndex < tileTypeCount; tileTypeIndex++) {
255  const std::string tileTypeName = tiles.getTileTypeName(tileTypeIndex);
256  tileTypeIndexToName[tileTypeIndex] = tileTypeName;
257  tileTypeNameToIndex[tileTypeName] = tileTypeIndex;
258  TileTypeNameToColumnType::iterator ttwp = mTileTypeNameToColumnType.find(tileTypeName);
259  TileTypeNameToColumnType::iterator ttwe = mTileTypeNameToColumnType.end();
260  if(ttwp != ttwe) mTileTypeIndexToColumnType[tileTypeIndex] = EColumnType(ttwp->second);
261  }
262 
263  // identify every column that contains known frames
264  columnTypes.resize(colCount);
265  uint32_t frameCount = 0;
266  for(uint32_t blockType = 0; blockType < Spartan3E::eFarBlockTypeCount; blockType++) {
267  for(TileCol col; col < colCount; col++) {
268  columnTypes[col] = eColumnTypeEmpty;
269  TileTypeIndexToColumnType::iterator ttwe = mTileTypeIndexToColumnType.end();
270  TileTypeIndexToColumnType::iterator ttwp = ttwe;
271  //Avoids catching the "CLB" column types
272  for(TileRow row(8); row < rowCount-6; row++) {
273  // look up the tile info
274  const torc::architecture::TileInfo& tileInfo
275  = tiles.getTileInfo(tiles.getTileIndex(row, col));
276  TileTypeIndex tileTypeIndex = tileInfo.getTypeIndex();
277  // determine whether the tile type widths are defined
278  ttwp = mTileTypeIndexToColumnType.find(tileTypeIndex);
279  if(ttwp != ttwe) {
280  uint32_t width = mColumnDefs[ttwp->second][blockType];
281  frameCount += width;
282  //std::cout << " " << tiles.getTileTypeName(tileInfo.getTypeIndex())
283  // << ": " << width << " (" << frameCount << ")" << std::endl;
284  columnTypes[col] = static_cast<EColumnType>(ttwp->second);
285  break;
286  }
287  }
288  }
289  //std::cout << std::endl;
290  if(blockType == 2) break;
291  }
292 
294  boost::filesystem::path generatedMap = workingPath / (inDeviceName + ".map.csv");
295  std::fstream tilemapStream(generatedMap.string().c_str(), std::ios::out);
296  for(TileRow row; row < rowCount; row++) {
297  for(TileCol col; col < colCount; col++) {
298  const torc::architecture::TileInfo& tileInfo
299  = tiles.getTileInfo(tiles.getTileIndex(row, col));
300  TileTypeIndex tileTypeIndex = tileInfo.getTypeIndex();
301  tilemapStream << tiles.getTileTypeName(tileTypeIndex);
302  if(col + 1 < colCount) tilemapStream << ",";
303  }
304  tilemapStream << std::endl;
305  }
306  tilemapStream.close();
307 
308  // update bitstream device information
309  setDeviceInfo(DeviceInfo(tileCount, rowCount, colCount, columnTypes));
310  }
311 #endif
312 
314 
315  uint32_t frameCount = 0;
316  uint32_t frameIndex = 0;
317  bool clockColumn = true;
318  uint32_t width;
319  for(uint32_t i = 0; i < Spartan3E::eFarBlockTypeCount; i++) {
321  //Set first frame index to 0
322  uint32_t bitIndex = 0;
323  uint32_t xdlIndex = 0;
324  mBitColumnIndexes[i].push_back(bitIndex);
325  mXdlColumnIndexes[i].push_back(xdlIndex);
326  // build the columns
327  uint32_t farMajor = 0;
329  if(clockColumn) {
330  if(mDeviceInfo.getColCount() > 41)
331  width = mColumnDefs[eColumnTypeClockLL][i];
332  else
333  width = mColumnDefs[eColumnTypeClock][i];
334  clockColumn = false;
335  for(uint32_t farMinor = 0; farMinor < width; farMinor++) {
336  Spartan3E::FrameAddress far(blockType, farMajor, farMinor);
337  mFrameIndexToAddress[frameIndex] = far;
338  mFrameAddressToIndex[far] = frameIndex;
339  frameIndex++;
340  }
341  if(width > 0) farMajor++;
342  frameCount += width;
343  }
344  for(ColumnIndex col; col < mDeviceInfo.getColCount(); col++) {
347  continue;
348  else
349  {
350  width = mColumnDefs[mDeviceInfo.getColumnTypes()[col]][i];
351  //printf("Width found: %d", width);
352  }
353  for(uint32_t farMinor = 0; farMinor < width; farMinor++) {
354  Spartan3E::FrameAddress far(blockType, farMajor, farMinor);
355  mFrameIndexToAddress[frameIndex] = far;
356  mFrameAddressToIndex[far] = frameIndex;
357  frameIndex++;
358  }
359  if(width > 0) farMajor++;
360  frameCount += width;
361 
362  //Indexes for Bitstream Columns, only stores non-empty tile types
364  bitIndex += width;
365  mBitColumnIndexes[i].push_back(bitIndex);
366  }
367  //Indexes for XDL Columns, stores interconnect and tile indexes for
368  //non-empty tiles
369  xdlIndex += width;
370  mXdlColumnIndexes[i].push_back(xdlIndex);
371  }
372  }
373 
374  //Test to check proper indexing
375  bool debug = false;
376  if(debug) {
377  for(uint32_t i = 0; i < Spartan3E::eFarBlockTypeCount; i++) {
378  for(uint32_t j = 0; j < mBitColumnIndexes[i].size(); j++)
379  std::cout << "Bit Value at index: (" << i << ", " << j << ") : " << mBitColumnIndexes[i][j] << std::endl;
380  for(uint32_t k = 0; k < mXdlColumnIndexes[i].size(); k++)
381  std::cout << "Xdl Value at index: (" << i << ", " << k << ") : " << mXdlColumnIndexes[i][k] << std::endl;
382  }
383  }
384  }
385 
386 
387 
388 } // namespace bitstream
389 } // namespace torc
EColumnType
Major column types.
Definition: Spartan3E.hpp:78
static const char * sOpcodeName[eOpcodeCount]
Packet opcode names.
Definition: Spartan3E.hpp:87
ColumnDefVector mColumnDefs
Column type widths.
static const Subfield sMASK[]
Control Mask Register (MASK) subfields.
Definition: Spartan3E.hpp:99
Encapsulation of a tile row in an unsigned 16-bit integer.
FrameIndexToAddress mFrameIndexToAddress
Map of frame indexes to frame addresses.
Definition: Spartan3E.hpp:193
FrameAddressToIndex mFrameAddressToIndex
Map of frame addressee to frame indexes.
Definition: Spartan3E.hpp:195
TileTypeNameToColumnType mTileTypeNameToColumnType
static const char * sRegisterName[eRegisterCount]
Configuration register names.
Definition: Spartan3E.hpp:89
Encapsulation of a tile column in an unsigned 16-bit integer.
#define VALUES
Definition: Spartan3E.cpp:50
Device database, including complete wiring and logic support.
Definition: DDB.hpp:42
TileTypeCount getTileTypeCount(void) const
Returns the tile type count for this device.
Definition: Tiles.hpp:151
TileRow getRowCount(void) const
Returns the row count for this device.
Definition: Tiles.hpp:153
static const char * sCommandName[eCommandCount]
Configuration command names.
Definition: Spartan3E.hpp:91
Header for the DirectoryTree class.
static const Subfield sCTL[]
Control Register (CTL) subfields.
Definition: Spartan3E.hpp:97
const TileInfo & getTileInfo(TileIndex inTileIndex) const
Returns the TileInfo object for the specified tile.
Definition: Tiles.hpp:137
static const char * sPacketTypeName[ePacketTypeCount]
Packet type names.
Definition: Spartan3E.hpp:85
TileTypeIndexToColumnType mTileTypeIndexToColumnType
Static device information class for Xilinx bitstreams. This class facilitates the creation of frame ...
Definition: DeviceInfo.hpp:75
uint16_t getColCount(void) const
Returns the column count.
Definition: DeviceInfo.hpp:114
TileCount getTileCount(void) const
Returns the tile count for this device.
Definition: Tiles.hpp:149
EDevice mDevice
Bitstream device enumeration.
virtual void initializeFrameMaps(void)
Initialize the maps between frame indexes and frame addresses. This is generally only useful for int...
Definition: Spartan3E.cpp:313
std::string string
DeviceInfo xc3s1200e
boost::uint32_t uint32_t
Imported type name.
DeviceInfo xc3s100e
static const Subfield sCOR[]
Configuration Options Register (COR) subfields.
Definition: Spartan3E.hpp:93
DeviceInfo xc3s500e
DeviceInfo mDeviceInfo
Device information.
Tile map, tile type, and wire information for the family and device.
Definition: Tiles.hpp:36
Encapsulation of a tile count in an unsigned 32-bit integer.
Encapsulation of a tile within a device tile map.
Definition: TileInfo.hpp:33
const char * getTileTypeName(TileTypeIndex inTileTypeIndex) const
Returns the tile type name for the given tile type index.
Definition: Tiles.hpp:164
const ColumnTypeVector & getColumnTypes(void) const
Returns the column type vector.
Definition: DeviceInfo.hpp:116
boost::filesystem::path path
const TileTypeIndex & getTypeIndex(void) const
Returns the tile type index for this tile.
Definition: TileInfo.hpp:92
virtual void initializeDeviceInfo(const std::string &inDeviceName)
Initialize the device information.
Definition: Spartan3E.cpp:218
static uint32_t makeSubfield(ERegister inRegister, const std::string &inSubfield, const std::string &inSetting)
Return the masked value for a subfield of the specified register.
Definition: Spartan3E.cpp:186
static const boost::filesystem::path & getWorkingPath(void)
Returns the absolute path to the working directory.
Encapsulation of a tile type count in an unsigned 16-bit integer.
static const Subfield sSTAT[]
Status Register (STAT) subfields.
Definition: Spartan3E.hpp:95
TileCol getColCount(void) const
Returns the column count for this device.
Definition: Tiles.hpp:155
Encapsulation of a tile type index in an unsigned 16-bit integer.
boost::uint16_t uint16_t
Imported type name.
Header for the DDB class.
EFarBlockType
Frame Address Register block type constants.
Definition: Spartan3E.hpp:73
DeviceInfo xc3s1600e
Template base for encapsulated integers, to enforce strong typing.
Header for the Spartan3E class.
boost::uint32_t uint32_t
Imported type name.
Definition: Spartan3E.hpp:46
void setDeviceInfo(const DeviceInfo &rhs)
Assign static device information for the current bitstream.
ColumnIndexVector mBitColumnIndexes[Spartan3E::eFarBlockTypeCount]
Vector to store frame indexes of XDL columns.
Definition: Spartan3E.hpp:197
const char ** mValues
The allowable subfield values.
ERegister
Configuration register enumeration.
Definition: Spartan3E.hpp:52
ColumnIndexVector mXdlColumnIndexes[Spartan3E::eFarBlockTypeCount]
Vector to store frame indexes of Bitstream columns.
Definition: Spartan3E.hpp:199
TileIndex getTileIndex(TileRow inRow, TileCol inCol) const
Returns the tile index for the given [row,column] pair.
Definition: Tiles.hpp:161
DeviceInfo xc3s250e
Device database types for Xilinx architectures.