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resSim_old.c
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1 /**CFile****************************************************************
2 
3  FileName [resSim.c]
4 
5  SystemName [ABC: Logic synthesis and verification system.]
6 
7  PackageName [Resynthesis package.]
8 
9  Synopsis [Simulation engine.]
10 
11  Author [Alan Mishchenko]
12 
13  Affiliation [UC Berkeley]
14 
15  Date [Ver. 1.0. Started - January 15, 2007.]
16 
17  Revision [$Id: resSim.c,v 1.00 2007/01/15 00:00:00 alanmi Exp $]
18 
19 ***********************************************************************/
20 
21 #include "base/abc/abc.h"
22 #include "resInt.h"
23 
24 ABC_NAMESPACE_IMPL_START
25 
26 
27 ////////////////////////////////////////////////////////////////////////
28 /// DECLARATIONS ///
29 ////////////////////////////////////////////////////////////////////////
30 
31 ////////////////////////////////////////////////////////////////////////
32 /// FUNCTION DEFINITIONS ///
33 ////////////////////////////////////////////////////////////////////////
34 
35 /**Function*************************************************************
36 
37  Synopsis [Allocate simulation engine.]
38 
39  Description []
40 
41  SideEffects []
42 
43  SeeAlso []
44 
45 ***********************************************************************/
46 Res_Sim_t * Res_SimAlloc( int nWords )
47 {
48  Res_Sim_t * p;
49  p = ALLOC( Res_Sim_t, 1 );
50  memset( p, 0, sizeof(Res_Sim_t) );
51  // simulation parameters
52  p->nWords = nWords;
53  p->nPats = 8 * sizeof(unsigned) * p->nWords;
54  p->nWordsOut = p->nPats * p->nWords;
55  p->nPatsOut = p->nPats * p->nPats;
56  // simulation info
57  p->vPats = Vec_PtrAllocSimInfo( 1024, p->nWords );
58  p->vPats0 = Vec_PtrAllocSimInfo( 128, p->nWords );
59  p->vPats1 = Vec_PtrAllocSimInfo( 128, p->nWords );
60  p->vOuts = Vec_PtrAllocSimInfo( 128, p->nWordsOut );
61  // resub candidates
62  p->vCands = Vec_VecStart( 16 );
63  return p;
64 }
65 
66 /**Function*************************************************************
67 
68  Synopsis [Allocate simulation engine.]
69 
70  Description []
71 
72  SideEffects []
73 
74  SeeAlso []
75 
76 ***********************************************************************/
77 void Res_SimAdjust( Res_Sim_t * p, Abc_Ntk_t * pAig )
78 {
79  srand( 0xABC );
80 
81  assert( Abc_NtkIsStrash(pAig) );
82  p->pAig = pAig;
83  if ( Vec_PtrSize(p->vPats) < Abc_NtkObjNumMax(pAig)+1 )
84  {
85  Vec_PtrFree( p->vPats );
86  p->vPats = Vec_PtrAllocSimInfo( Abc_NtkObjNumMax(pAig)+1, p->nWords );
87  }
88  if ( Vec_PtrSize(p->vPats0) < Abc_NtkPiNum(pAig) )
89  {
90  Vec_PtrFree( p->vPats0 );
91  p->vPats0 = Vec_PtrAllocSimInfo( Abc_NtkPiNum(pAig), p->nWords );
92  }
93  if ( Vec_PtrSize(p->vPats1) < Abc_NtkPiNum(pAig) )
94  {
95  Vec_PtrFree( p->vPats1 );
96  p->vPats1 = Vec_PtrAllocSimInfo( Abc_NtkPiNum(pAig), p->nWords );
97  }
98  if ( Vec_PtrSize(p->vOuts) < Abc_NtkPoNum(pAig) )
99  {
100  Vec_PtrFree( p->vOuts );
101  p->vOuts = Vec_PtrAllocSimInfo( Abc_NtkPoNum(pAig), p->nWordsOut );
102  }
103  // clean storage info for patterns
104  Abc_InfoClear( Vec_PtrEntry(p->vPats0,0), p->nWords * Abc_NtkPiNum(pAig) );
105  Abc_InfoClear( Vec_PtrEntry(p->vPats1,0), p->nWords * Abc_NtkPiNum(pAig) );
106  p->nPats0 = 0;
107  p->nPats1 = 0;
108 }
109 
110 /**Function*************************************************************
111 
112  Synopsis [Free simulation engine.]
113 
114  Description []
115 
116  SideEffects []
117 
118  SeeAlso []
119 
120 ***********************************************************************/
121 void Res_SimFree( Res_Sim_t * p )
122 {
123  Vec_PtrFree( p->vPats );
124  Vec_PtrFree( p->vPats0 );
125  Vec_PtrFree( p->vPats1 );
126  Vec_PtrFree( p->vOuts );
127  Vec_VecFree( p->vCands );
128  free( p );
129 }
130 
131 
132 /**Function*************************************************************
133 
134  Synopsis [Sets random PI simulation info.]
135 
136  Description []
137 
138  SideEffects []
139 
140  SeeAlso []
141 
142 ***********************************************************************/
143 void Res_SimSetRandom( Res_Sim_t * p )
144 {
145  Abc_Obj_t * pObj;
146  unsigned * pInfo;
147  int i;
148  Abc_NtkForEachPi( p->pAig, pObj, i )
149  {
150  pInfo = Vec_PtrEntry( p->vPats, pObj->Id );
151  Abc_InfoRandom( pInfo, p->nWords );
152  }
153 }
154 
155 /**Function*************************************************************
156 
157  Synopsis [Sets given PI simulation info.]
158 
159  Description []
160 
161  SideEffects []
162 
163  SeeAlso []
164 
165 ***********************************************************************/
166 void Res_SimSetGiven( Res_Sim_t * p, Vec_Ptr_t * vInfo )
167 {
168  Abc_Obj_t * pObj;
169  unsigned * pInfo, * pInfo2;
170  int i, w;
171  Abc_NtkForEachPi( p->pAig, pObj, i )
172  {
173  pInfo = Vec_PtrEntry( p->vPats, pObj->Id );
174  pInfo2 = Vec_PtrEntry( vInfo, i );
175  for ( w = 0; w < p->nWords; w++ )
176  pInfo[w] = pInfo2[w];
177  }
178 }
179 
180 /**Function*************************************************************
181 
182  Synopsis [Simulates one node.]
183 
184  Description []
185 
186  SideEffects []
187 
188  SeeAlso []
189 
190 ***********************************************************************/
191 void Res_SimPerformOne( Abc_Obj_t * pNode, Vec_Ptr_t * vSimInfo, int nSimWords )
192 {
193  unsigned * pInfo, * pInfo1, * pInfo2;
194  int k, fComp1, fComp2;
195  // simulate the internal nodes
196  assert( Abc_ObjIsNode(pNode) );
197  pInfo = Vec_PtrEntry(vSimInfo, pNode->Id);
198  pInfo1 = Vec_PtrEntry(vSimInfo, Abc_ObjFaninId0(pNode));
199  pInfo2 = Vec_PtrEntry(vSimInfo, Abc_ObjFaninId1(pNode));
200  fComp1 = Abc_ObjFaninC0(pNode);
201  fComp2 = Abc_ObjFaninC1(pNode);
202  if ( fComp1 && fComp2 )
203  for ( k = 0; k < nSimWords; k++ )
204  pInfo[k] = ~pInfo1[k] & ~pInfo2[k];
205  else if ( fComp1 && !fComp2 )
206  for ( k = 0; k < nSimWords; k++ )
207  pInfo[k] = ~pInfo1[k] & pInfo2[k];
208  else if ( !fComp1 && fComp2 )
209  for ( k = 0; k < nSimWords; k++ )
210  pInfo[k] = pInfo1[k] & ~pInfo2[k];
211  else // if ( fComp1 && fComp2 )
212  for ( k = 0; k < nSimWords; k++ )
213  pInfo[k] = pInfo1[k] & pInfo2[k];
214 }
215 
216 /**Function*************************************************************
217 
218  Synopsis [Simulates one CO node.]
219 
220  Description []
221 
222  SideEffects []
223 
224  SeeAlso []
225 
226 ***********************************************************************/
227 void Res_SimTransferOne( Abc_Obj_t * pNode, Vec_Ptr_t * vSimInfo, int nSimWords )
228 {
229  unsigned * pInfo, * pInfo1;
230  int k, fComp1;
231  // simulate the internal nodes
232  assert( Abc_ObjIsCo(pNode) );
233  pInfo = Vec_PtrEntry(vSimInfo, pNode->Id);
234  pInfo1 = Vec_PtrEntry(vSimInfo, Abc_ObjFaninId0(pNode));
235  fComp1 = Abc_ObjFaninC0(pNode);
236  if ( fComp1 )
237  for ( k = 0; k < nSimWords; k++ )
238  pInfo[k] = ~pInfo1[k];
239  else
240  for ( k = 0; k < nSimWords; k++ )
241  pInfo[k] = pInfo1[k];
242 }
243 
244 /**Function*************************************************************
245 
246  Synopsis [Performs one round of simulation.]
247 
248  Description []
249 
250  SideEffects []
251 
252  SeeAlso []
253 
254 ***********************************************************************/
255 void Res_SimPerformRound( Res_Sim_t * p )
256 {
257  Abc_Obj_t * pObj;
258  int i;
259  Abc_InfoFill( Vec_PtrEntry(p->vPats,0), p->nWords );
260  Abc_AigForEachAnd( p->pAig, pObj, i )
261  Res_SimPerformOne( pObj, p->vPats, p->nWords );
262  Abc_NtkForEachPo( p->pAig, pObj, i )
263  Res_SimTransferOne( pObj, p->vPats, p->nWords );
264 }
265 
266 /**Function*************************************************************
267 
268  Synopsis [Processes simulation patterns.]
269 
270  Description []
271 
272  SideEffects []
273 
274  SeeAlso []
275 
276 ***********************************************************************/
277 void Res_SimProcessPats( Res_Sim_t * p )
278 {
279  Abc_Obj_t * pObj;
280  unsigned * pInfoCare, * pInfoNode;
281  int i, j, nDcs = 0;
282  pInfoCare = Vec_PtrEntry( p->vPats, Abc_NtkPo(p->pAig, 0)->Id );
283  pInfoNode = Vec_PtrEntry( p->vPats, Abc_NtkPo(p->pAig, 1)->Id );
284  for ( i = 0; i < p->nPats; i++ )
285  {
286  // skip don't-care patterns
287  if ( !Abc_InfoHasBit(pInfoCare, i) )
288  {
289  nDcs++;
290  continue;
291  }
292  // separate offset and onset patterns
293  if ( !Abc_InfoHasBit(pInfoNode, i) )
294  {
295  if ( p->nPats0 >= p->nPats )
296  continue;
297  Abc_NtkForEachPi( p->pAig, pObj, j )
298  if ( Abc_InfoHasBit( Vec_PtrEntry(p->vPats, pObj->Id), i ) )
299  Abc_InfoSetBit( Vec_PtrEntry(p->vPats0, j), p->nPats0 );
300  p->nPats0++;
301  }
302  else
303  {
304  if ( p->nPats1 >= p->nPats )
305  continue;
306  Abc_NtkForEachPi( p->pAig, pObj, j )
307  if ( Abc_InfoHasBit( Vec_PtrEntry(p->vPats, pObj->Id), i ) )
308  Abc_InfoSetBit( Vec_PtrEntry(p->vPats1, j), p->nPats1 );
309  p->nPats1++;
310  }
311  }
312 }
313 
314 /**Function*************************************************************
315 
316  Synopsis [Pads the extra space with duplicated simulation info.]
317 
318  Description []
319 
320  SideEffects []
321 
322  SeeAlso []
323 
324 ***********************************************************************/
325 void Res_SimPadSimInfo( Vec_Ptr_t * vPats, int nPats, int nWords )
326 {
327  unsigned * pInfo;
328  int i, w, iWords;
329  assert( nPats > 0 && nPats < nWords * 8 * (int) sizeof(unsigned) );
330  // pad the first word
331  if ( nPats < 8 * sizeof(unsigned) )
332  {
333  Vec_PtrForEachEntry( unsigned *, vPats, pInfo, i )
334  if ( pInfo[0] & 1 )
335  pInfo[0] |= ((~0) << nPats);
336  nPats = 8 * sizeof(unsigned);
337  }
338  // pad the empty words
339  iWords = nPats / (8 * sizeof(unsigned));
340  Vec_PtrForEachEntry( unsigned *, vPats, pInfo, i )
341  {
342  for ( w = iWords; w < nWords; w++ )
343  pInfo[w] = pInfo[0];
344  }
345 }
346 
347 /**Function*************************************************************
348 
349  Synopsis [Duplicates the simulation info to fill the space.]
350 
351  Description []
352 
353  SideEffects []
354 
355  SeeAlso []
356 
357 ***********************************************************************/
358 void Res_SimDeriveInfoReplicate( Res_Sim_t * p )
359 {
360  unsigned * pInfo, * pInfo2;
361  Abc_Obj_t * pObj;
362  int i, j, w;
363  Abc_NtkForEachPo( p->pAig, pObj, i )
364  {
365  pInfo = Vec_PtrEntry( p->vPats, pObj->Id );
366  pInfo2 = Vec_PtrEntry( p->vOuts, i );
367  for ( j = 0; j < p->nPats; j++ )
368  for ( w = 0; w < p->nWords; w++ )
369  *pInfo2++ = pInfo[w];
370  }
371 }
372 
373 /**Function*************************************************************
374 
375  Synopsis [Complement the simulation info if necessary.]
376 
377  Description []
378 
379  SideEffects []
380 
381  SeeAlso []
382 
383 ***********************************************************************/
384 void Res_SimDeriveInfoComplement( Res_Sim_t * p )
385 {
386  unsigned * pInfo, * pInfo2;
387  Abc_Obj_t * pObj;
388  int i, j, w;
389  Abc_NtkForEachPo( p->pAig, pObj, i )
390  {
391  pInfo = Vec_PtrEntry( p->vPats, pObj->Id );
392  pInfo2 = Vec_PtrEntry( p->vOuts, i );
393  for ( j = 0; j < p->nPats; j++, pInfo2 += p->nWords )
394  if ( Abc_InfoHasBit( pInfo, j ) )
395  for ( w = 0; w < p->nWords; w++ )
396  pInfo2[w] = ~pInfo2[w];
397  }
398 }
399 
400 /**Function*************************************************************
401 
402  Synopsis [Free simulation engine.]
403 
404  Description []
405 
406  SideEffects []
407 
408  SeeAlso []
409 
410 ***********************************************************************/
411 void Res_SimReportOne( Res_Sim_t * p )
412 {
413  unsigned * pInfoCare, * pInfoNode;
414  int i, nDcs, nOnes, nZeros;
415  pInfoCare = Vec_PtrEntry( p->vPats, Abc_NtkPo(p->pAig, 0)->Id );
416  pInfoNode = Vec_PtrEntry( p->vPats, Abc_NtkPo(p->pAig, 1)->Id );
417  nDcs = nOnes = nZeros = 0;
418  for ( i = 0; i < p->nPats; i++ )
419  {
420  // skip don't-care patterns
421  if ( !Abc_InfoHasBit(pInfoCare, i) )
422  {
423  nDcs++;
424  continue;
425  }
426  // separate offset and onset patterns
427  if ( !Abc_InfoHasBit(pInfoNode, i) )
428  nZeros++;
429  else
430  nOnes++;
431  }
432  printf( "On = %3d (%7.2f %%) ", nOnes, 100.0*nOnes/p->nPats );
433  printf( "Off = %3d (%7.2f %%) ", nZeros, 100.0*nZeros/p->nPats );
434  printf( "Dc = %3d (%7.2f %%) ", nDcs, 100.0*nDcs/p->nPats );
435  printf( "P0 = %3d ", p->nPats0 );
436  printf( "P1 = %3d ", p->nPats1 );
437  if ( p->nPats0 < 4 || p->nPats1 < 4 )
438  printf( "*" );
439  printf( "\n" );
440 }
441 
442 /**Function*************************************************************
443 
444  Synopsis [Prints output patterns.]
445 
446  Description []
447 
448  SideEffects []
449 
450  SeeAlso []
451 
452 ***********************************************************************/
453 void Res_SimPrintOutPatterns( Res_Sim_t * p, Abc_Ntk_t * pAig )
454 {
455  Abc_Obj_t * pObj;
456  unsigned * pInfo2;
457  int i;
458  Abc_NtkForEachPo( pAig, pObj, i )
459  {
460  pInfo2 = Vec_PtrEntry( p->vOuts, i );
461  Extra_PrintBinary( stdout, pInfo2, p->nPatsOut );
462  printf( "\n" );
463  }
464 }
465 
466 /**Function*************************************************************
467 
468  Synopsis [Prepares simulation info for candidate filtering.]
469 
470  Description []
471 
472  SideEffects []
473 
474  SeeAlso []
475 
476 ***********************************************************************/
477 int Res_SimPrepare( Res_Sim_t * p, Abc_Ntk_t * pAig, int nTruePis, int fVerbose )
478 {
479  int Limit;
480  // prepare the manager
481  Res_SimAdjust( p, pAig );
482  // collect 0/1 simulation info
483  for ( Limit = 0; Limit < 10; Limit++ )
484  {
485  Res_SimSetRandom( p );
486  Res_SimPerformRound( p );
487  Res_SimProcessPats( p );
488  if ( !(p->nPats0 < p->nPats || p->nPats1 < p->nPats) )
489  break;
490  }
491 // printf( "%d ", Limit );
492  // report the last set of patterns
493 // Res_SimReportOne( p );
494 // printf( "\n" );
495  // quit if there is not enough
496 // if ( p->nPats0 < 4 || p->nPats1 < 4 )
497  if ( p->nPats0 < 4 || p->nPats1 < 4 )
498  {
499 // Res_SimReportOne( p );
500  return 0;
501  }
502  // create bit-matrix info
503  if ( p->nPats0 < p->nPats )
504  Res_SimPadSimInfo( p->vPats0, p->nPats0, p->nWords );
505  if ( p->nPats1 < p->nPats )
506  Res_SimPadSimInfo( p->vPats1, p->nPats1, p->nWords );
507  // resimulate 0-patterns
508  Res_SimSetGiven( p, p->vPats0 );
509  Res_SimPerformRound( p );
510  Res_SimDeriveInfoReplicate( p );
511  // resimulate 1-patterns
512  Res_SimSetGiven( p, p->vPats1 );
513  Res_SimPerformRound( p );
514  Res_SimDeriveInfoComplement( p );
515  // print output patterns
516 // Res_SimPrintOutPatterns( p, pAig );
517  return 1;
518 }
519 
520 ////////////////////////////////////////////////////////////////////////
521 /// END OF FILE ///
522 ////////////////////////////////////////////////////////////////////////
523 
524 
525 ABC_NAMESPACE_IMPL_END
526 
memset
char * memset()
Res_SimReportOne
void Res_SimReportOne(Res_Sim_t *p)
Definition: resSim_old.c:411
Abc_NtkIsStrash
static int Abc_NtkIsStrash(Abc_Ntk_t *pNtk)
Definition: abc.h:251
Res_Sim_t_::nWordsOut
int nWordsOut
Definition: resInt.h:82
Res_SimTransferOne
void Res_SimTransferOne(Abc_Obj_t *pNode, Vec_Ptr_t *vSimInfo, int nSimWords)
Definition: resSim_old.c:227
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typedefABC_NAMESPACE_HEADER_START struct Vec_Ptr_t_ Vec_Ptr_t
INCLUDES ///.
Definition: vecPtr.h:42
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VOID_HACK free()
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p
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static int Abc_ObjFaninC1(Abc_Obj_t *pObj)
Definition: abc.h:378
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static int Abc_InfoHasBit(unsigned *p, int i)
Definition: abc_global.h:258
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void Res_SimSetRandom(Res_Sim_t *p)
Definition: resSim_old.c:143
Res_Sim_t_::vPats0
Vec_Ptr_t * vPats0
Definition: resInt.h:86
Abc_Ntk_t_
Definition: abc.h:153
Res_SimAdjust
void Res_SimAdjust(Res_Sim_t *p, Abc_Ntk_t *pAig)
Definition: resSim_old.c:77
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void Res_SimSetGiven(Res_Sim_t *p, Vec_Ptr_t *vInfo)
Definition: resSim_old.c:166
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static void Abc_InfoFill(unsigned *p, int nWords)
Definition: abc.h:237
Abc_ObjFaninC0
static int Abc_ObjFaninC0(Abc_Obj_t *pObj)
Definition: abc.h:377
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static int Vec_PtrSize(Vec_Ptr_t *p)
Definition: vecPtr.h:295
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static int Abc_ObjFaninId0(Abc_Obj_t *pObj)
Definition: abc.h:367
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Vec_Vec_t * vCands
Definition: resInt.h:92
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static int Abc_ObjIsCo(Abc_Obj_t *pObj)
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Definition: abc.h:485
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static int Abc_ObjIsNode(Abc_Obj_t *pObj)
Definition: abc.h:355
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void Res_SimFree(Res_Sim_t *p)
Definition: resSim_old.c:121
Res_SimDeriveInfoReplicate
void Res_SimDeriveInfoReplicate(Res_Sim_t *p)
Definition: resSim_old.c:358
ALLOC
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Definition: resInt.h:72
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Definition: resSim_old.c:277
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Definition: resInt.h:90
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Definition: resSim_old.c:453
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ABC_NAMESPACE_IMPL_START Res_Sim_t * Res_SimAlloc(int nWords)
DECLARATIONS ///.
Definition: resSim_old.c:46
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Definition: resInt.h:85
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Definition: resSim_old.c:384
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Definition: resSim_old.c:255
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Definition: resSim_old.c:191
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Definition: util_old.h:213
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void Res_SimPadSimInfo(Vec_Ptr_t *vPats, int nPats, int nWords)
Definition: resSim_old.c:325
Abc_InfoRandom
static void Abc_InfoRandom(unsigned *p, int nWords)
Definition: abc.h:235
Abc_ObjFaninId1
static int Abc_ObjFaninId1(Abc_Obj_t *pObj)
Definition: abc.h:368
Abc_NtkForEachPo
#define Abc_NtkForEachPo(pNtk, pPo, i)
Definition: abc.h:517
Res_Sim_t_::nPats0
int nPats0
Definition: resInt.h:89
Vec_PtrForEachEntry
#define Vec_PtrForEachEntry(Type, vVec, pEntry, i)
MACRO DEFINITIONS ///.
Definition: vecPtr.h:55
Res_Sim_t_::nPats
int nPats
Definition: resInt.h:78
Res_Sim_t_::nPatsOut
int nPatsOut
Definition: resInt.h:83
Vec_PtrAllocSimInfo
static Vec_Ptr_t * Vec_PtrAllocSimInfo(int nEntries, int nWords)
Definition: vecPtr.h:929
Abc_NtkForEachPi
#define Abc_NtkForEachPi(pNtk, pPi, i)
Definition: abc.h:513
Vec_PtrFree
static void Vec_PtrFree(Vec_Ptr_t *p)
Definition: vecPtr.h:223