22 #include "aig/ssw/ssw.h"
49 for ( w = p->nWords-1; w >= 0; w-- )
67 for ( w = p->nWords-1; w >= 0; w-- )
85 for ( w = p->nWords-1; w >= 0; w-- )
105 for ( w = p->nWords-1; w >= 0; w-- )
123 for ( w = p->nWords-1; w >= 0; w-- )
124 pInfo[w] = pInfo0[w];
140 unsigned * pInfo =
Fsim_SimData( p, iNode % p->nFront );
143 for ( w = p->nWords-1; w >= 0; w-- )
144 pInfo[w] = pInfo0[w];
164 for ( w = p->nWords-1; w >= 0; w-- )
165 pInfo[w] = ~pInfo0[w];
167 for ( w = p->nWords-1; w >= 0; w-- )
168 pInfo[w] = pInfo0[w];
184 unsigned * pInfo =
Fsim_SimData( p, iNode % p->nFront );
189 for ( w = p->nWords-1; w >= 0; w-- )
190 pInfo[w] = ~(pInfo0[w] | pInfo1[w]);
192 for ( w = p->nWords-1; w >= 0; w-- )
193 pInfo[w] = ~pInfo0[w] & pInfo1[w];
195 for ( w = p->nWords-1; w >= 0; w-- )
196 pInfo[w] = pInfo0[w] & ~pInfo1[w];
198 for ( w = p->nWords-1; w >= 0; w-- )
199 pInfo[w] = pInfo0[w] & pInfo1[w];
218 if ( iPioNum < p->nPis )
241 if ( iPioNum < p->nPis )
262 for ( i = 0; (ch = *p->pDataCur++) & 0x80; i++ )
263 x |= (ch & 0x7f) << (7 * i);
264 assert( p->pDataCur - p->pDataAig < p->nDataAig );
265 return x | (ch << (7 * i));
282 if ( (iValue & 3) == 3 )
284 pObj->iNode = (iValue >> 2) + p->iNodePrev;
287 p->iNodePrev = pObj->iNode;
289 else if ( (iValue & 3) == 1 )
291 pObj->iNode = (iValue >> 2) + p->iNodePrev;
294 p->iNodePrev = pObj->iNode;
299 pObj->iFan0 = ((p->iNodePrev << 1) | 1) - (iValue >> 1);
319 int i, iCis = 0, iCos = 0;
324 if ( pObj->iFan0 == 0 )
326 else if ( pObj->iFan1 == 0 )
331 assert( iCis == p->nCis );
332 assert( iCos == p->nCos );
349 int iCis = 0, iCos = 0;
350 if ( p->pDataAig2 == NULL )
357 pCur = p->pDataAig2 + 6;
358 pEnd = p->pDataAig2 + 3 * p->nObjs;
359 while ( pCur < pEnd )
363 else if ( pCur[2] == 0 )
369 assert( iCis == p->nCis );
370 assert( iCos == p->nCos );
388 clock_t clk = clock();
409 for ( i = 0; i < p->nPos; i++ )
445 for ( f = 0; f <= iFrame; f++, Counter += p->nPis )
446 for ( i = 0; i < Aig_ManPiNum(pAig); i++ )
449 if ( iPioId >= p->nPis )
451 for ( w = nWords-1; w >= 0; w-- )
453 if ( Aig_InfoHasBit( pData, iPat ) )
454 Aig_InfoSetBit( p->pData, Counter + iPioId );
476 clock_t clk, clkTotal = clock(), clk2, clk2Total = 0;
481 if ( Status.nSat > 0 )
483 printf(
"Miter is trivially satisfiable (output %d).\n", Status.iOut );
486 if ( Status.nUndec == 0 )
488 printf(
"Miter is trivially unsatisfiable.\n" );
495 p->nWords = pPars->
nWords;
498 printf(
"Obj = %8d (%8d). Cut = %6d. Front = %6d. FrtMem = %7.2f MB. ",
499 p->nObjs, p->nCis + p->nNodes, p->nCrossCutMax, p->nFront,
500 4.0*p->nWords*(p->nFront)/(1<<20) );
501 ABC_PRT(
"Time", clock() - clk );
508 printf(
"Max ID = %8d. Log max ID = %2d. AigMem = %7.2f MB (%5.2f byte/obj). ",
509 p->iNumber, Aig_Base2Log(p->iNumber),
510 1.0*(p->pDataCur-p->pDataAig)/(1<<20),
511 1.0*(p->pDataCur-p->pDataAig)/p->nObjs );
512 ABC_PRT(
"Time", clock() - clk );
516 assert( p->pDataSim == NULL );
517 p->pDataSim =
ABC_ALLOC(
unsigned, p->nWords * p->nFront );
518 p->pDataSimCis =
ABC_ALLOC(
unsigned, p->nWords * p->nCis );
519 p->pDataSimCos =
ABC_ALLOC(
unsigned, p->nWords * p->nCos );
521 for ( i = 0; i < pPars->
nIters; i++ )
526 printf(
"Frame %4d out of %4d and timeout %3d sec. ", i+1, pPars->
nIters, pPars->
TimeLimit );
527 printf(
"Time = %7.2f sec\r", (1.0*clock()-clkTotal)/CLOCKS_PER_SEC );
531 assert( pAig->pSeqModel == NULL );
534 printf(
"Miter is satisfiable after simulation (output %d).\n", iOut );
537 if ( (clock() - clkTotal)/CLOCKS_PER_SEC >= pPars->
TimeLimit )
540 if ( i < pPars->nIters - 1 )
542 clk2Total += clock() - clk2;
544 if ( pAig->pSeqModel == NULL )
545 printf(
"No bug detected after %d frames with time limit %d seconds.\n", i+1, pPars->
TimeLimit );
548 printf(
"Maxcut = %8d. AigMem = %7.2f MB. SimMem = %7.2f MB. ",
550 p->pDataAig2? 12.0*p->nObjs/(1<<20) : 1.0*(p->pDataCur-p->pDataAig)/(1<<20),
551 4.0*p->nWords*(p->nFront+p->nCis+p->nCos)/(1<<20) );
552 ABC_PRT(
"Sim time", clock() - clkTotal );
559 return pAig->pSeqModel != NULL;
static void Fsim_ManSimulateCo(Fsim_Man_t *p, int iCo, int iFan0)
void Fsim_ManSimulateRoundTest(Fsim_Man_t *p)
static void Fsim_ManSimInfoInit(Fsim_Man_t *p)
static void Fsim_ManSimInfoZero(Fsim_Man_t *p, unsigned *pInfo)
typedefABC_NAMESPACE_HEADER_START struct Aig_Man_t_ Aig_Man_t
INCLUDES ///.
static unsigned * Fsim_SimDataCi(Fsim_Man_t *p, int i)
typedefABC_NAMESPACE_IMPL_START struct Vec_Int_t_ Vec_Int_t
DECLARATIONS ///.
ABC_NAMESPACE_IMPL_START Abc_Cex_t * Abc_CexAlloc(int nRegs, int nRealPis, int nFrames)
DECLARATIONS ///.
static void Fsim_ManSimulateRound(Fsim_Man_t *p)
static void Fsim_ManSimulateRound2(Fsim_Man_t *p)
void Fsim_ManFront(Fsim_Man_t *p, int fCompressAig)
FUNCTION DECLARATIONS ///.
#define ABC_ALLOC(type, num)
unsigned Aig_ManRandom(int fReset)
static void Fsim_ManSimInfoTransfer(Fsim_Man_t *p)
static unsigned * Fsim_SimData(Fsim_Man_t *p, int i)
static int Fsim_LitIsCompl(int Lit)
static int Fsim_Lit2Var(int Lit)
static void Fsim_ManSimulateNode(Fsim_Man_t *p, int iNode, int iFan0, int iFan1)
typedefABC_NAMESPACE_HEADER_START struct Fsim_Man_t_ Fsim_Man_t
INCLUDES ///.
static int Fsim_ManCheckPos(Fsim_Man_t *p, int *piPo, int *piPat)
static int Vec_IntEntry(Vec_Int_t *p, int i)
static int Aig_WordFindFirstBit(unsigned uWord)
typedefABC_NAMESPACE_HEADER_START struct Fsim_Obj_t_ Fsim_Obj_t
INCLUDES ///.
#define ABC_NAMESPACE_IMPL_END
void Fsim_ManDelete(Fsim_Man_t *p)
int Fsim_ManSimulate(Aig_Man_t *pAig, Fsim_ParSim_t *pPars)
Sec_MtrStatus_t Sec_MiterStatus(Aig_Man_t *p)
DECLARATIONS ///.
static int Fsim_ManRestoreObj(Fsim_Man_t *p, Fsim_Obj_t *pObj)
static void Fsim_ManSimInfoOne(Fsim_Man_t *p, unsigned *pInfo)
static Aig_Obj_t * Aig_ManConst1(Aig_Man_t *p)
#define ABC_NAMESPACE_IMPL_START
static int Fsim_ManRestoreNum(Fsim_Man_t *p)
static int Aig_ManRegNum(Aig_Man_t *p)
static ABC_NAMESPACE_IMPL_START void Fsim_ManSimInfoRandom(Fsim_Man_t *p, unsigned *pInfo)
DECLARATIONS ///.
static int Saig_ManPiNum(Aig_Man_t *p)
MACRO DEFINITIONS ///.
#define Fsim_ManForEachObj(p, pObj, i)
Abc_Cex_t * Fsim_ManGenerateCounter(Aig_Man_t *pAig, int iFrame, int iOut, int nWords, int iPat, Vec_Int_t *vCis2Ids)
Fsim_Man_t * Fsim_ManCreate(Aig_Man_t *pAig)
static void Fsim_ManSimInfoCopy(Fsim_Man_t *p, unsigned *pInfo, unsigned *pInfo0)
typedefABC_NAMESPACE_HEADER_START struct Sec_MtrStatus_t_ Sec_MtrStatus_t
INCLUDES ///.
typedefABC_NAMESPACE_HEADER_START struct Abc_Cex_t_ Abc_Cex_t
INCLUDES ///.
static int Aig_ObjRefs(Aig_Obj_t *pObj)
static void Fsim_ManSimulateCi(Fsim_Man_t *p, int iNode, int iCi)
static unsigned * Fsim_SimDataCo(Fsim_Man_t *p, int i)
#define Vec_IntForEachEntry(vVec, Entry, i)
MACRO DEFINITIONS ///.
static int Fsim_ManSimInfoIsZero(Fsim_Man_t *p, unsigned *pInfo)