abcXsim.c File Reference

#include "base/abc/abc.h"
#include "aig/gia/gia.h"

Go to the source code of this file.

Macros
#define	XVS0   ABC_INIT_ZERO
	DECLARATIONS ///. More...
#define	XVS1   ABC_INIT_ONE
#define	XVSX   ABC_INIT_DC

Functions
static void	Abc_ObjSetXsim (Abc_Obj_t *pObj, int Value)
static int	Abc_ObjGetXsim (Abc_Obj_t *pObj)
static int	Abc_XsimInv (int Value)
static int	Abc_XsimAnd (int Value0, int Value1)
static int	Abc_XsimRand2 ()
static int	Abc_XsimRand3 ()
static int	Abc_ObjGetXsimFanin0 (Abc_Obj_t *pObj)
static int	Abc_ObjGetXsimFanin1 (Abc_Obj_t *pObj)
static void	Abc_XsimPrint (FILE *pFile, int Value)
void	Abc_NtkXValueSimulate (Abc_Ntk_t *pNtk, int nFrames, int fXInputs, int fXState, int fVerbose)
	FUNCTION DEFINITIONS ///. More...
void	Abc_NtkCycleInitState (Abc_Ntk_t *pNtk, int nFrames, int fUseXval, int fVerbose)

Macro Definition Documentation

#define XVS0   ABC_INIT_ZERO

DECLARATIONS ///.

CFile****************************************************************

FileName [abcXsim.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [Network and node package.]

Synopsis [Using X-valued simulation.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - June 20, 2005.]

Revision [

Id:

abcXsim.c,v 1.00 2005/06/20 00:00:00 alanmi Exp

]

Definition at line 30 of file abcXsim.c.

#define XVS1   ABC_INIT_ONE

Definition at line 31 of file abcXsim.c.

#define XVSX   ABC_INIT_DC

Definition at line 32 of file abcXsim.c.

Function Documentation

void Abc_NtkCycleInitState	(	Abc_Ntk_t *	pNtk,
		int	nFrames,
		int	fUseXval,
		int	fVerbose
	)

Function*************************************************************

Synopsis [Cycles the circuit to create a new initial state.]

Description [Simulates the circuit with random (or ternary) input for the given number of timeframes to get a better initial state.]

SideEffects []

SeeAlso []

Definition at line 192 of file abcXsim.c.

{ 
    Abc_Obj_t * pObj;
    int i, f;
    assert( Abc_NtkIsStrash(pNtk) );
//    srand( 0x12341234 );
    Gia_ManRandom( 1 );
    // initialize the values
    Abc_ObjSetXsim( Abc_AigConst1(pNtk), XVS1 );
    Abc_NtkForEachLatch( pNtk, pObj, i )
        Abc_ObjSetXsim( Abc_ObjFanout0(pObj), Abc_LatchInit(pObj) );
    // simulate for the given number of timeframes
    for ( f = 0; f < nFrames; f++ )
    {
        Abc_NtkForEachPi( pNtk, pObj, i )
            Abc_ObjSetXsim( pObj, fUseXval? ABC_INIT_DC : Abc_XsimRand2() );
//            Abc_ObjSetXsim( pObj, ABC_INIT_ONE );
        Abc_AigForEachAnd( pNtk, pObj, i )
            Abc_ObjSetXsim( pObj, Abc_XsimAnd(Abc_ObjGetXsimFanin0(pObj), Abc_ObjGetXsimFanin1(pObj)) );
        Abc_NtkForEachCo( pNtk, pObj, i )
            Abc_ObjSetXsim( pObj, Abc_ObjGetXsimFanin0(pObj) );
        Abc_NtkForEachLatch( pNtk, pObj, i )
            Abc_ObjSetXsim( Abc_ObjFanout0(pObj), Abc_ObjGetXsim(Abc_ObjFanin0(pObj)) );
    }
    // set the final values
    Abc_NtkForEachLatch( pNtk, pObj, i )
    {
        pObj->pData = (void *)(ABC_PTRINT_T)Abc_ObjGetXsim(Abc_ObjFanout0(pObj));
//        printf( "%d", Abc_LatchIsInit1(pObj) );
    }
//    printf( "\n" );
}

void Abc_NtkXValueSimulate	(	Abc_Ntk_t *	pNtk,
		int	nFrames,
		int	fXInputs,
		int	fXState,
		int	fVerbose
	)

FUNCTION DEFINITIONS ///.

Function*************************************************************

Synopsis [Performs X-valued simulation of the sequential network.]

Description []

SideEffects []

SeeAlso []

Definition at line 111 of file abcXsim.c.

{
    Abc_Obj_t * pObj;
    int i, f;
    assert( Abc_NtkIsStrash(pNtk) );
//    srand( 0x12341234 );
    Gia_ManRandom( 1 );
    // start simulation
    Abc_ObjSetXsim( Abc_AigConst1(pNtk), XVS1 );
    if ( fXInputs )
    {
        Abc_NtkForEachPi( pNtk, pObj, i )
            Abc_ObjSetXsim( pObj, XVSX );
    }
    else
    {
        Abc_NtkForEachPi( pNtk, pObj, i )
            Abc_ObjSetXsim( pObj, Abc_XsimRand2() );
    }
    if ( fXState )
    {
        Abc_NtkForEachLatch( pNtk, pObj, i )
            Abc_ObjSetXsim( Abc_ObjFanout0(pObj), XVSX );
    }
    else
    {
        Abc_NtkForEachLatch( pNtk, pObj, i )
            Abc_ObjSetXsim( Abc_ObjFanout0(pObj), Abc_LatchInit(pObj) );
    }
    // simulate and print the result
    fprintf( stdout, "Frame : Inputs : Latches : Outputs\n" );
    for ( f = 0; f < nFrames; f++ )
    {
        Abc_AigForEachAnd( pNtk, pObj, i )
            Abc_ObjSetXsim( pObj, Abc_XsimAnd(Abc_ObjGetXsimFanin0(pObj), Abc_ObjGetXsimFanin1(pObj)) );
        Abc_NtkForEachCo( pNtk, pObj, i )
            Abc_ObjSetXsim( pObj, Abc_ObjGetXsimFanin0(pObj) );
        // print out
        fprintf( stdout, "%2d : ", f );
        Abc_NtkForEachPi( pNtk, pObj, i )
            Abc_XsimPrint( stdout, Abc_ObjGetXsim(pObj) );
        fprintf( stdout, " : " );
        Abc_NtkForEachLatch( pNtk, pObj, i )
        {
//            if ( Abc_ObjGetXsim(Abc_ObjFanout0(pObj)) != XVSX )
//                printf( " %s=", Abc_ObjName(pObj) );
            Abc_XsimPrint( stdout, Abc_ObjGetXsim(Abc_ObjFanout0(pObj)) );
        }
        fprintf( stdout, " : " );
        Abc_NtkForEachPo( pNtk, pObj, i )
            Abc_XsimPrint( stdout, Abc_ObjGetXsim(pObj) );
        fprintf( stdout, "\n" );
        // assign input values
        if ( fXInputs )
        {
            Abc_NtkForEachPi( pNtk, pObj, i )
                Abc_ObjSetXsim( pObj, XVSX );
        }
        else
        {
            Abc_NtkForEachPi( pNtk, pObj, i )
                Abc_ObjSetXsim( pObj, Abc_XsimRand2() );
        }
        // transfer the latch values
        Abc_NtkForEachLatch( pNtk, pObj, i )
            Abc_ObjSetXsim( Abc_ObjFanout0(pObj), Abc_ObjGetXsim(Abc_ObjFanin0(pObj)) );
    }
}

static int Abc_ObjGetXsim ( Abc_Obj_t *  pObj )

inlinestatic

Definition at line 35 of file abcXsim.c.

{ return (int)(ABC_PTRINT_T)pObj->pCopy;           }

static int Abc_ObjGetXsimFanin0 ( Abc_Obj_t *  pObj )

inlinestatic

Definition at line 68 of file abcXsim.c.

{ 
    int RetValue;
    RetValue = Abc_ObjGetXsim(Abc_ObjFanin0(pObj));
    return Abc_ObjFaninC0(pObj)? Abc_XsimInv(RetValue) : RetValue;
}

static int Abc_ObjGetXsimFanin1 ( Abc_Obj_t *  pObj )

inlinestatic

Definition at line 74 of file abcXsim.c.

{ 
    int RetValue;
    RetValue = Abc_ObjGetXsim(Abc_ObjFanin1(pObj));
    return Abc_ObjFaninC1(pObj)? Abc_XsimInv(RetValue) : RetValue;
}

static void Abc_ObjSetXsim ( Abc_Obj_t *  pObj, int  Value  )

inlinestatic

Definition at line 34 of file abcXsim.c.

{ pObj->pCopy = (Abc_Obj_t *)(ABC_PTRINT_T)Value;  }

static int Abc_XsimAnd ( int  Value0, int  Value1  )

inlinestatic

Definition at line 45 of file abcXsim.c.

{ 
    if ( Value0 == XVS0 || Value1 == XVS0 )
        return XVS0;
    if ( Value0 == XVSX || Value1 == XVSX )
        return XVSX;
    assert( Value0 == XVS1 && Value1 == XVS1 );
    return XVS1;
}

static int Abc_XsimInv ( int  Value )

inlinestatic

Definition at line 36 of file abcXsim.c.

{ 
    if ( Value == XVS0 )
        return XVS1;
    if ( Value == XVS1 )
        return XVS0;
    assert( Value == XVSX );       
    return XVSX;
}

static void Abc_XsimPrint ( FILE *  pFile, int  Value  )

inlinestatic

Definition at line 80 of file abcXsim.c.

{ 
    if ( Value == XVS0 )
    {
        fprintf( pFile, "0" );
        return;
    }
    if ( Value == XVS1 )
    {
        fprintf( pFile, "1" );
        return;
    }
    assert( Value == XVSX );       
    fprintf( pFile, "x" );
}

static int Abc_XsimRand2 ( )

inlinestatic

Definition at line 54 of file abcXsim.c.

{
//    return (rand() & 1) ? XVS1 : XVS0;
    return (Gia_ManRandom(0) & 1) ? XVS1 : XVS0;
}

static int Abc_XsimRand3 ( )

inlinestatic

Definition at line 59 of file abcXsim.c.

{
    int RetValue;
    do { 
//        RetValue = rand() & 3; 
        RetValue = Gia_ManRandom(0) & 3; 
    } while ( RetValue == 0 );
    return RetValue;
}