VPR-7.0
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globals_declare.h
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1 /* Netlist to be placed stuff. */
3 struct s_net *net;
4 struct s_block *block;
5 boolean *is_global;
6 
7 /* Physical FPGA architecture stuff */
8 int nx, ny;
9 
10 /* chan_width_x is the x-directed channel; i.e. between rows */
11 int *chan_width_x, *chan_width_y; /* numerical form */
12 struct s_grid_tile **grid;
13 
14 /* [0..num_nets-1] of linked list start pointers. Defines the routing. */
16 
17 /* Structures to define the routing architecture of the FPGA. */
19 t_rr_node *rr_node; /* [0..num_rr_nodes-1] */
22 t_rr_indexed_data *rr_indexed_data; /* [0 .. num_rr_indexed_data-1] */
23 int **net_rr_terminals; /* [0..num_nets-1][0..num_pins-1] */
24 struct s_switch_inf *switch_inf; /* [0..det_routing_arch.num_switch-1] */
25 int **rr_blk_source; /* [0..num_blocks-1][0..num_class-1] */
int ** net_rr_terminals
t_ivec *** rr_node_indices
struct s_net * net
struct s_trace ** trace_head
int nx
struct s_trace ** trace_tail
int ** rr_blk_source
int num_nets
boolean * is_global
int num_rr_indexed_data
t_rr_node * rr_node
int ny
t_rr_indexed_data * rr_indexed_data
struct s_switch_inf * switch_inf
Definition: util.h:47
struct s_block * block
int num_blocks
int num_rr_nodes
int * chan_width_y
int * chan_width_x
struct s_grid_tile ** grid