VPR-7.0
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CheckSetup.c File Reference
#include "util.h"
#include "vpr_types.h"
#include "globals.h"
#include "OptionTokens.h"
#include "ReadOptions.h"
#include "read_xml_arch_file.h"
#include "SetupVPR.h"
+ Include dependency graph for CheckSetup.c:

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Functions

void CheckSetup (INP enum e_operation Operation, INP struct s_placer_opts PlacerOpts, INP struct s_annealing_sched AnnealSched, INP struct s_router_opts RouterOpts, INP struct s_det_routing_arch RoutingArch, INP t_segment_inf *Segments, INP t_timing_inf Timing, INP t_chan_width_dist Chans)
 

Function Documentation

void CheckSetup ( INP enum e_operation  Operation,
INP struct s_placer_opts  PlacerOpts,
INP struct s_annealing_sched  AnnealSched,
INP struct s_router_opts  RouterOpts,
INP struct s_det_routing_arch  RoutingArch,
INP t_segment_inf Segments,
INP t_timing_inf  Timing,
INP t_chan_width_dist  Chans 
)

Definition at line 9 of file CheckSetup.c.

14  {
15  int i;
16  int Tmp;
17 
18  if ((GLOBAL == RouterOpts.route_type)
19  && (TIMING_DRIVEN == RouterOpts.router_algorithm)) {
20 
21  vpr_printf(TIO_MESSAGE_ERROR, "The global router does not support timing-drvien routing.\n");
22  exit(1);
23  }
24 
25  if ((GLOBAL == RouterOpts.route_type)
26  && (BOUNDING_BOX_PLACE != PlacerOpts.place_algorithm)) {
27 
28  /* Works, but very weird. Can't optimize timing well, since you're
29  * not doing proper architecture delay modelling. */
30  vpr_printf(TIO_MESSAGE_WARNING, "Using global routing with timing-driven placement. "
31  "This is allowed, but strange, and circuit speed will suffer.\n");
32  }
33 
34  if ((FALSE == Timing.timing_analysis_enabled)
35  && ((PlacerOpts.place_algorithm == NET_TIMING_DRIVEN_PLACE)
36  || (PlacerOpts.place_algorithm == PATH_TIMING_DRIVEN_PLACE))) {
37 
38  /* May work, not tested */
39  vpr_printf(TIO_MESSAGE_ERROR, "Timing analysis must be enabled for timing-driven placement.\n");
40  exit(1);
41  }
42 
43  if (!PlacerOpts.doPlacement && (USER == PlacerOpts.pad_loc_type)) {
44  vpr_printf(TIO_MESSAGE_ERROR, "A pad location file requires that placement is enabled.\n");
45  exit(1);
46  }
47 
48  if (RouterOpts.doRouting) {
49  if ((TIMING_DRIVEN == RouterOpts.router_algorithm)
50  && (FALSE == Timing.timing_analysis_enabled)) {
51  vpr_printf(TIO_MESSAGE_ERROR, "Cannot perform timing-driven routing when timing analysis is disabled.\n");
52  exit(1);
53  }
54 
55  if ((FALSE == Timing.timing_analysis_enabled)
56  && (DEMAND_ONLY != RouterOpts.base_cost_type)) {
57  vpr_printf(TIO_MESSAGE_ERROR, "base_cost_type must be demand_only when timing analysis is disabled.\n");
58  exit(1);
59  }
60  }
61 
62  if ((TIMING_ANALYSIS_ONLY == Operation)
63  && (FALSE == Timing.timing_analysis_enabled)) {
64  vpr_printf(TIO_MESSAGE_ERROR, "-timing_analyze_only_with_net_delay option requires that timing analysis not be disabled.\n");
65  exit(1);
66  }
67 
68  if (DETAILED == RouterOpts.route_type) {
69  if ((Chans.chan_x_dist.type != UNIFORM)
70  || (Chans.chan_y_dist.type != UNIFORM)
71  || (Chans.chan_x_dist.peak != Chans.chan_y_dist.peak)
72  || (Chans.chan_x_dist.peak != Chans.chan_width_io)) {
73  vpr_printf(TIO_MESSAGE_ERROR, "Detailed routing currently only supported on FPGAs with all channels of equal width.\n");
74  exit(1);
75  }
76  }
77 
78  for (i = 0; i < RoutingArch.num_segment; ++i) {
79  Tmp = Segments[i].opin_switch;
80  if (FALSE == switch_inf[Tmp].buffered) {
81  vpr_printf(TIO_MESSAGE_ERROR, "opin_switch (#%d) of segment type #%d is not buffered.\n", Tmp, i);
82  exit(1);
83  }
84  }
85 
86  if (UNI_DIRECTIONAL == RoutingArch.directionality) {
87  if ((RouterOpts.fixed_channel_width != NO_FIXED_CHANNEL_WIDTH)
88  && (RouterOpts.fixed_channel_width % 2 > 0)) {
89  vpr_printf(TIO_MESSAGE_ERROR, "Routing channel width must be even for unidirectional.\n");
90  exit(1);
91  }
92  if ((PlacerOpts.place_chan_width != NO_FIXED_CHANNEL_WIDTH)
93  && (PlacerOpts.place_chan_width % 2 > 0)) {
94  vpr_printf(TIO_MESSAGE_ERROR, "Place channel width must be even for unidirectional.\n");
95  exit(1);
96  }
97  }
98 }
Definition: util.h:12
struct s_switch_inf * switch_inf
Definition: globals.c:83
#define NO_FIXED_CHANNEL_WIDTH
Definition: vpr_types.h:692
messagelogger vpr_printf
Definition: util.c:17

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