VPR-7.0
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SetupVPR.c
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1 #include <assert.h>
2 #include <string.h>
3 #include "util.h"
4 #include "vpr_types.h"
5 #include "OptionTokens.h"
6 #include "ReadOptions.h"
7 #include "globals.h"
8 #include "read_xml_arch_file.h"
9 #include "SetupVPR.h"
10 #include "pb_type_graph.h"
11 #include "ReadOptions.h"
12 
13 static void SetupOperation(INP t_options Options,
14  OUTP enum e_operation *Operation);
15 static void SetupPackerOpts(INP t_options Options, INP boolean TimingEnabled,
16  INP t_arch Arch, INP char *net_file,
17  OUTP struct s_packer_opts *PackerOpts);
18 static void SetupPlacerOpts(INP t_options Options, INP boolean TimingEnabled,
19  OUTP struct s_placer_opts *PlacerOpts);
20 static void SetupAnnealSched(INP t_options Options,
21  OUTP struct s_annealing_sched *AnnealSched);
22 static void SetupRouterOpts(INP t_options Options, INP boolean TimingEnabled,
23  OUTP struct s_router_opts *RouterOpts);
24 static void SetupRoutingArch(INP t_arch Arch,
25  OUTP struct s_det_routing_arch *RoutingArch);
26 static void SetupTiming(INP t_options Options, INP t_arch Arch,
27  INP boolean TimingEnabled, INP enum e_operation Operation,
28  INP struct s_placer_opts PlacerOpts,
29  INP struct s_router_opts RouterOpts, OUTP t_timing_inf * Timing);
30 static void SetupSwitches(INP t_arch Arch,
31  INOUTP struct s_det_routing_arch *RoutingArch,
32  INP struct s_switch_inf *ArchSwitches, INP int NumArchSwitches);
33 static void SetupPowerOpts(t_options Options, t_power_opts *power_opts,
34  t_arch * Arch);
35 
36 /* Sets VPR parameters and defaults. Does not do any error checking
37  * as this should have been done by the various input checkers */
38 void SetupVPR(INP t_options *Options, INP boolean TimingEnabled,
39  INP boolean readArchFile, OUTP struct s_file_name_opts *FileNameOpts,
40  INOUTP t_arch * Arch, OUTP enum e_operation *Operation,
41  OUTP t_model ** user_models, OUTP t_model ** library_models,
42  OUTP struct s_packer_opts *PackerOpts,
43  OUTP struct s_placer_opts *PlacerOpts,
44  OUTP struct s_annealing_sched *AnnealSched,
45  OUTP struct s_router_opts *RouterOpts,
46  OUTP struct s_det_routing_arch *RoutingArch,
47  OUTP t_segment_inf ** Segments, OUTP t_timing_inf * Timing,
48  OUTP boolean * ShowGraphics, OUTP int *GraphPause,
49  t_power_opts * PowerOpts) {
50  int i, j, len;
51 
52  len = strlen(Options->CircuitName) + 6; /* circuit_name.blif/0*/
53  if (Options->out_file_prefix != NULL ) {
54  len += strlen(Options->out_file_prefix);
55  }
56  default_output_name = (char*) my_calloc(len, sizeof(char));
57  if (Options->out_file_prefix == NULL ) {
58  sprintf(default_output_name, "%s", Options->CircuitName);
59  } else {
60  sprintf(default_output_name, "%s%s", Options->out_file_prefix,
61  Options->CircuitName);
62  }
63 
64  /* init default filenames */
65  if (Options->BlifFile == NULL ) {
66  len = strlen(Options->CircuitName) + 6; /* circuit_name.blif/0*/
67  if (Options->out_file_prefix != NULL ) {
68  len += strlen(Options->out_file_prefix);
69  }
70  Options->BlifFile = (char*) my_calloc(len, sizeof(char));
71  if (Options->out_file_prefix == NULL ) {
72  sprintf(Options->BlifFile, "%s.blif", Options->CircuitName);
73  } else {
74  sprintf(Options->BlifFile, "%s%s.blif", Options->out_file_prefix,
75  Options->CircuitName);
76  }
77  }
78 
79  if (Options->NetFile == NULL ) {
80  len = strlen(Options->CircuitName) + 5; /* circuit_name.net/0*/
81  if (Options->out_file_prefix != NULL ) {
82  len += strlen(Options->out_file_prefix);
83  }
84  Options->NetFile = (char*) my_calloc(len, sizeof(char));
85  if (Options->out_file_prefix == NULL ) {
86  sprintf(Options->NetFile, "%s.net", Options->CircuitName);
87  } else {
88  sprintf(Options->NetFile, "%s%s.net", Options->out_file_prefix,
89  Options->CircuitName);
90  }
91  }
92 
93  if (Options->PlaceFile == NULL ) {
94  len = strlen(Options->CircuitName) + 7; /* circuit_name.place/0*/
95  if (Options->out_file_prefix != NULL ) {
96  len += strlen(Options->out_file_prefix);
97  }
98  Options->PlaceFile = (char*) my_calloc(len, sizeof(char));
99  if (Options->out_file_prefix == NULL ) {
100  sprintf(Options->PlaceFile, "%s.place", Options->CircuitName);
101  } else {
102  sprintf(Options->PlaceFile, "%s%s.place", Options->out_file_prefix,
103  Options->CircuitName);
104  }
105  }
106 
107  if (Options->RouteFile == NULL ) {
108  len = strlen(Options->CircuitName) + 7; /* circuit_name.route/0*/
109  if (Options->out_file_prefix != NULL ) {
110  len += strlen(Options->out_file_prefix);
111  }
112  Options->RouteFile = (char*) my_calloc(len, sizeof(char));
113  if (Options->out_file_prefix == NULL ) {
114  sprintf(Options->RouteFile, "%s.route", Options->CircuitName);
115  } else {
116  sprintf(Options->RouteFile, "%s%s.route", Options->out_file_prefix,
117  Options->CircuitName);
118  }
119  }
120  if (Options->ActFile == NULL ) {
121  len = strlen(Options->CircuitName) + 7; /* circuit_name.route/0*/
122  if (Options->out_file_prefix != NULL ) {
123  len += strlen(Options->out_file_prefix);
124  }
125  Options->ActFile = (char*) my_calloc(len, sizeof(char));
126  if (Options->out_file_prefix == NULL ) {
127  sprintf(Options->ActFile, "%s.act", Options->CircuitName);
128  } else {
129  sprintf(Options->ActFile, "%s%s.act", Options->out_file_prefix,
130  Options->CircuitName);
131  }
132  }
133 
134  if (Options->PowerFile == NULL ) {
135  len = strlen(Options->CircuitName) + 7; /* circuit_name.route/0*/
136  if (Options->out_file_prefix != NULL ) {
137  len += strlen(Options->out_file_prefix);
138  }
139  Options->PowerFile = (char*) my_calloc(len, sizeof(char));
140  if (Options->out_file_prefix == NULL ) {
141  sprintf(Options->PowerFile, "%s.power", Options->CircuitName);
142  } else {
143  sprintf(Options->ActFile, "%s%s.power", Options->out_file_prefix,
144  Options->CircuitName);
145  }
146  }
147 
149 
150  FileNameOpts->CircuitName = Options->CircuitName;
151  FileNameOpts->ArchFile = Options->ArchFile;
152  FileNameOpts->BlifFile = Options->BlifFile;
153  FileNameOpts->NetFile = Options->NetFile;
154  FileNameOpts->PlaceFile = Options->PlaceFile;
155  FileNameOpts->RouteFile = Options->RouteFile;
156  FileNameOpts->ActFile = Options->ActFile;
157  FileNameOpts->PowerFile = Options->PowerFile;
158  FileNameOpts->CmosTechFile = Options->CmosTechFile;
159  FileNameOpts->out_file_prefix = Options->out_file_prefix;
160 
161  SetupOperation(*Options, Operation);
162  SetupPlacerOpts(*Options, TimingEnabled, PlacerOpts);
163  SetupAnnealSched(*Options, AnnealSched);
164  SetupRouterOpts(*Options, TimingEnabled, RouterOpts);
165  SetupPowerOpts(*Options, PowerOpts, Arch);
166 
167  if (readArchFile == TRUE) {
168  XmlReadArch(Options->ArchFile, TimingEnabled, Arch, &type_descriptors,
169  &num_types);
170  }
171 
172  *user_models = Arch->models;
173  *library_models = Arch->model_library;
174 
175  /* TODO: this is inelegant, I should be populating this information in XmlReadArch */
176  EMPTY_TYPE = NULL;
177  FILL_TYPE = NULL;
178  IO_TYPE = NULL;
179  for (i = 0; i < num_types; i++) {
180  if (strcmp(type_descriptors[i].name, "<EMPTY>") == 0) {
182  } else if (strcmp(type_descriptors[i].name, "io") == 0) {
184  } else {
185  for (j = 0; j < type_descriptors[i].num_grid_loc_def; j++) {
186  if (type_descriptors[i].grid_loc_def[j].grid_loc_type == FILL) {
187  assert(FILL_TYPE == NULL);
189  }
190  }
191  }
192  }
193  assert(EMPTY_TYPE != NULL && FILL_TYPE != NULL && IO_TYPE != NULL);
194 
195  *Segments = Arch->Segments;
196  RoutingArch->num_segment = Arch->num_segments;
197 
198  SetupSwitches(*Arch, RoutingArch, Arch->Switches, Arch->num_switches);
199  SetupRoutingArch(*Arch, RoutingArch);
200  SetupTiming(*Options, *Arch, TimingEnabled, *Operation, *PlacerOpts,
201  *RouterOpts, Timing);
202  SetupPackerOpts(*Options, TimingEnabled, *Arch, Options->NetFile,
203  PackerOpts);
204 
205  /* init global variables */
206  out_file_prefix = Options->out_file_prefix;
207  grid_logic_tile_area = Arch->grid_logic_tile_area;
208  ipin_mux_trans_size = Arch->ipin_mux_trans_size;
209 
210  /* Set seed for pseudo-random placement, default seed to 1 */
211  PlacerOpts->seed = 1;
212  if (Options->Count[OT_SEED]) {
213  PlacerOpts->seed = Options->Seed;
214  }
215  my_srandom(PlacerOpts->seed);
216 
217  vpr_printf(TIO_MESSAGE_INFO, "Building complex block graph.\n");
219 
222  }
223 
224  *GraphPause = 1; /* DEFAULT */
225  if (Options->Count[OT_AUTO]) {
226  *GraphPause = Options->GraphPause;
227  }
228 #ifdef NO_GRAPHICS
229  *ShowGraphics = FALSE; /* DEFAULT */
230 #else /* NO_GRAPHICS */
231  *ShowGraphics = TRUE; /* DEFAULT */
232  if (Options->Count[OT_NODISP]) {
233  *ShowGraphics = FALSE;
234  }
235 #endif /* NO_GRAPHICS */
236 
239  Arch);
240  }
241 
242 }
243 
244 static void SetupTiming(INP t_options Options, INP t_arch Arch,
245  INP boolean TimingEnabled, INP enum e_operation Operation,
246  INP struct s_placer_opts PlacerOpts,
247  INP struct s_router_opts RouterOpts, OUTP t_timing_inf * Timing) {
248 
249  /* Don't do anything if they don't want timing */
250  if (FALSE == TimingEnabled) {
251  memset(Timing, 0, sizeof(t_timing_inf));
252  Timing->timing_analysis_enabled = FALSE;
253  return;
254  }
255 
256  Timing->C_ipin_cblock = Arch.C_ipin_cblock;
257  Timing->T_ipin_cblock = Arch.T_ipin_cblock;
258  Timing->timing_analysis_enabled = TimingEnabled;
259 
260  /* If the user specified an SDC filename on the command line, look for specified_name.sdc, otherwise look for circuit_name.sdc*/
261  if (Options.SDCFile == NULL ) {
262  Timing->SDCFile = (char*) my_calloc(strlen(Options.CircuitName) + 5,
263  sizeof(char)); /* circuit_name.sdc/0*/
264  sprintf(Timing->SDCFile, "%s.sdc", Options.CircuitName);
265  } else {
266  Timing->SDCFile = (char*) my_strdup(Options.SDCFile);
267  }
268 }
269 
270 /* This loads up VPR's switch_inf data by combining the switches from
271  * the arch file with the special switches that VPR needs. */
272 static void SetupSwitches(INP t_arch Arch,
273  INOUTP struct s_det_routing_arch *RoutingArch,
274  INP struct s_switch_inf *ArchSwitches, INP int NumArchSwitches) {
275 
276  RoutingArch->num_switch = NumArchSwitches;
277 
278  /* Depends on RoutingArch->num_switch */
279  RoutingArch->wire_to_ipin_switch = RoutingArch->num_switch;
280  ++RoutingArch->num_switch;
281 
282  /* Depends on RoutingArch->num_switch */
283  RoutingArch->delayless_switch = RoutingArch->num_switch;
284  RoutingArch->global_route_switch = RoutingArch->delayless_switch;
285  ++RoutingArch->num_switch;
286 
287  /* Alloc the list now that we know the final num_switch value */
288  switch_inf = (struct s_switch_inf *) my_malloc(
289  sizeof(struct s_switch_inf) * RoutingArch->num_switch);
290 
291  /* Copy the switch data from architecture file */
292  memcpy(switch_inf, ArchSwitches,
293  sizeof(struct s_switch_inf) * NumArchSwitches);
294 
295  /* Delayless switch for connecting sinks and sources with their pins. */
296  switch_inf[RoutingArch->delayless_switch].buffered = TRUE;
297  switch_inf[RoutingArch->delayless_switch].R = 0.;
298  switch_inf[RoutingArch->delayless_switch].Cin = 0.;
299  switch_inf[RoutingArch->delayless_switch].Cout = 0.;
300  switch_inf[RoutingArch->delayless_switch].Tdel = 0.;
301  switch_inf[RoutingArch->delayless_switch].power_buffer_type = POWER_BUFFER_TYPE_NONE;
302  switch_inf[RoutingArch->delayless_switch].mux_trans_size = 0.;
303 
304  /* The wire to ipin switch for all types. Curently all types
305  * must share ipin switch. Some of the timing code would
306  * need to be changed otherwise. */
307  switch_inf[RoutingArch->wire_to_ipin_switch].buffered = TRUE;
308  switch_inf[RoutingArch->wire_to_ipin_switch].R = 0.;
309  switch_inf[RoutingArch->wire_to_ipin_switch].Cin = Arch.C_ipin_cblock;
310  switch_inf[RoutingArch->wire_to_ipin_switch].Cout = 0.;
311  switch_inf[RoutingArch->wire_to_ipin_switch].Tdel = Arch.T_ipin_cblock;
312  switch_inf[RoutingArch->wire_to_ipin_switch].power_buffer_type = POWER_BUFFER_TYPE_NONE;
313  switch_inf[RoutingArch->wire_to_ipin_switch].mux_trans_size = 0.;
314 }
315 
316 /* Sets up routing structures. Since checks are already done, this
317  * just copies values across */
318 static void SetupRoutingArch(INP t_arch Arch,
319  OUTP struct s_det_routing_arch *RoutingArch) {
320 
321  RoutingArch->switch_block_type = Arch.SBType;
322  RoutingArch->R_minW_nmos = Arch.R_minW_nmos;
323  RoutingArch->R_minW_pmos = Arch.R_minW_pmos;
324  RoutingArch->Fs = Arch.Fs;
325  RoutingArch->directionality = BI_DIRECTIONAL;
326  if (Arch.Segments)
327  RoutingArch->directionality = Arch.Segments[0].directionality;
328 }
329 
330 static void SetupRouterOpts(INP t_options Options, INP boolean TimingEnabled,
331  OUTP struct s_router_opts *RouterOpts) {
332  RouterOpts->astar_fac = 1.2; /* DEFAULT */
333  if (Options.Count[OT_ASTAR_FAC]) {
334  RouterOpts->astar_fac = Options.astar_fac;
335  }
336 
337  RouterOpts->bb_factor = 3; /* DEFAULT */
338  if (Options.Count[OT_FAST]) {
339  RouterOpts->bb_factor = 0; /* DEFAULT */
340  }
341  if (Options.Count[OT_BB_FACTOR]) {
342  RouterOpts->bb_factor = Options.bb_factor;
343  }
344 
345  RouterOpts->criticality_exp = 1.0; /* DEFAULT */
346  if (Options.Count[OT_CRITICALITY_EXP]) {
347  RouterOpts->criticality_exp = Options.criticality_exp;
348  }
349 
350  RouterOpts->max_criticality = 0.99; /* DEFAULT */
351  if (Options.Count[OT_MAX_CRITICALITY]) {
352  RouterOpts->max_criticality = Options.max_criticality;
353  }
354 
355  RouterOpts->max_router_iterations = 50; /* DEFAULT */
356  if (Options.Count[OT_FAST]) {
357  RouterOpts->max_router_iterations = 10;
358  }
359  if (Options.Count[OT_MAX_ROUTER_ITERATIONS]) {
360  RouterOpts->max_router_iterations = Options.max_router_iterations;
361  }
362 
363  RouterOpts->pres_fac_mult = 1.3; /* DEFAULT */
364  if (Options.Count[OT_PRES_FAC_MULT]) {
365  RouterOpts->pres_fac_mult = Options.pres_fac_mult;
366  }
367 
368  RouterOpts->route_type = DETAILED; /* DEFAULT */
369  if (Options.Count[OT_ROUTE_TYPE]) {
370  RouterOpts->route_type = Options.RouteType;
371  }
372 
373  RouterOpts->full_stats = FALSE; /* DEFAULT */
374  if (Options.Count[OT_FULL_STATS]) {
375  RouterOpts->full_stats = TRUE;
376  }
377 
378  RouterOpts->verify_binary_search = FALSE; /* DEFAULT */
379  if (Options.Count[OT_VERIFY_BINARY_SEARCH]) {
380  RouterOpts->verify_binary_search = TRUE;
381  }
382 
383  /* Depends on RouteOpts->route_type */
384  RouterOpts->router_algorithm = NO_TIMING; /* DEFAULT */
385  if (TimingEnabled) {
386  RouterOpts->router_algorithm = TIMING_DRIVEN; /* DEFAULT */
387  }
388  if (GLOBAL == RouterOpts->route_type) {
389  RouterOpts->router_algorithm = NO_TIMING; /* DEFAULT */
390  }
391  if (Options.Count[OT_ROUTER_ALGORITHM]) {
392  RouterOpts->router_algorithm = Options.RouterAlgorithm;
393  }
394 
395  RouterOpts->fixed_channel_width = NO_FIXED_CHANNEL_WIDTH; /* DEFAULT */
396  if (Options.Count[OT_ROUTE_CHAN_WIDTH]) {
397  RouterOpts->fixed_channel_width = Options.RouteChanWidth;
398  }
399 
400  /* Depends on RouterOpts->router_algorithm */
401  RouterOpts->initial_pres_fac = 0.5; /* DEFAULT */
402  if (NO_TIMING == RouterOpts->router_algorithm || Options.Count[OT_FAST]) {
403  RouterOpts->initial_pres_fac = 10000.0; /* DEFAULT */
404  }
405  if (Options.Count[OT_INITIAL_PRES_FAC]) {
406  RouterOpts->initial_pres_fac = Options.initial_pres_fac;
407  }
408 
409  /* Depends on RouterOpts->router_algorithm */
410  RouterOpts->base_cost_type = DELAY_NORMALIZED; /* DEFAULT */
411  if (BREADTH_FIRST == RouterOpts->router_algorithm) {
412  RouterOpts->base_cost_type = DEMAND_ONLY; /* DEFAULT */
413  }
414  if (NO_TIMING == RouterOpts->router_algorithm) {
415  RouterOpts->base_cost_type = DEMAND_ONLY; /* DEFAULT */
416  }
417  if (Options.Count[OT_BASE_COST_TYPE]) {
418  RouterOpts->base_cost_type = Options.base_cost_type;
419  }
420 
421  /* Depends on RouterOpts->router_algorithm */
422  RouterOpts->first_iter_pres_fac = 0.5; /* DEFAULT */
423  if (BREADTH_FIRST == RouterOpts->router_algorithm) {
424  RouterOpts->first_iter_pres_fac = 0.0; /* DEFAULT */
425  }
426  if (NO_TIMING == RouterOpts->router_algorithm || Options.Count[OT_FAST]) {
427  RouterOpts->first_iter_pres_fac = 10000.0; /* DEFAULT */
428  }
429  if (Options.Count[OT_FIRST_ITER_PRES_FAC]) {
430  RouterOpts->first_iter_pres_fac = Options.first_iter_pres_fac;
431  }
432 
433  /* Depends on RouterOpts->router_algorithm */
434  RouterOpts->acc_fac = 1.0;
435  if (BREADTH_FIRST == RouterOpts->router_algorithm) {
436  RouterOpts->acc_fac = 0.2;
437  }
438  if (Options.Count[OT_ACC_FAC]) {
439  RouterOpts->acc_fac = Options.acc_fac;
440  }
441 
442  /* Depends on RouterOpts->route_type */
443  RouterOpts->bend_cost = 0.0; /* DEFAULT */
444  if (GLOBAL == RouterOpts->route_type) {
445  RouterOpts->bend_cost = 1.0; /* DEFAULT */
446  }
447  if (Options.Count[OT_BEND_COST]) {
448  RouterOpts->bend_cost = Options.bend_cost;
449  }
450 
451  RouterOpts->doRouting = FALSE;
452  if (Options.Count[OT_ROUTE]) {
453  RouterOpts->doRouting = TRUE;
454  } else if (!Options.Count[OT_PACK] && !Options.Count[OT_PLACE]
455  && !Options.Count[OT_ROUTE]) {
456  if (!Options.Count[OT_TIMING_ANALYZE_ONLY_WITH_NET_DELAY])
457  RouterOpts->doRouting = TRUE;
458  }
459 
460 }
461 
462 static void SetupAnnealSched(INP t_options Options,
463  OUTP struct s_annealing_sched *AnnealSched) {
464  AnnealSched->alpha_t = 0.8; /* DEFAULT */
465  if (Options.Count[OT_ALPHA_T]) {
466  AnnealSched->alpha_t = Options.PlaceAlphaT;
467  }
468  if (AnnealSched->alpha_t >= 1 || AnnealSched->alpha_t <= 0) {
469  vpr_printf(TIO_MESSAGE_ERROR,
470  "alpha_t must be between 0 and 1 exclusive.\n");
471  exit(1);
472  }
473  AnnealSched->exit_t = 0.01; /* DEFAULT */
474  if (Options.Count[OT_EXIT_T]) {
475  AnnealSched->exit_t = Options.PlaceExitT;
476  }
477  if (AnnealSched->exit_t <= 0) {
478  vpr_printf(TIO_MESSAGE_ERROR, "exit_t must be greater than 0.\n");
479  exit(1);
480  }
481  AnnealSched->init_t = 100.0; /* DEFAULT */
482  if (Options.Count[OT_INIT_T]) {
483  AnnealSched->init_t = Options.PlaceInitT;
484  }
485  if (AnnealSched->init_t <= 0) {
486  vpr_printf(TIO_MESSAGE_ERROR, "init_t must be greater than 0.\n");
487  exit(1);
488  }
489  if (AnnealSched->init_t < AnnealSched->exit_t) {
490  vpr_printf(TIO_MESSAGE_ERROR,
491  "init_t must be greater or equal to than exit_t.\n");
492  exit(1);
493  }
494  AnnealSched->inner_num = 1.0; /* DEFAULT */
495  if (Options.Count[OT_INNER_NUM]) {
496  AnnealSched->inner_num = Options.PlaceInnerNum;
497  }
498  if (AnnealSched->inner_num <= 0) {
499  vpr_printf(TIO_MESSAGE_ERROR, "init_t must be greater than 0.\n");
500  exit(1);
501  }
502  AnnealSched->type = AUTO_SCHED; /* DEFAULT */
503  if ((Options.Count[OT_ALPHA_T]) || (Options.Count[OT_EXIT_T])
504  || (Options.Count[OT_INIT_T])) {
505  AnnealSched->type = USER_SCHED;
506  }
507 }
508 
509 /* Sets up the s_packer_opts structure baesd on users inputs and on the architecture specified.
510  * Error checking, such as checking for conflicting params is assumed to be done beforehand
511  */
512 void SetupPackerOpts(INP t_options Options, INP boolean TimingEnabled,
513  INP t_arch Arch, INP char *net_file,
514  OUTP struct s_packer_opts *PackerOpts) {
515 
516  if (Arch.clb_grid.IsAuto) {
517  PackerOpts->aspect = Arch.clb_grid.Aspect;
518  } else {
519  PackerOpts->aspect = (float) Arch.clb_grid.H / (float) Arch.clb_grid.W;
520  }
521  PackerOpts->output_file = net_file;
522 
523  PackerOpts->blif_file_name = Options.BlifFile;
524 
525  PackerOpts->doPacking = FALSE; /* DEFAULT */
526  if (Options.Count[OT_PACK]) {
527  PackerOpts->doPacking = TRUE;
528  } else if (!Options.Count[OT_PACK] && !Options.Count[OT_PLACE]
529  && !Options.Count[OT_ROUTE]) {
530  if (!Options.Count[OT_TIMING_ANALYZE_ONLY_WITH_NET_DELAY])
531  PackerOpts->doPacking = TRUE;
532  }
533 
534  PackerOpts->global_clocks = TRUE; /* DEFAULT */
535  if (Options.Count[OT_GLOBAL_CLOCKS]) {
536  PackerOpts->global_clocks = Options.global_clocks;
537  }
538 
539  PackerOpts->hill_climbing_flag = FALSE; /* DEFAULT */
540  if (Options.Count[OT_HILL_CLIMBING_FLAG]) {
541  PackerOpts->hill_climbing_flag = Options.hill_climbing_flag;
542  }
543 
544  PackerOpts->sweep_hanging_nets_and_inputs = TRUE;
545  if (Options.Count[OT_SWEEP_HANGING_NETS_AND_INPUTS]) {
546  PackerOpts->sweep_hanging_nets_and_inputs =
547  Options.sweep_hanging_nets_and_inputs;
548  }
549 
550  PackerOpts->skip_clustering = FALSE; /* DEFAULT */
551  if (Options.Count[OT_SKIP_CLUSTERING]) {
552  PackerOpts->skip_clustering = TRUE;
553  }
554  PackerOpts->allow_unrelated_clustering = TRUE; /* DEFAULT */
555  if (Options.Count[OT_ALLOW_UNRELATED_CLUSTERING]) {
556  PackerOpts->allow_unrelated_clustering =
557  Options.allow_unrelated_clustering;
558  }
559  PackerOpts->allow_early_exit = FALSE; /* DEFAULT */
560  if (Options.Count[OT_ALLOW_EARLY_EXIT]) {
561  PackerOpts->allow_early_exit = Options.allow_early_exit;
562  }
563  PackerOpts->connection_driven = TRUE; /* DEFAULT */
564  if (Options.Count[OT_CONNECTION_DRIVEN_CLUSTERING]) {
565  PackerOpts->connection_driven = Options.connection_driven;
566  }
567 
568  PackerOpts->timing_driven = TimingEnabled; /* DEFAULT */
569  if (Options.Count[OT_TIMING_DRIVEN_CLUSTERING]) {
570  PackerOpts->timing_driven = Options.timing_driven;
571  }
572  PackerOpts->cluster_seed_type = (
573  TimingEnabled ? VPACK_TIMING : VPACK_MAX_INPUTS); /* DEFAULT */
574  if (Options.Count[OT_CLUSTER_SEED]) {
575  PackerOpts->cluster_seed_type = Options.cluster_seed_type;
576  }
577  PackerOpts->alpha = 0.75; /* DEFAULT */
578  if (Options.Count[OT_ALPHA_CLUSTERING]) {
579  PackerOpts->alpha = Options.alpha;
580  }
581  PackerOpts->beta = 0.9; /* DEFAULT */
582  if (Options.Count[OT_BETA_CLUSTERING]) {
583  PackerOpts->beta = Options.beta;
584  }
585 
586  /* never recomputer timing */
587  PackerOpts->recompute_timing_after = MAX_SHORT; /* DEFAULT */
588  if (Options.Count[OT_RECOMPUTE_TIMING_AFTER]) {
589  PackerOpts->recompute_timing_after = Options.recompute_timing_after;
590  }
591  PackerOpts->block_delay = 0; /* DEFAULT */
592  if (Options.Count[OT_CLUSTER_BLOCK_DELAY]) {
593  PackerOpts->block_delay = Options.block_delay;
594  }
595  PackerOpts->intra_cluster_net_delay = 0; /* DEFAULT */
596  if (Options.Count[OT_INTRA_CLUSTER_NET_DELAY]) {
597  PackerOpts->intra_cluster_net_delay = Options.intra_cluster_net_delay;
598  }
599  PackerOpts->inter_cluster_net_delay = 1.0; /* DEFAULT */
600  PackerOpts->auto_compute_inter_cluster_net_delay = TRUE;
601  if (Options.Count[OT_INTER_CLUSTER_NET_DELAY]) {
602  PackerOpts->inter_cluster_net_delay = Options.inter_cluster_net_delay;
603  PackerOpts->auto_compute_inter_cluster_net_delay = FALSE;
604  }
605 
606  PackerOpts->packer_algorithm = PACK_GREEDY; /* DEFAULT */
607  if (Options.Count[OT_PACKER_ALGORITHM]) {
608  PackerOpts->packer_algorithm = Options.packer_algorithm;
609  }
610 }
611 
612 /* Sets up the s_placer_opts structure based on users input. Error checking,
613  * such as checking for conflicting params is assumed to be done beforehand */
614 static void SetupPlacerOpts(INP t_options Options, INP boolean TimingEnabled,
615  OUTP struct s_placer_opts *PlacerOpts) {
616  PlacerOpts->block_dist = 1; /* DEFAULT */
617  if (Options.Count[OT_BLOCK_DIST]) {
618  PlacerOpts->block_dist = Options.block_dist;
619  }
620 
621  PlacerOpts->inner_loop_recompute_divider = 0; /* DEFAULT */
622  if (Options.Count[OT_INNER_LOOP_RECOMPUTE_DIVIDER]) {
623  PlacerOpts->inner_loop_recompute_divider =
624  Options.inner_loop_recompute_divider;
625  }
626 
627  PlacerOpts->place_cost_exp = 1.; /* DEFAULT */
628  if (Options.Count[OT_PLACE_COST_EXP]) {
629  PlacerOpts->place_cost_exp = Options.place_cost_exp;
630  }
631 
632  PlacerOpts->td_place_exp_first = 1.; /* DEFAULT */
633  if (Options.Count[OT_TD_PLACE_EXP_FIRST]) {
634  PlacerOpts->td_place_exp_first = Options.place_exp_first;
635  }
636 
637  PlacerOpts->td_place_exp_last = 8.; /* DEFAULT */
638  if (Options.Count[OT_TD_PLACE_EXP_LAST]) {
639  PlacerOpts->td_place_exp_last = Options.place_exp_last;
640  }
641 
642  PlacerOpts->place_algorithm = BOUNDING_BOX_PLACE; /* DEFAULT */
643  if (TimingEnabled) {
644  PlacerOpts->place_algorithm = PATH_TIMING_DRIVEN_PLACE; /* DEFAULT */
645  }
646  if (Options.Count[OT_PLACE_ALGORITHM]) {
647  PlacerOpts->place_algorithm = Options.PlaceAlgorithm;
648  }
649 
650  PlacerOpts->pad_loc_file = NULL; /* DEFAULT */
651  if (Options.Count[OT_FIX_PINS]) {
652  if (Options.PinFile) {
653  PlacerOpts->pad_loc_file = my_strdup(Options.PinFile);
654  }
655  }
656 
657  PlacerOpts->pad_loc_type = FREE; /* DEFAULT */
658  if (Options.Count[OT_FIX_PINS]) {
659  PlacerOpts->pad_loc_type = (Options.PinFile ? USER : RANDOM);
660  }
661 
662  PlacerOpts->place_chan_width = 100; /* DEFAULT */
663  if (Options.Count[OT_PLACE_CHAN_WIDTH]) {
664  PlacerOpts->place_chan_width = Options.PlaceChanWidth;
665  }
666 
667  PlacerOpts->recompute_crit_iter = 1; /* DEFAULT */
668  if (Options.Count[OT_RECOMPUTE_CRIT_ITER]) {
669  PlacerOpts->recompute_crit_iter = Options.RecomputeCritIter;
670  }
671 
672  PlacerOpts->timing_tradeoff = 0.5; /* DEFAULT */
673  if (Options.Count[OT_TIMING_TRADEOFF]) {
674  PlacerOpts->timing_tradeoff = Options.PlaceTimingTradeoff;
675  }
676 
677  /* Depends on PlacerOpts->place_algorithm */
678  PlacerOpts->enable_timing_computations = FALSE; /* DEFAULT */
679  if ((PlacerOpts->place_algorithm == PATH_TIMING_DRIVEN_PLACE)
680  || (PlacerOpts->place_algorithm == NET_TIMING_DRIVEN_PLACE)) {
681  PlacerOpts->enable_timing_computations = TRUE; /* DEFAULT */
682  }
683  if (Options.Count[OT_ENABLE_TIMING_COMPUTATIONS]) {
684  PlacerOpts->enable_timing_computations = Options.ShowPlaceTiming;
685  }
686 
687  PlacerOpts->place_freq = PLACE_ONCE; /* DEFAULT */
688  if ((Options.Count[OT_ROUTE_CHAN_WIDTH])
689  || (Options.Count[OT_PLACE_CHAN_WIDTH])) {
690  PlacerOpts->place_freq = PLACE_ONCE;
691  }
692 
693  PlacerOpts->doPlacement = FALSE; /* DEFAULT */
694  if (Options.Count[OT_PLACE]) {
695  PlacerOpts->doPlacement = TRUE;
696  } else if (!Options.Count[OT_PACK] && !Options.Count[OT_PLACE]
697  && !Options.Count[OT_ROUTE]) {
698  if (!Options.Count[OT_TIMING_ANALYZE_ONLY_WITH_NET_DELAY])
699  PlacerOpts->doPlacement = TRUE;
700  }
701  if (PlacerOpts->doPlacement == FALSE) {
702  PlacerOpts->place_freq = PLACE_NEVER;
703  }
704 
705 }
706 
707 static void SetupOperation(INP t_options Options,
708  OUTP enum e_operation *Operation) {
709  *Operation = RUN_FLOW; /* DEFAULT */
710  if (Options.Count[OT_TIMING_ANALYZE_ONLY_WITH_NET_DELAY]) {
711  *Operation = TIMING_ANALYSIS_ONLY;
712  }
713 }
714 
715 static void SetupPowerOpts(t_options Options, t_power_opts *power_opts,
716  t_arch * Arch) {
717 
718  if (Options.Count[OT_POWER]) {
719  power_opts->do_power = TRUE;
720  } else {
721  power_opts->do_power = FALSE;
722  }
723 
724  if (power_opts->do_power) {
725  Arch->power = (t_power_arch*) my_malloc(sizeof(t_power_arch));
726  Arch->clocks = (t_clock_arch*) my_malloc(sizeof(t_clock_arch));
727  g_clock_arch = Arch->clocks;
728  } else {
729  Arch->power = NULL;
730  Arch->clocks = NULL;
731  g_clock_arch = NULL;
732  }
733 
734 }
static void SetupTiming(INP t_options Options, INP t_arch Arch, INP boolean TimingEnabled, INP enum e_operation Operation, INP struct s_placer_opts PlacerOpts, INP struct s_router_opts RouterOpts, OUTP t_timing_inf *Timing)
Definition: SetupVPR.c:244
static void SetupRouterOpts(INP t_options Options, INP boolean TimingEnabled, OUTP struct s_router_opts *RouterOpts)
Definition: SetupVPR.c:330
t_type_ptr FILL_TYPE
Definition: globals.c:42
t_power_arch * power
void EchoArch(INP const char *EchoFile, INP const t_type_descriptor *Types, INP int NumTypes, struct s_arch *arch)
int Count[OT_BASE_UNKNOWN]
Definition: ReadOptions.h:88
t_type_ptr EMPTY_TYPE
Definition: globals.c:41
void * my_calloc(size_t nelem, size_t size)
Definition: util.c:132
static void SetupSwitches(INP t_arch Arch, INOUTP struct s_det_routing_arch *RoutingArch, INP struct s_switch_inf *ArchSwitches, INP int NumArchSwitches)
Definition: SetupVPR.c:272
t_clock_arch * g_clock_arch
Definition: globals.c:97
void alloc_and_load_all_pb_graphs(boolean load_power_structures)
Definition: pb_type_graph.c:89
boolean do_power
Definition: vpr_types.h:1022
#define MAX_SHORT
Definition: vpr_types.h:75
#define INOUTP
Definition: util.h:21
boolean getEchoEnabled(void)
Definition: ReadOptions.c:67
Definition: util.h:12
char * out_file_prefix
Definition: util.c:16
float mux_trans_size
void XmlReadArch(INP const char *ArchFile, INP boolean timing_enabled, OUTP struct s_arch *arch, OUTP t_type_descriptor **Types, OUTP int *NumTypes)
static void SetupAnnealSched(INP t_options Options, OUTP struct s_annealing_sched *AnnealSched)
Definition: SetupVPR.c:462
void SetupVPR(INP t_options *Options, INP boolean TimingEnabled, INP boolean readArchFile, OUTP struct s_file_name_opts *FileNameOpts, INOUTP t_arch *Arch, OUTP enum e_operation *Operation, OUTP t_model **user_models, OUTP t_model **library_models, OUTP struct s_packer_opts *PackerOpts, OUTP struct s_placer_opts *PlacerOpts, OUTP struct s_annealing_sched *AnnealSched, OUTP struct s_router_opts *RouterOpts, OUTP struct s_det_routing_arch *RoutingArch, OUTP t_segment_inf **Segments, OUTP t_timing_inf *Timing, OUTP boolean *ShowGraphics, OUTP int *GraphPause, t_power_opts *PowerOpts)
Definition: SetupVPR.c:38
static void SetupPlacerOpts(INP t_options Options, INP boolean TimingEnabled, OUTP struct s_placer_opts *PlacerOpts)
Definition: SetupVPR.c:614
static void * my_malloc(int ibytes)
Definition: graphics.c:499
t_clock_arch * clocks
void echo_pb_graph(char *filename)
e_operation
Definition: vpr_types.h:468
#define INP
Definition: util.h:19
char * default_output_name
Definition: globals.c:22
static void SetupOperation(INP t_options Options, OUTP enum e_operation *Operation)
Definition: SetupVPR.c:707
struct s_switch_inf * switch_inf
Definition: globals.c:83
boolean isEchoFileEnabled(enum e_echo_files echo_option)
Definition: ReadOptions.c:115
static void SetupPackerOpts(INP t_options Options, INP boolean TimingEnabled, INP t_arch Arch, INP char *net_file, OUTP struct s_packer_opts *PackerOpts)
Definition: SetupVPR.c:512
static void SetupPowerOpts(t_options Options, t_power_opts *power_opts, t_arch *Arch)
Definition: SetupVPR.c:715
int num_types
Definition: globals.c:37
static void SetupRoutingArch(INP t_arch Arch, OUTP struct s_det_routing_arch *RoutingArch)
Definition: SetupVPR.c:318
t_type_ptr IO_TYPE
Definition: globals.c:40
#define NO_FIXED_CHANNEL_WIDTH
Definition: vpr_types.h:692
float grid_logic_tile_area
Definition: globals.c:13
struct s_type_descriptor * type_descriptors
Definition: globals.c:38
char * getEchoFileName(enum e_echo_files echo_option)
Definition: ReadOptions.c:122
#define OUTP
Definition: util.h:20
e_power_buffer_type power_buffer_type
boolean buffered
char * my_strdup(const char *str)
Definition: util.c:101
void alloc_and_load_output_file_names(const char *default_name)
Definition: ReadOptions.c:200
messagelogger vpr_printf
Definition: util.c:17
float ipin_mux_trans_size
Definition: globals.c:14
void my_srandom(int seed)
Definition: util.c:706
Definition: util.h:12