#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <assert.h>
#include "misc/vec/vec.h"
#include "misc/util/utilCex.h"

Data Structures
struct	Aig_Obj_t_

struct	Aig_Man_t_

struct	Aig_Cut_t_

struct	Aig_ManCut_t_

Macros
#define	Aig_ObjForEachCut(p, pObj, pCut, i) for ( i = 0, pCut = Aig_ObjCuts(p, pObj); i < p->nCutsMax; i++, pCut = Aig_CutNext(pCut) )

#define	Aig_CutForEachLeaf(p, pCut, pLeaf, i) for ( i = 0; (i < (int)(pCut)->nFanins) && ((pLeaf) = Aig_ManObj(p, (pCut)->pFanins[i])); i++ )

#define	Aig_ManForEachCi(p, pObj, i) Vec_PtrForEachEntry( Aig_Obj_t *, p->vCis, pObj, i )
	ITERATORS ///. More...

#define	Aig_ManForEachCiReverse(p, pObj, i) Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vCis, pObj, i )

#define	Aig_ManForEachCo(p, pObj, i) Vec_PtrForEachEntry( Aig_Obj_t *, p->vCos, pObj, i )

#define	Aig_ManForEachCoReverse(p, pObj, i) Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vCos, pObj, i )

#define	Aig_ManForEachObj(p, pObj, i) Vec_PtrForEachEntry( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL ) {} else

#define	Aig_ManForEachObjReverse(p, pObj, i) Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL ) {} else

#define	Aig_ManForEachObjVec(vIds, p, pObj, i) for ( i = 0; i < Vec_IntSize(vIds) && (((pObj) = Aig_ManObj(p, Vec_IntEntry(vIds,i))), 1); i++ )

#define	Aig_ManForEachObjVecReverse(vIds, p, pObj, i) for ( i = Vec_IntSize(vIds) - 1; i >= 0 && (((pObj) = Aig_ManObj(p, Vec_IntEntry(vIds,i))), 1); i-- )

#define	Aig_ManForEachNode(p, pObj, i) Vec_PtrForEachEntry( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL \|\| !Aig_ObjIsNode(pObj) ) {} else

#define	Aig_ManForEachNodeReverse(p, pObj, i) Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL \|\| !Aig_ObjIsNode(pObj) ) {} else

#define	Aig_ManForEachExor(p, pObj, i) Vec_PtrForEachEntry( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL \|\| !Aig_ObjIsExor(pObj) ) {} else

#define	Aig_ManForEachExorReverse(p, pObj, i) Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL \|\| !Aig_ObjIsExor(pObj) ) {} else

#define	Aig_ObjForEachFanout(p, pObj, pFanout, iFan, i)

#define	Aig_ManForEachPiSeq(p, pObj, i) Vec_PtrForEachEntryStop( Aig_Obj_t *, p->vCis, pObj, i, Aig_ManCiNum(p)-Aig_ManRegNum(p) )
	SEQUENTIAL ITERATORS ///. More...

#define	Aig_ManForEachLoSeq(p, pObj, i) Vec_PtrForEachEntryStart( Aig_Obj_t *, p->vCis, pObj, i, Aig_ManCiNum(p)-Aig_ManRegNum(p) )

#define	Aig_ManForEachPoSeq(p, pObj, i) Vec_PtrForEachEntryStop( Aig_Obj_t *, p->vCos, pObj, i, Aig_ManCoNum(p)-Aig_ManRegNum(p) )

#define	Aig_ManForEachLiSeq(p, pObj, i) Vec_PtrForEachEntryStart( Aig_Obj_t *, p->vCos, pObj, i, Aig_ManCoNum(p)-Aig_ManRegNum(p) )

#define	Aig_ManForEachLiLoSeq(p, pObjLi, pObjLo, k)

Typedefs
typedef typedefABC_NAMESPACE_HEADER_START struct Aig_Man_t_	Aig_Man_t
	INCLUDES ///. More...

typedef struct Aig_Obj_t_	Aig_Obj_t

typedef struct Aig_MmFixed_t_	Aig_MmFixed_t

typedef struct Aig_MmFlex_t_	Aig_MmFlex_t

typedef struct Aig_MmStep_t_	Aig_MmStep_t

typedef struct Aig_ManCut_t_	Aig_ManCut_t

typedef struct Aig_Cut_t_	Aig_Cut_t

Enumerations
enum	Aig_Type_t { AIG_OBJ_NONE, AIG_OBJ_CONST1, AIG_OBJ_CI, AIG_OBJ_CO, AIG_OBJ_BUF, AIG_OBJ_AND, AIG_OBJ_EXOR, AIG_OBJ_VOID }

Functions
static Aig_Cut_t *	Aig_ObjCuts (Aig_ManCut_t p, Aig_Obj_t pObj)

static void	Aig_ObjSetCuts (Aig_ManCut_t p, Aig_Obj_t pObj, Aig_Cut_t *pCuts)

static int	Aig_CutLeaveNum (Aig_Cut_t *pCut)

static int *	Aig_CutLeaves (Aig_Cut_t *pCut)

static unsigned *	Aig_CutTruth (Aig_Cut_t *pCut)

static Aig_Cut_t *	Aig_CutNext (Aig_Cut_t *pCut)

static unsigned	Aig_ObjCutSign (unsigned ObjId)
	MACRO DEFINITIONS ///. More...

static int	Aig_WordCountOnes (unsigned uWord)

static int	Aig_WordFindFirstBit (unsigned uWord)

static Aig_Obj_t *	Aig_Regular (Aig_Obj_t *p)

static Aig_Obj_t *	Aig_Not (Aig_Obj_t *p)

static Aig_Obj_t *	Aig_NotCond (Aig_Obj_t *p, int c)

static int	Aig_IsComplement (Aig_Obj_t *p)

static int	Aig_ManCiNum (Aig_Man_t *p)

static int	Aig_ManCoNum (Aig_Man_t *p)

static int	Aig_ManBufNum (Aig_Man_t *p)

static int	Aig_ManAndNum (Aig_Man_t *p)

static int	Aig_ManExorNum (Aig_Man_t *p)

static int	Aig_ManNodeNum (Aig_Man_t *p)

static int	Aig_ManGetCost (Aig_Man_t *p)

static int	Aig_ManObjNum (Aig_Man_t *p)

static int	Aig_ManObjNumMax (Aig_Man_t *p)

static int	Aig_ManRegNum (Aig_Man_t *p)

static int	Aig_ManConstrNum (Aig_Man_t *p)

static Aig_Obj_t *	Aig_ManConst0 (Aig_Man_t *p)

static Aig_Obj_t *	Aig_ManConst1 (Aig_Man_t *p)

static Aig_Obj_t *	Aig_ManGhost (Aig_Man_t *p)

static Aig_Obj_t *	Aig_ManCi (Aig_Man_t *p, int i)

static Aig_Obj_t *	Aig_ManCo (Aig_Man_t *p, int i)

static Aig_Obj_t *	Aig_ManLo (Aig_Man_t *p, int i)

static Aig_Obj_t *	Aig_ManLi (Aig_Man_t *p, int i)

static Aig_Obj_t *	Aig_ManObj (Aig_Man_t *p, int i)

static Aig_Type_t	Aig_ObjType (Aig_Obj_t *pObj)

static int	Aig_ObjIsNone (Aig_Obj_t *pObj)

static int	Aig_ObjIsConst1 (Aig_Obj_t *pObj)

static int	Aig_ObjIsCi (Aig_Obj_t *pObj)

static int	Aig_ObjIsCo (Aig_Obj_t *pObj)

static int	Aig_ObjIsBuf (Aig_Obj_t *pObj)

static int	Aig_ObjIsAnd (Aig_Obj_t *pObj)

static int	Aig_ObjIsExor (Aig_Obj_t *pObj)

static int	Aig_ObjIsNode (Aig_Obj_t *pObj)

static int	Aig_ObjIsTerm (Aig_Obj_t *pObj)

static int	Aig_ObjIsHash (Aig_Obj_t *pObj)

static int	Aig_ObjIsChoice (Aig_Man_t p, Aig_Obj_t pObj)

static int	Aig_ObjIsCand (Aig_Obj_t *pObj)

static int	Aig_ObjCioId (Aig_Obj_t *pObj)

static int	Aig_ObjId (Aig_Obj_t *pObj)

static int	Aig_ObjIsMarkA (Aig_Obj_t *pObj)

static void	Aig_ObjSetMarkA (Aig_Obj_t *pObj)

static void	Aig_ObjClearMarkA (Aig_Obj_t *pObj)

static void	Aig_ObjSetTravId (Aig_Obj_t *pObj, int TravId)

static void	Aig_ObjSetTravIdCurrent (Aig_Man_t p, Aig_Obj_t pObj)

static void	Aig_ObjSetTravIdPrevious (Aig_Man_t p, Aig_Obj_t pObj)

static int	Aig_ObjIsTravIdCurrent (Aig_Man_t p, Aig_Obj_t pObj)

static int	Aig_ObjIsTravIdPrevious (Aig_Man_t p, Aig_Obj_t pObj)

static int	Aig_ObjPhase (Aig_Obj_t *pObj)

static int	Aig_ObjPhaseReal (Aig_Obj_t *pObj)

static int	Aig_ObjRefs (Aig_Obj_t *pObj)

static void	Aig_ObjRef (Aig_Obj_t *pObj)

static void	Aig_ObjDeref (Aig_Obj_t *pObj)

static void	Aig_ObjClearRef (Aig_Obj_t *pObj)

static int	Aig_ObjFaninId0 (Aig_Obj_t *pObj)

static int	Aig_ObjFaninId1 (Aig_Obj_t *pObj)

static int	Aig_ObjFaninC0 (Aig_Obj_t *pObj)

static int	Aig_ObjFaninC1 (Aig_Obj_t *pObj)

static Aig_Obj_t *	Aig_ObjFanin0 (Aig_Obj_t *pObj)

static Aig_Obj_t *	Aig_ObjFanin1 (Aig_Obj_t *pObj)

static Aig_Obj_t *	Aig_ObjChild0 (Aig_Obj_t *pObj)

static Aig_Obj_t *	Aig_ObjChild1 (Aig_Obj_t *pObj)

static Aig_Obj_t *	Aig_ObjChild0Copy (Aig_Obj_t *pObj)

static Aig_Obj_t *	Aig_ObjChild1Copy (Aig_Obj_t *pObj)

static Aig_Obj_t *	Aig_ObjChild0Next (Aig_Obj_t *pObj)

static Aig_Obj_t *	Aig_ObjChild1Next (Aig_Obj_t *pObj)

static void	Aig_ObjChild0Flip (Aig_Obj_t *pObj)

static void	Aig_ObjChild1Flip (Aig_Obj_t *pObj)

static Aig_Obj_t *	Aig_ObjCopy (Aig_Obj_t *pObj)

static void	Aig_ObjSetCopy (Aig_Obj_t pObj, Aig_Obj_t pCopy)

static Aig_Obj_t *	Aig_ObjRealCopy (Aig_Obj_t *pObj)

static int	Aig_ObjToLit (Aig_Obj_t *pObj)

static Aig_Obj_t *	Aig_ObjFromLit (Aig_Man_t *p, int iLit)

static int	Aig_ObjLevel (Aig_Obj_t *pObj)

static int	Aig_ObjLevelNew (Aig_Obj_t *pObj)

static int	Aig_ObjSetLevel (Aig_Obj_t *pObj, int i)

static void	Aig_ObjClean (Aig_Obj_t *pObj)

static Aig_Obj_t *	Aig_ObjFanout0 (Aig_Man_t p, Aig_Obj_t pObj)

static Aig_Obj_t *	Aig_ObjEquiv (Aig_Man_t p, Aig_Obj_t pObj)

static void	Aig_ObjSetEquiv (Aig_Man_t p, Aig_Obj_t pObj, Aig_Obj_t *pEqu)

static Aig_Obj_t *	Aig_ObjRepr (Aig_Man_t p, Aig_Obj_t pObj)

static void	Aig_ObjSetRepr (Aig_Man_t p, Aig_Obj_t pObj, Aig_Obj_t *pRepr)

static int	Aig_ObjWhatFanin (Aig_Obj_t pObj, Aig_Obj_t pFanin)

static int	Aig_ObjFanoutC (Aig_Obj_t pObj, Aig_Obj_t pFanout)

static Aig_Obj_t *	Aig_ObjCreateGhost (Aig_Man_t p, Aig_Obj_t p0, Aig_Obj_t *p1, Aig_Type_t Type)

static Aig_Obj_t *	Aig_ManFetchMemory (Aig_Man_t *p)

static void	Aig_ManRecycleMemory (Aig_Man_t p, Aig_Obj_t pEntry)

static int	Aig_ObjFanout0Int (Aig_Man_t *p, int ObjId)

static int	Aig_ObjFanoutNext (Aig_Man_t *p, int iFan)

ABC_DLL int	Aig_ManCheck (Aig_Man_t *p)
	FUNCTION DECLARATIONS ///. More...

void	Aig_ManCheckMarkA (Aig_Man_t *p)

void	Aig_ManCheckPhase (Aig_Man_t *p)

Aig_ManCut_t *	Aig_ComputeCuts (Aig_Man_t *pAig, int nCutsMax, int nLeafMax, int fTruth, int fVerbose)

void	Aig_ManCutStop (Aig_ManCut_t *p)

int	Aig_ManVerifyTopoOrder (Aig_Man_t *p)
	DECLARATIONS ///. More...

Vec_Ptr_t *	Aig_ManDfs (Aig_Man_t *p, int fNodesOnly)

Vec_Ptr_t *	Aig_ManDfsAll (Aig_Man_t *p)

Vec_Ptr_t *	Aig_ManDfsPreorder (Aig_Man_t *p, int fNodesOnly)

Vec_Vec_t *	Aig_ManLevelize (Aig_Man_t *p)

Vec_Ptr_t *	Aig_ManDfsNodes (Aig_Man_t p, Aig_Obj_t *ppNodes, int nNodes)

Vec_Ptr_t *	Aig_ManDfsChoices (Aig_Man_t *p)

Vec_Ptr_t *	Aig_ManDfsReverse (Aig_Man_t *p)

int	Aig_ManLevelNum (Aig_Man_t *p)

int	Aig_ManChoiceLevel (Aig_Man_t *p)

int	Aig_DagSize (Aig_Obj_t *pObj)

int	Aig_SupportSize (Aig_Man_t p, Aig_Obj_t pObj)

Vec_Ptr_t *	Aig_Support (Aig_Man_t p, Aig_Obj_t pObj)

void	Aig_SupportNodes (Aig_Man_t p, Aig_Obj_t ppObjs, int nObjs, Vec_Ptr_t vSupp)

void	Aig_ConeUnmark_rec (Aig_Obj_t *pObj)

Aig_Obj_t *	Aig_Transfer (Aig_Man_t pSour, Aig_Man_t pDest, Aig_Obj_t *pObj, int nVars)

Aig_Obj_t *	Aig_Compose (Aig_Man_t p, Aig_Obj_t pRoot, Aig_Obj_t *pFunc, int iVar)

void	Aig_ObjCollectCut (Aig_Obj_t pRoot, Vec_Ptr_t vLeaves, Vec_Ptr_t *vNodes)

int	Aig_ObjCollectSuper (Aig_Obj_t pObj, Vec_Ptr_t vSuper)

Aig_Obj_t *	Aig_ManDupSimpleDfs_rec (Aig_Man_t pNew, Aig_Man_t p, Aig_Obj_t *pObj)

Aig_Man_t *	Aig_ManDupSimple (Aig_Man_t *p)
	DECLARATIONS ///. More...

Aig_Man_t *	Aig_ManDupSimpleWithHints (Aig_Man_t p, Vec_Int_t vHints)

Aig_Man_t *	Aig_ManDupSimpleDfs (Aig_Man_t *p)

Aig_Man_t *	Aig_ManDupSimpleDfsPart (Aig_Man_t p, Vec_Ptr_t vPis, Vec_Ptr_t *vCos)

Aig_Man_t *	Aig_ManDupOrdered (Aig_Man_t *p)

Aig_Man_t *	Aig_ManDupCof (Aig_Man_t *p, int iInput, int Value)

Aig_Man_t *	Aig_ManDupTrim (Aig_Man_t *p)

Aig_Man_t *	Aig_ManDupExor (Aig_Man_t *p)

Aig_Man_t *	Aig_ManDupDfs (Aig_Man_t *p)

Vec_Ptr_t *	Aig_ManOrderPios (Aig_Man_t p, Aig_Man_t pOrder)

Aig_Man_t *	Aig_ManDupDfsGuided (Aig_Man_t p, Vec_Ptr_t vPios)

Aig_Man_t *	Aig_ManDupLevelized (Aig_Man_t *p)

Aig_Man_t *	Aig_ManDupWithoutPos (Aig_Man_t *p)

Aig_Man_t *	Aig_ManDupFlopsOnly (Aig_Man_t *p)

Aig_Man_t *	Aig_ManDupRepres (Aig_Man_t *p)

Aig_Man_t *	Aig_ManDupRepresDfs (Aig_Man_t *p)

Aig_Man_t *	Aig_ManCreateMiter (Aig_Man_t p1, Aig_Man_t p2, int fImpl)

Aig_Man_t *	Aig_ManDupOrpos (Aig_Man_t *p, int fAddRegs)

Aig_Man_t *	Aig_ManDupOneOutput (Aig_Man_t *p, int iPoNum, int fAddRegs)

Aig_Man_t *	Aig_ManDupUnsolvedOutputs (Aig_Man_t *p, int fAddRegs)

Aig_Man_t *	Aig_ManDupArray (Vec_Ptr_t *vArray)

Aig_Man_t *	Aig_ManDupNodes (Aig_Man_t pMan, Vec_Ptr_t vArray)

void	Aig_ObjAddFanout (Aig_Man_t p, Aig_Obj_t pObj, Aig_Obj_t *pFanout)

void	Aig_ObjRemoveFanout (Aig_Man_t p, Aig_Obj_t pObj, Aig_Obj_t *pFanout)

void	Aig_ManFanoutStart (Aig_Man_t *p)
	FUNCTION DEFINITIONS ///. More...

void	Aig_ManFanoutStop (Aig_Man_t *p)

Aig_Man_t *	Aig_ManFrames (Aig_Man_t pAig, int nFs, int fInit, int fOuts, int fRegs, int fEnlarge, Aig_Obj_t **ppObjMap)
	FUNCTION DEFINITIONS ///. More...

Aig_Man_t *	Aig_ManStart (int nNodesMax)
	DECLARATIONS ///. More...

Aig_Man_t *	Aig_ManStartFrom (Aig_Man_t *p)

Aig_Man_t *	Aig_ManExtractMiter (Aig_Man_t p, Aig_Obj_t pNode1, Aig_Obj_t *pNode2)

void	Aig_ManStop (Aig_Man_t *p)

void	Aig_ManStopP (Aig_Man_t **p)

int	Aig_ManCleanup (Aig_Man_t *p)

int	Aig_ManAntiCleanup (Aig_Man_t *p)

int	Aig_ManCiCleanup (Aig_Man_t *p)

int	Aig_ManCoCleanup (Aig_Man_t *p)

void	Aig_ManPrintStats (Aig_Man_t *p)

void	Aig_ManReportImprovement (Aig_Man_t p, Aig_Man_t pNew)

void	Aig_ManSetRegNum (Aig_Man_t *p, int nRegs)

void	Aig_ManFlipFirstPo (Aig_Man_t *p)

void *	Aig_ManReleaseData (Aig_Man_t *p)

void	Aig_ManStartMemory (Aig_Man_t *p)

void	Aig_ManStopMemory (Aig_Man_t *p)

int	Aig_NodeRef_rec (Aig_Obj_t *pNode, unsigned LevelMin)

int	Aig_NodeDeref_rec (Aig_Obj_t pNode, unsigned LevelMin, float pPower, float *pProbs)
	DECLARATIONS ///. More...

int	Aig_NodeMffcSupp (Aig_Man_t p, Aig_Obj_t pNode, int LevelMin, Vec_Ptr_t *vSupp)

int	Aig_NodeMffcLabel (Aig_Man_t p, Aig_Obj_t pNode, float *pPower)

int	Aig_NodeMffcLabelCut (Aig_Man_t p, Aig_Obj_t pNode, Vec_Ptr_t *vLeaves)

int	Aig_NodeMffcExtendCut (Aig_Man_t p, Aig_Obj_t pNode, Vec_Ptr_t vLeaves, Vec_Ptr_t vResult)

Aig_Obj_t *	Aig_ObjCreateCi (Aig_Man_t *p)
	DECLARATIONS ///. More...

Aig_Obj_t *	Aig_ObjCreateCo (Aig_Man_t p, Aig_Obj_t pDriver)

Aig_Obj_t *	Aig_ObjCreate (Aig_Man_t p, Aig_Obj_t pGhost)

void	Aig_ObjConnect (Aig_Man_t p, Aig_Obj_t pObj, Aig_Obj_t pFan0, Aig_Obj_t pFan1)

void	Aig_ObjDisconnect (Aig_Man_t p, Aig_Obj_t pObj)

void	Aig_ObjDelete (Aig_Man_t p, Aig_Obj_t pObj)

void	Aig_ObjDelete_rec (Aig_Man_t p, Aig_Obj_t pObj, int fFreeTop)

void	Aig_ObjDeletePo (Aig_Man_t p, Aig_Obj_t pObj)

void	Aig_ObjPrint (Aig_Man_t p, Aig_Obj_t pObj)

void	Aig_ObjPatchFanin0 (Aig_Man_t p, Aig_Obj_t pObj, Aig_Obj_t *pFaninNew)

void	Aig_ObjReplace (Aig_Man_t p, Aig_Obj_t pObjOld, Aig_Obj_t *pObjNew, int fUpdateLevel)

Aig_Obj_t *	Aig_IthVar (Aig_Man_t *p, int i)
	FUNCTION DEFINITIONS ///. More...

Aig_Obj_t *	Aig_Oper (Aig_Man_t p, Aig_Obj_t p0, Aig_Obj_t *p1, Aig_Type_t Type)

Aig_Obj_t *	Aig_And (Aig_Man_t p, Aig_Obj_t p0, Aig_Obj_t *p1)

Aig_Obj_t *	Aig_Or (Aig_Man_t p, Aig_Obj_t p0, Aig_Obj_t *p1)

Aig_Obj_t *	Aig_Exor (Aig_Man_t p, Aig_Obj_t p0, Aig_Obj_t *p1)

Aig_Obj_t *	Aig_Mux (Aig_Man_t p, Aig_Obj_t pC, Aig_Obj_t p1, Aig_Obj_t p0)

Aig_Obj_t *	Aig_Maj (Aig_Man_t p, Aig_Obj_t pA, Aig_Obj_t pB, Aig_Obj_t pC)

Aig_Obj_t *	Aig_Multi (Aig_Man_t p, Aig_Obj_t *pArgs, int nArgs, Aig_Type_t Type)

Aig_Obj_t *	Aig_Miter (Aig_Man_t p, Vec_Ptr_t vPairs)

Aig_Obj_t *	Aig_MiterTwo (Aig_Man_t p, Vec_Ptr_t vNodes1, Vec_Ptr_t *vNodes2)

Aig_Obj_t *	Aig_CreateAnd (Aig_Man_t *p, int nVars)

Aig_Obj_t *	Aig_CreateOr (Aig_Man_t *p, int nVars)

Aig_Obj_t *	Aig_CreateExor (Aig_Man_t *p, int nVars)

void	Aig_ManOrderStart (Aig_Man_t *p)
	DECLARATIONS ///. More...

void	Aig_ManOrderStop (Aig_Man_t *p)

void	Aig_ObjOrderInsert (Aig_Man_t *p, int ObjId)

void	Aig_ObjOrderRemove (Aig_Man_t *p, int ObjId)

void	Aig_ObjOrderAdvance (Aig_Man_t *p)

Vec_Ptr_t *	Aig_ManSupports (Aig_Man_t *p)

Vec_Ptr_t *	Aig_ManSupportsInverse (Aig_Man_t *p)

Vec_Ptr_t *	Aig_ManSupportsRegisters (Aig_Man_t *p)

Vec_Ptr_t *	Aig_ManPartitionSmart (Aig_Man_t p, int nPartSizeLimit, int fVerbose, Vec_Ptr_t *pvPartSupps)

Vec_Ptr_t *	Aig_ManPartitionSmartRegisters (Aig_Man_t *pAig, int nSuppSizeLimit, int fVerbose)

Vec_Ptr_t *	Aig_ManPartitionNaive (Aig_Man_t *p, int nPartSize)

Vec_Ptr_t *	Aig_ManMiterPartitioned (Aig_Man_t p1, Aig_Man_t p2, int nPartSize, int fSmart)

Aig_Man_t *	Aig_ManChoicePartitioned (Vec_Ptr_t *vAigs, int nPartSize, int nConfMax, int nLevelMax, int fVerbose)

Aig_Man_t *	Aig_ManFraigPartitioned (Aig_Man_t *pAig, int nPartSize, int nConfMax, int nLevelMax, int fVerbose)

Aig_Man_t *	Aig_ManChoiceConstructive (Vec_Ptr_t *vAigs, int fVerbose)

Vec_Ptr_t *	Aig_ManRegPartitionSimple (Aig_Man_t *pAig, int nPartSize, int nOverSize)

void	Aig_ManPartDivide (Vec_Ptr_t vResult, Vec_Int_t vDomain, int nPartSize, int nOverSize)

Vec_Ptr_t *	Aig_ManRegPartitionSmart (Aig_Man_t *pAig, int nPartSize)

Aig_Man_t *	Aig_ManRegCreatePart (Aig_Man_t pAig, Vec_Int_t vPart, int pnCountPis, int pnCountRegs, int **ppMapBack)

Vec_Ptr_t *	Aig_ManRegProjectOnehots (Aig_Man_t pAig, Aig_Man_t pPart, Vec_Ptr_t *vOnehots, int fVerbose)

void	Aig_ManReprStart (Aig_Man_t *p, int nIdMax)
	DECLARATIONS ///. More...

void	Aig_ManReprStop (Aig_Man_t *p)

void	Aig_ObjCreateRepr (Aig_Man_t p, Aig_Obj_t pNode1, Aig_Obj_t *pNode2)

void	Aig_ManTransferRepr (Aig_Man_t pNew, Aig_Man_t p)

Aig_Man_t *	Aig_ManDupRepr (Aig_Man_t *p, int fOrdered)

Aig_Man_t *	Aig_ManDupReprBasic (Aig_Man_t *p)

int	Aig_ManCountReprs (Aig_Man_t *p)

Aig_Man_t *	Aig_ManRehash (Aig_Man_t *p)

int	Aig_ObjCheckTfi (Aig_Man_t p, Aig_Obj_t pNew, Aig_Obj_t *pOld)

void	Aig_ManMarkValidChoices (Aig_Man_t *p)

int	Aig_TransferMappedClasses (Aig_Man_t pAig, Aig_Man_t pPart, int *pMapBack)

Aig_Man_t *	Rtm_ManRetime (Aig_Man_t *p, int fForward, int nStepsMax, int fVerbose)

Aig_Man_t *	Aig_ManRetimeFrontier (Aig_Man_t *p, int nStepsMax)

Aig_Man_t *	Aig_ManRemap (Aig_Man_t p, Vec_Ptr_t vMap)
	DECLARATIONS ///. More...

int	Aig_ManSeqCleanup (Aig_Man_t *p)

int	Aig_ManSeqCleanupBasic (Aig_Man_t *p)

int	Aig_ManCountMergeRegs (Aig_Man_t *p)

Aig_Man_t *	Aig_ManReduceLaches (Aig_Man_t *p, int fVerbose)

void	Aig_ManComputeSccs (Aig_Man_t *p)

Aig_Man_t *	Aig_ManScl (Aig_Man_t *pAig, int fLatchConst, int fLatchEqual, int fUseMvSweep, int nFramesSymb, int nFramesSatur, int fVerbose, int fVeryVerbose)

void	Aig_ManShow (Aig_Man_t pMan, int fHaig, Vec_Ptr_t vBold)

Aig_Obj_t *	Aig_TableLookup (Aig_Man_t p, Aig_Obj_t pGhost)

Aig_Obj_t *	Aig_TableLookupTwo (Aig_Man_t p, Aig_Obj_t pFanin0, Aig_Obj_t *pFanin1)

void	Aig_TableInsert (Aig_Man_t p, Aig_Obj_t pObj)

void	Aig_TableDelete (Aig_Man_t p, Aig_Obj_t pObj)

int	Aig_TableCountEntries (Aig_Man_t *p)

void	Aig_TableProfile (Aig_Man_t *p)

void	Aig_TableClear (Aig_Man_t *p)

void	Aig_ObjClearReverseLevel (Aig_Man_t p, Aig_Obj_t pObj)

int	Aig_ObjRequiredLevel (Aig_Man_t p, Aig_Obj_t pObj)

void	Aig_ManStartReverseLevels (Aig_Man_t *p, int nMaxLevelIncrease)

void	Aig_ManStopReverseLevels (Aig_Man_t *p)

void	Aig_ManUpdateLevel (Aig_Man_t p, Aig_Obj_t pObjNew)

void	Aig_ManUpdateReverseLevel (Aig_Man_t p, Aig_Obj_t pObjNew)

void	Aig_ManVerifyLevel (Aig_Man_t *p)

void	Aig_ManVerifyReverseLevel (Aig_Man_t *p)

unsigned *	Aig_ManCutTruth (Aig_Obj_t pRoot, Vec_Ptr_t vLeaves, Vec_Ptr_t vNodes, Vec_Ptr_t vTruthElem, Vec_Ptr_t *vTruthStore)

Aig_Man_t *	Aig_ManConstReduce (Aig_Man_t *p, int fUseMvSweep, int nFramesSymb, int nFramesSatur, int fVerbose, int fVeryVerbose)

void	Aig_ManIncrementTravId (Aig_Man_t *p)
	DECLARATIONS ///. More...

char *	Aig_TimeStamp ()

int	Aig_ManHasNoGaps (Aig_Man_t *p)

int	Aig_ManLevels (Aig_Man_t *p)

void	Aig_ManResetRefs (Aig_Man_t *p)

void	Aig_ManCleanMarkA (Aig_Man_t *p)

void	Aig_ManCleanMarkB (Aig_Man_t *p)

void	Aig_ManCleanMarkAB (Aig_Man_t *p)

void	Aig_ManCleanData (Aig_Man_t *p)

void	Aig_ObjCleanData_rec (Aig_Obj_t *pObj)

void	Aig_ManCleanNext (Aig_Man_t *p)

void	Aig_ObjCollectMulti (Aig_Obj_t pFunc, Vec_Ptr_t vSuper)

int	Aig_ObjIsMuxType (Aig_Obj_t *pObj)

int	Aig_ObjRecognizeExor (Aig_Obj_t pObj, Aig_Obj_t ppFan0, Aig_Obj_t *ppFan1)

Aig_Obj_t *	Aig_ObjRecognizeMux (Aig_Obj_t pObj, Aig_Obj_t ppObjT, Aig_Obj_t *ppObjE)

Aig_Obj_t *	Aig_ObjReal_rec (Aig_Obj_t *pObj)

int	Aig_ObjCompareIdIncrease (Aig_Obj_t pp1, Aig_Obj_t pp2)

void	Aig_ObjPrintEqn (FILE pFile, Aig_Obj_t pObj, Vec_Vec_t *vLevels, int Level)

void	Aig_ObjPrintVerilog (FILE pFile, Aig_Obj_t pObj, Vec_Vec_t *vLevels, int Level)

void	Aig_ObjPrintVerbose (Aig_Obj_t *pObj, int fHaig)

void	Aig_ManPrintVerbose (Aig_Man_t *p, int fHaig)

void	Aig_ManDump (Aig_Man_t *p)

void	Aig_ManDumpBlif (Aig_Man_t p, char pFileName, Vec_Ptr_t vPiNames, Vec_Ptr_t vPoNames)

void	Aig_ManDumpVerilog (Aig_Man_t p, char pFileName)

void	Aig_ManSetCioIds (Aig_Man_t *p)

void	Aig_ManCleanCioIds (Aig_Man_t *p)

int	Aig_ManChoiceNum (Aig_Man_t *p)

char *	Aig_FileNameGenericAppend (char pBase, char pSuffix)

unsigned	Aig_ManRandom (int fReset)

word	Aig_ManRandom64 (int fReset)

void	Aig_ManRandomInfo (Vec_Ptr_t *vInfo, int iInputStart, int iWordStart, int iWordStop)

void	Aig_NodeUnionLists (Vec_Ptr_t vArr1, Vec_Ptr_t vArr2, Vec_Ptr_t *vArr)

void	Aig_NodeIntersectLists (Vec_Ptr_t vArr1, Vec_Ptr_t vArr2, Vec_Ptr_t *vArr)

void	Aig_ManSetPhase (Aig_Man_t *pAig)

Vec_Ptr_t *	Aig_ManMuxesCollect (Aig_Man_t *pAig)

void	Aig_ManMuxesDeref (Aig_Man_t pAig, Vec_Ptr_t vMuxes)

void	Aig_ManMuxesRef (Aig_Man_t pAig, Vec_Ptr_t vMuxes)

void	Aig_ManInvertConstraints (Aig_Man_t *pAig)

void	Aig_ManFindCut (Aig_Obj_t pRoot, Vec_Ptr_t vFront, Vec_Ptr_t *vVisited, int nSizeLimit, int nFanoutLimit)

Aig_MmFixed_t *	Aig_MmFixedStart (int nEntrySize, int nEntriesMax)
	FUNCTION DEFINITIONS ///. More...

void	Aig_MmFixedStop (Aig_MmFixed_t *p, int fVerbose)

char *	Aig_MmFixedEntryFetch (Aig_MmFixed_t *p)

void	Aig_MmFixedEntryRecycle (Aig_MmFixed_t p, char pEntry)

void	Aig_MmFixedRestart (Aig_MmFixed_t *p)

int	Aig_MmFixedReadMemUsage (Aig_MmFixed_t *p)

int	Aig_MmFixedReadMaxEntriesUsed (Aig_MmFixed_t *p)

Aig_MmFlex_t *	Aig_MmFlexStart ()

void	Aig_MmFlexStop (Aig_MmFlex_t *p, int fVerbose)

char *	Aig_MmFlexEntryFetch (Aig_MmFlex_t *p, int nBytes)

void	Aig_MmFlexRestart (Aig_MmFlex_t *p)

int	Aig_MmFlexReadMemUsage (Aig_MmFlex_t *p)

Aig_MmStep_t *	Aig_MmStepStart (int nSteps)

void	Aig_MmStepStop (Aig_MmStep_t *p, int fVerbose)

char *	Aig_MmStepEntryFetch (Aig_MmStep_t *p, int nBytes)

void	Aig_MmStepEntryRecycle (Aig_MmStep_t p, char pEntry, int nBytes)

int	Aig_MmStepReadMemUsage (Aig_MmStep_t *p)

Macro Definition Documentation

#define Aig_CutForEachLeaf	(	p,
		pCut,
		pLeaf,
		i
	)	for ( i = 0; (i < (int)(pCut)->nFanins) && ((pLeaf) = Aig_ManObj(p, (pCut)->pFanins[i])); i++ )

Definition at line 221 of file aig.h.

#define Aig_ManForEachCi	(	p,
		pObj,
		i
	)	Vec_PtrForEachEntry( Aig_Obj_t *, p->vCis, pObj, i )

ITERATORS ///.

Definition at line 393 of file aig.h.

#define Aig_ManForEachCiReverse	(	p,
		pObj,
		i
	)	Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vCis, pObj, i )

Definition at line 395 of file aig.h.

#define Aig_ManForEachCo	(	p,
		pObj,
		i
	)	Vec_PtrForEachEntry( Aig_Obj_t *, p->vCos, pObj, i )

Definition at line 398 of file aig.h.

#define Aig_ManForEachCoReverse	(	p,
		pObj,
		i
	)	Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vCos, pObj, i )

Definition at line 400 of file aig.h.

#define Aig_ManForEachExor	(	p,
		pObj,
		i
	)	Vec_PtrForEachEntry( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL \|\| !Aig_ObjIsExor(pObj) ) {} else

Definition at line 418 of file aig.h.

#define Aig_ManForEachExorReverse	(	p,
		pObj,
		i
	)	Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL \|\| !Aig_ObjIsExor(pObj) ) {} else

Definition at line 420 of file aig.h.

#define Aig_ManForEachLiLoSeq	(	p,
		pObjLi,
		pObjLo,
		k
	)

Value:

for ( k = 0; (k < Aig_ManRegNum(p)) && (((pObjLi) = Aig_ManLi(p, k)), 1) \

&& (((pObjLo)=Aig_ManLo(p, k)), 1); k++ )

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

Aig_ManLi

static Aig_Obj_t * Aig_ManLi(Aig_Man_t *p, int i)

Definition: aig.h:269

Aig_ManLo

static Aig_Obj_t * Aig_ManLo(Aig_Man_t *p, int i)

Definition: aig.h:268

Aig_ManRegNum

static int Aig_ManRegNum(Aig_Man_t *p)

Definition: aig.h:260

Definition at line 450 of file aig.h.

#define Aig_ManForEachLiSeq	(	p,
		pObj,
		i
	)	Vec_PtrForEachEntryStart( Aig_Obj_t *, p->vCos, pObj, i, Aig_ManCoNum(p)-Aig_ManRegNum(p) )

Definition at line 447 of file aig.h.

#define Aig_ManForEachLoSeq	(	p,
		pObj,
		i
	)	Vec_PtrForEachEntryStart( Aig_Obj_t *, p->vCis, pObj, i, Aig_ManCiNum(p)-Aig_ManRegNum(p) )

Definition at line 441 of file aig.h.

#define Aig_ManForEachNode	(	p,
		pObj,
		i
	)	Vec_PtrForEachEntry( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL \|\| !Aig_ObjIsNode(pObj) ) {} else

Definition at line 413 of file aig.h.

#define Aig_ManForEachNodeReverse	(	p,
		pObj,
		i
	)	Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL \|\| !Aig_ObjIsNode(pObj) ) {} else

Definition at line 415 of file aig.h.

#define Aig_ManForEachObj	(	p,
		pObj,
		i
	)	Vec_PtrForEachEntry( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL ) {} else

Definition at line 403 of file aig.h.

#define Aig_ManForEachObjReverse	(	p,
		pObj,
		i
	)	Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL ) {} else

Definition at line 405 of file aig.h.

#define Aig_ManForEachObjVec	(	vIds,
		p,
		pObj,
		i
	)	for ( i = 0; i < Vec_IntSize(vIds) && (((pObj) = Aig_ManObj(p, Vec_IntEntry(vIds,i))), 1); i++ )

Definition at line 408 of file aig.h.

#define Aig_ManForEachObjVecReverse	(	vIds,
		p,
		pObj,
		i
	)	for ( i = Vec_IntSize(vIds) - 1; i >= 0 && (((pObj) = Aig_ManObj(p, Vec_IntEntry(vIds,i))), 1); i-- )

Definition at line 410 of file aig.h.

#define Aig_ManForEachPiSeq	(	p,
		pObj,
		i
	)	Vec_PtrForEachEntryStop( Aig_Obj_t *, p->vCis, pObj, i, Aig_ManCiNum(p)-Aig_ManRegNum(p) )

SEQUENTIAL ITERATORS ///.

Definition at line 438 of file aig.h.

#define Aig_ManForEachPoSeq	(	p,
		pObj,
		i
	)	Vec_PtrForEachEntryStop( Aig_Obj_t *, p->vCos, pObj, i, Aig_ManCoNum(p)-Aig_ManRegNum(p) )

Definition at line 444 of file aig.h.

#define Aig_ObjForEachCut	(	p,
		pObj,
		pCut,
		i
	)	for ( i = 0, pCut = Aig_ObjCuts(p, pObj); i < p->nCutsMax; i++, pCut = Aig_CutNext(pCut) )

Definition at line 218 of file aig.h.

#define Aig_ObjForEachFanout	(	p,
		pObj,
		pFanout,
		iFan,
		i
	)

Value:

for ( assert(p->pFanData), i = 0; (i < (int)(pObj)->nRefs) &&               \
          (((iFan) = i? Aig_ObjFanoutNext(p, iFan) : Aig_ObjFanout0Int(p, pObj->Id)), 1) && \
          (((pFanout) = Aig_ManObj(p, iFan>>1)), 1); i++ )

Definition at line 427 of file aig.h.

Typedef Documentation

typedef struct Aig_Cut_t_ Aig_Cut_t

Definition at line 176 of file aig.h.

typedef typedefABC_NAMESPACE_HEADER_START struct Aig_Man_t_ Aig_Man_t

INCLUDES ///.

CFile****************************************************************

FileName [aig.h]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [External declarations.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id:: aig.h,v 1.00 2007/04/28 00:00:00 alanmi Exp

]PARAMETERS ///BASIC TYPES ///

Definition at line 50 of file aig.h.

typedef struct Aig_ManCut_t_ Aig_ManCut_t

Definition at line 175 of file aig.h.

typedef struct Aig_MmFixed_t_ Aig_MmFixed_t

Definition at line 52 of file aig.h.

typedef struct Aig_MmFlex_t_ Aig_MmFlex_t

Definition at line 53 of file aig.h.

typedef struct Aig_MmStep_t_ Aig_MmStep_t

Definition at line 54 of file aig.h.

typedef struct Aig_Obj_t_ Aig_Obj_t

Definition at line 51 of file aig.h.

Enumeration Type Documentation

enum Aig_Type_t

Enumerator
AIG_OBJ_NONE
AIG_OBJ_CONST1
AIG_OBJ_CI
AIG_OBJ_CO
AIG_OBJ_BUF
AIG_OBJ_AND
AIG_OBJ_EXOR
AIG_OBJ_VOID

Definition at line 57 of file aig.h.

              { 
     AIG_OBJ_NONE,                    // 0: non-existent object
     AIG_OBJ_CONST1,                  // 1: constant 1 
     AIG_OBJ_CI,                      // 2: combinational input
     AIG_OBJ_CO,                      // 3: combinational output
     AIG_OBJ_BUF,                     // 4: buffer node
     AIG_OBJ_AND,                     // 5: AND node
     AIG_OBJ_EXOR,                    // 6: EXOR node
     AIG_OBJ_VOID                     // 7: unused object
 } Aig_Type_t;

Function Documentation

Aig_Obj_t* Aig_And	(	Aig_Man_t *	p,
		Aig_Obj_t *	p0,
		Aig_Obj_t *	p1
	)

Function*************************************************************

Synopsis [Performs canonicization step.]

Description [The argument nodes can be complemented.]

SideEffects []

SeeAlso []

Definition at line 104 of file aigOper.c.

 {
     Aig_Obj_t * pGhost, * pResult;
     Aig_Obj_t * pFan0, * pFan1;
     // check trivial cases
     if ( p0 == p1 )
         return p0;
     if ( p0 == Aig_Not(p1) )
         return Aig_Not(p->pConst1);
     if ( Aig_Regular(p0) == p->pConst1 )
         return p0 == p->pConst1 ? p1 : Aig_Not(p->pConst1);
     if ( Aig_Regular(p1) == p->pConst1 )
         return p1 == p->pConst1 ? p0 : Aig_Not(p->pConst1);
     // check not so trivial cases
     if ( p->fAddStrash && (Aig_ObjIsNode(Aig_Regular(p0)) || Aig_ObjIsNode(Aig_Regular(p1))) )
     { // http://fmv.jku.at/papers/BrummayerBiere-MEMICS06.pdf
         Aig_Obj_t * pFanA, * pFanB, * pFanC, * pFanD;
         pFanA = Aig_ObjChild0(Aig_Regular(p0));
         pFanB = Aig_ObjChild1(Aig_Regular(p0));
         pFanC = Aig_ObjChild0(Aig_Regular(p1));
         pFanD = Aig_ObjChild1(Aig_Regular(p1));
         if ( Aig_IsComplement(p0) )
         {
             if ( pFanA == Aig_Not(p1) || pFanB == Aig_Not(p1) )
                 return p1;
             if ( pFanB == p1 )
                 return Aig_And( p, Aig_Not(pFanA), pFanB );
             if ( pFanA == p1 )
                 return Aig_And( p, Aig_Not(pFanB), pFanA );
         }
         else
         {
             if ( pFanA == Aig_Not(p1) || pFanB == Aig_Not(p1) )
                 return Aig_Not(p->pConst1);
             if ( pFanA == p1 || pFanB == p1 )
                 return p0;
         }
         if ( Aig_IsComplement(p1) )
         {
             if ( pFanC == Aig_Not(p0) || pFanD == Aig_Not(p0) )
                 return p0;
             if ( pFanD == p0 )
                 return Aig_And( p, Aig_Not(pFanC), pFanD );
             if ( pFanC == p0 )
                 return Aig_And( p, Aig_Not(pFanD), pFanC );
         }
         else
         {
             if ( pFanC == Aig_Not(p0) || pFanD == Aig_Not(p0) )
                 return Aig_Not(p->pConst1);
             if ( pFanC == p0 || pFanD == p0 )
                 return p1;
         }
         if ( !Aig_IsComplement(p0) && !Aig_IsComplement(p1) ) 
         {
             if ( pFanA == Aig_Not(pFanC) || pFanA == Aig_Not(pFanD) || pFanB == Aig_Not(pFanC) || pFanB == Aig_Not(pFanD) )
                 return Aig_Not(p->pConst1);
             if ( pFanA == pFanC || pFanB == pFanC )
                 return Aig_And( p, p0, pFanD );
             if ( pFanB == pFanC || pFanB == pFanD )
                 return Aig_And( p, pFanA, p1 );
             if ( pFanA == pFanD || pFanB == pFanD )
                 return Aig_And( p, p0, pFanC );
             if ( pFanA == pFanC || pFanA == pFanD )
                 return Aig_And( p, pFanB, p1 );
         }
         else if ( Aig_IsComplement(p0) && !Aig_IsComplement(p1) )
         {
             if ( pFanA == Aig_Not(pFanC) || pFanA == Aig_Not(pFanD) || pFanB == Aig_Not(pFanC) || pFanB == Aig_Not(pFanD) )
                 return p1;
             if ( pFanB == pFanC || pFanB == pFanD )
                 return Aig_And( p, Aig_Not(pFanA), p1 );
             if ( pFanA == pFanC || pFanA == pFanD )
                 return Aig_And( p, Aig_Not(pFanB), p1 );
         }
         else if ( !Aig_IsComplement(p0) && Aig_IsComplement(p1) )
         {
             if ( pFanC == Aig_Not(pFanA) || pFanC == Aig_Not(pFanB) || pFanD == Aig_Not(pFanA) || pFanD == Aig_Not(pFanB) )
                 return p0;
             if ( pFanD == pFanA || pFanD == pFanB )
                 return Aig_And( p, Aig_Not(pFanC), p0 );
             if ( pFanC == pFanA || pFanC == pFanB )
                 return Aig_And( p, Aig_Not(pFanD), p0 );
         }
         else // if ( Aig_IsComplement(p0) && Aig_IsComplement(p1) )
         {
             if ( pFanA == pFanD && pFanB == Aig_Not(pFanC) )
                 return Aig_Not(pFanA);
             if ( pFanB == pFanC && pFanA == Aig_Not(pFanD) )
                 return Aig_Not(pFanB);
             if ( pFanA == pFanC && pFanB == Aig_Not(pFanD) )
                 return Aig_Not(pFanA);
             if ( pFanB == pFanD && pFanA == Aig_Not(pFanC) )
                 return Aig_Not(pFanB);
         }
     }
     // check if it can be an EXOR gate
     if ( p->fCatchExor && Aig_ObjIsExorType( p0, p1, &pFan0, &pFan1 ) )
         return Aig_Exor( p, pFan0, pFan1 );
     pGhost = Aig_ObjCreateGhost( p, p0, p1, AIG_OBJ_AND );
     if ( (pResult = Aig_TableLookup( p, pGhost )) )
         return pResult;
     return Aig_ObjCreate( p, pGhost );
 }

Aig_Obj_t* Aig_Compose	(	Aig_Man_t *	p,
		Aig_Obj_t *	pRoot,
		Aig_Obj_t *	pFunc,
		int	iVar
	)

Function*************************************************************

Synopsis [Composes the AIG (pRoot) with the function (pFunc) using PI var (iVar).]

Description []

SideEffects []

SeeAlso []

Definition at line 966 of file aigDfs.c.

 {
     // quit if the PI variable is not defined
     if ( iVar >= Aig_ManCiNum(p) )
     {
         printf( "Aig_Compose(): The PI variable %d is not defined.\n", iVar );
         return NULL;
     }
     // recursively perform composition
     Aig_Compose_rec( p, Aig_Regular(pRoot), pFunc, Aig_ManCi(p, iVar) );
     // clear the markings
     Aig_ConeUnmark_rec( Aig_Regular(pRoot) );
     return Aig_NotCond( (Aig_Obj_t *)Aig_Regular(pRoot)->pData, Aig_IsComplement(pRoot) );
 }

Aig_ManCut_t* Aig_ComputeCuts	(	Aig_Man_t *	pAig,
		int	nCutsMax,
		int	nLeafMax,
		int	fTruth,
		int	fVerbose
	)

Function*************************************************************

Synopsis [Computes the cuts for all nodes in the static AIG.]

Description []

SideEffects []

SeeAlso []

Definition at line 631 of file aigCuts.c.

 {
     Aig_ManCut_t * p;
     Aig_Obj_t * pObj;
     int i;
     abctime clk = Abc_Clock();
     assert( pAig->pManCuts == NULL );
     // start the manager
     p = Aig_ManCutStart( pAig, nCutsMax, nLeafMax, fTruth, fVerbose );
     // set elementary cuts at the PIs
     Aig_ManForEachCi( pAig, pObj, i )
         Aig_ObjPrepareCuts( p, pObj, 1 );
     // process the nodes
     Aig_ManForEachNode( pAig, pObj, i )
         Aig_ObjComputeCuts( p, pObj, 1 );
     // print stats
     if ( fVerbose )
     {
         int nCuts, nCutsK;
         nCuts = Aig_ManCutCount( p, &nCutsK );
         printf( "Nodes = %6d. Total cuts = %6d. %d-input cuts = %6d.\n",
             Aig_ManObjNum(pAig), nCuts, nLeafMax, nCutsK );
         printf( "Cut size = %2d. Truth size = %2d. Total mem = %5.2f MB  ",
             p->nCutSize, 4*p->nTruthWords, 1.0*Aig_MmFixedReadMemUsage(p->pMemCuts)/(1<<20) );
         ABC_PRT( "Runtime", Abc_Clock() - clk );
 /*
         Aig_ManForEachNode( pAig, pObj, i )
             if ( i % 300 == 0 )
                 Aig_ObjCutPrint( p, pObj );
 */
     }
     // remember the cut manager
     pAig->pManCuts = p;
     return p;
 }

void Aig_ConeUnmark_rec ( Aig_Obj_t * pObj )

Function*************************************************************

Synopsis [Counts the number of AIG nodes rooted at this cone.]

Description []

SideEffects []

SeeAlso []

Definition at line 690 of file aigDfs.c.

 {
     assert( !Aig_IsComplement(pObj) );
     if ( !Aig_ObjIsNode(pObj) || !Aig_ObjIsMarkA(pObj) )
         return;
     Aig_ConeUnmark_rec( Aig_ObjFanin0(pObj) ); 
     Aig_ConeUnmark_rec( Aig_ObjFanin1(pObj) );
     assert( Aig_ObjIsMarkA(pObj) ); // loop detection
     Aig_ObjClearMarkA( pObj );
 }

Aig_Obj_t* Aig_CreateAnd	(	Aig_Man_t *	p,
		int	nVars
	)

Function*************************************************************

Synopsis [Creates AND function with nVars inputs.]

Description []

SideEffects []

SeeAlso []

Definition at line 474 of file aigOper.c.

 {
     Aig_Obj_t * pFunc;
     int i;
     pFunc = Aig_ManConst1( p );
     for ( i = 0; i < nVars; i++ )
         pFunc = Aig_And( p, pFunc, Aig_IthVar(p, i) );
     return pFunc;
 }

Aig_Obj_t* Aig_CreateExor	(	Aig_Man_t *	p,
		int	nVars
	)

Function*************************************************************

Synopsis [Creates AND function with nVars inputs.]

Description []

SideEffects []

SeeAlso []

Definition at line 516 of file aigOper.c.

 {
     Aig_Obj_t * pFunc;
     int i;
     pFunc = Aig_ManConst0( p );
     for ( i = 0; i < nVars; i++ )
         pFunc = Aig_Exor( p, pFunc, Aig_IthVar(p, i) );
     return pFunc;
 }

Aig_Obj_t* Aig_CreateOr	(	Aig_Man_t *	p,
		int	nVars
	)

Function*************************************************************

Synopsis [Creates AND function with nVars inputs.]

Description []

SideEffects []

SeeAlso []

Definition at line 495 of file aigOper.c.

 {
     Aig_Obj_t * pFunc;
     int i;
     pFunc = Aig_ManConst0( p );
     for ( i = 0; i < nVars; i++ )
         pFunc = Aig_Or( p, pFunc, Aig_IthVar(p, i) );
     return pFunc;
 }

static int Aig_CutLeaveNum ( Aig_Cut_t * pCut )

inlinestatic

Definition at line 212 of file aig.h.

212 { return pCut->nFanins; }

Aig_Cut_t_::nFanins

char nFanins

Definition: aig.h:187

static int* Aig_CutLeaves ( Aig_Cut_t * pCut )

inlinestatic

Definition at line 213 of file aig.h.

213 { return pCut->pFanins; }

Aig_Cut_t_::pFanins

int pFanins[0]

Definition: aig.h:188

static Aig_Cut_t* Aig_CutNext ( Aig_Cut_t * pCut )

inlinestatic

Definition at line 215 of file aig.h.

215 { return (Aig_Cut_t *)(((char *)pCut) + pCut->nCutSize); }

Aig_Cut_t_::nCutSize

short nCutSize

Definition: aig.h:185

Aig_Cut_t_

Definition: aig.h:179

static unsigned* Aig_CutTruth ( Aig_Cut_t * pCut )

inlinestatic

Definition at line 214 of file aig.h.

214 { return (unsigned *)(pCut->pFanins + pCut->nLeafMax); }

Aig_Cut_t_::nLeafMax

char nLeafMax

Definition: aig.h:186

Aig_Cut_t_::pFanins

int pFanins[0]

Definition: aig.h:188

int Aig_DagSize ( Aig_Obj_t * pObj )

Function*************************************************************

Synopsis [Counts the number of AIG nodes rooted at this cone.]

Description []

SideEffects []

SeeAlso []

Definition at line 712 of file aigDfs.c.

 {
     int Counter;
     Counter = Aig_ConeCountAndMark_rec( Aig_Regular(pObj) );
     Aig_ConeUnmark_rec( Aig_Regular(pObj) );
     return Counter;
 }

Aig_Obj_t* Aig_Exor	(	Aig_Man_t *	p,
		Aig_Obj_t *	p0,
		Aig_Obj_t *	p1
	)

Function*************************************************************

Synopsis [Performs canonicization step.]

Description [The argument nodes can be complemented.]

SideEffects []

SeeAlso []

Definition at line 220 of file aigOper.c.

 {
     Aig_Obj_t * pGhost, * pResult;
     int fCompl;
     // check trivial cases
     if ( p0 == p1 )
         return Aig_Not(p->pConst1);
     if ( p0 == Aig_Not(p1) )
         return p->pConst1;
     if ( Aig_Regular(p0) == p->pConst1 )
         return Aig_NotCond( p1, p0 == p->pConst1 );
     if ( Aig_Regular(p1) == p->pConst1 )
         return Aig_NotCond( p0, p1 == p->pConst1 );
     // when there is no special XOR gates
     if ( !p->fCatchExor )
         return Aig_Or( p, Aig_And(p, p0, Aig_Not(p1)), Aig_And(p, Aig_Not(p0), p1) );
     // canonicize
     fCompl = Aig_IsComplement(p0) ^ Aig_IsComplement(p1);
     p0 = Aig_Regular(p0);
     p1 = Aig_Regular(p1);
     pGhost = Aig_ObjCreateGhost( p, p0, p1, AIG_OBJ_EXOR );
     // check the table
     if ( (pResult = Aig_TableLookup( p, pGhost )) )
         return Aig_NotCond( pResult, fCompl );
     pResult = Aig_ObjCreate( p, pGhost );
     return Aig_NotCond( pResult, fCompl );
 }

char* Aig_FileNameGenericAppend	(	char *	pBase,
		char *	pSuffix
	)

Function*************************************************************

Synopsis [Returns the composite name of the file.]

Description []

SideEffects []

SeeAlso []

Definition at line 1070 of file aigUtil.c.

 {
     static char Buffer[1000];
     char * pDot;
     strcpy( Buffer, pBase );
     if ( (pDot = strrchr( Buffer, '.' )) )
         *pDot = 0;
     strcat( Buffer, pSuffix );
     if ( (pDot = strrchr( Buffer, '\\' )) || (pDot = strrchr( Buffer, '/' )) )
         return pDot+1;
     return Buffer;
 }

static int Aig_IsComplement ( Aig_Obj_t * p )

inlinestatic

Definition at line 249 of file aig.h.

249 { return (int)((ABC_PTRUINT_T)(p) & 01); }

Aig_Obj_t* Aig_IthVar	(	Aig_Man_t *	p,
		int	i
	)

FUNCTION DEFINITIONS ///.

Function*************************************************************

Synopsis [Returns i-th elementary variable.]

Description []

SideEffects []

SeeAlso []

Definition at line 63 of file aigOper.c.

 {
     int v;
     for ( v = Aig_ManCiNum(p); v <= i; v++ )
         Aig_ObjCreateCi( p );
     assert( i < Vec_PtrSize(p->vCis) );
     return Aig_ManCi( p, i );
 }

Aig_Obj_t* Aig_Maj	(	Aig_Man_t *	p,
		Aig_Obj_t *	pA,
		Aig_Obj_t *	pB,
		Aig_Obj_t *	pC
	)

Function*************************************************************

Synopsis [Implements ITE operation.]

Description []

SideEffects []

SeeAlso []

Definition at line 376 of file aigOper.c.

 {
     return Aig_Or( p, Aig_Or(p, Aig_And(p, pA, pB), Aig_And(p, pA, pC)), Aig_And(p, pB, pC) );
 }

static int Aig_ManAndNum ( Aig_Man_t * p )

inlinestatic

Definition at line 254 of file aig.h.

254 { return p->nObjs[AIG_OBJ_AND]; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

AIG_OBJ_AND

Definition: aig.h:63

int Aig_ManAntiCleanup ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Adds POs for the nodes that otherwise would be dangling.]

Description [Returns the number of POs added.]

SideEffects []

SeeAlso []

Definition at line 293 of file aigMan.c.

 {
     Aig_Obj_t * pNode;
     int i, nNodesOld = Aig_ManCoNum(p);
     Aig_ManForEachObj( p, pNode, i )
         if ( Aig_ObjIsNode(pNode) && Aig_ObjRefs(pNode) == 0 )
             Aig_ObjCreateCo( p, pNode );
     return nNodesOld - Aig_ManCoNum(p);
 }

static int Aig_ManBufNum ( Aig_Man_t * p )

inlinestatic

Definition at line 253 of file aig.h.

253 { return p->nObjs[AIG_OBJ_BUF]; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

AIG_OBJ_BUF

Definition: aig.h:62

ABC_DLL int Aig_ManCheck ( Aig_Man_t * p )

FUNCTION DECLARATIONS ///.

CFile****************************************************************

FileName [aigCheck.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [AIG checking procedures.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id:: aigCheck.c,v 1.00 2007/04/28 00:00:00 alanmi Exp

]FUNCTION DEFINITIONS /// Function*************************************************************

Synopsis [Checks the consistency of the AIG manager.]

Description []

SideEffects []

SeeAlso []

Definition at line 45 of file aigCheck.c.

 {
     Aig_Obj_t * pObj, * pObj2;
     int i;
     // check primary inputs
     Aig_ManForEachCi( p, pObj, i )
     {
         if ( Aig_ObjFanin0(pObj) || Aig_ObjFanin1(pObj) )
         {
             printf( "Aig_ManCheck: The PI node \"%p\" has fanins.\n", pObj );
             return 0;
         }
     }
     // check primary outputs
     Aig_ManForEachCo( p, pObj, i )
     {
         if ( !Aig_ObjFanin0(pObj) )
         {
             printf( "Aig_ManCheck: The PO node \"%p\" has NULL fanin.\n", pObj );
             return 0;
         }
         if ( Aig_ObjFanin1(pObj) )
         {
             printf( "Aig_ManCheck: The PO node \"%p\" has second fanin.\n", pObj );
             return 0;
         }
     }
     // check internal nodes
     Aig_ManForEachObj( p, pObj, i )
     {
         if ( !Aig_ObjIsNode(pObj) )
             continue;
         if ( !Aig_ObjFanin0(pObj) || !Aig_ObjFanin1(pObj) )
         {
             printf( "Aig_ManCheck: The AIG has internal node \"%p\" with a NULL fanin.\n", pObj );
             return 0;
         }
         if ( Aig_ObjFanin0(pObj)->Id >= Aig_ObjFanin1(pObj)->Id )
         {
             printf( "Aig_ManCheck: The AIG has node \"%p\" with a wrong ordering of fanins.\n", pObj );
             return 0;
         }
         pObj2 = Aig_TableLookup( p, pObj );
         if ( pObj2 != pObj )
         {
             printf( "Aig_ManCheck: Node \"%p\" is not in the structural hashing table.\n", pObj );
             return 0;
         }
     }
     // count the total number of nodes
     if ( Aig_ManObjNum(p) != 1 + Aig_ManCiNum(p) + Aig_ManCoNum(p) + 
         Aig_ManBufNum(p) + Aig_ManAndNum(p) + Aig_ManExorNum(p) )
     {
         printf( "Aig_ManCheck: The number of created nodes is wrong.\n" );
         printf( "C1 = %d. Pi = %d. Po = %d. Buf = %d. And = %d. Xor = %d. Total = %d.\n",
             1, Aig_ManCiNum(p), Aig_ManCoNum(p), Aig_ManBufNum(p), Aig_ManAndNum(p), Aig_ManExorNum(p), 
             1 + Aig_ManCiNum(p) + Aig_ManCoNum(p) + Aig_ManBufNum(p) + Aig_ManAndNum(p) + Aig_ManExorNum(p) );
         printf( "Created = %d. Deleted = %d. Existing = %d.\n",
             Aig_ManObjNumMax(p), p->nDeleted, Aig_ManObjNum(p) );
         return 0;
     }
     // count the number of nodes in the table
     if ( Aig_TableCountEntries(p) != Aig_ManAndNum(p) + Aig_ManExorNum(p) )
     {
         printf( "Aig_ManCheck: The number of nodes in the structural hashing table is wrong.\n" );
         printf( "Entries = %d. And = %d. Xor = %d. Total = %d.\n", 
             Aig_TableCountEntries(p), Aig_ManAndNum(p), Aig_ManExorNum(p), 
             Aig_ManAndNum(p) + Aig_ManExorNum(p) );
 
         return 0;
     }
 //    if ( !Aig_ManIsAcyclic(p) )
 //        return 0;
     return 1; 
 }

void Aig_ManCheckMarkA ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Checks if the markA is reset.]

Description []

SideEffects []

SeeAlso []

Definition at line 132 of file aigCheck.c.

 {
     Aig_Obj_t * pObj;
     int i;
     Aig_ManForEachObj( p, pObj, i )
         assert( pObj->fMarkA == 0 );
 }

void Aig_ManCheckPhase ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Checks the consistency of phase assignment.]

Description []

SideEffects []

SeeAlso []

Definition at line 151 of file aigCheck.c.

 {
     Aig_Obj_t * pObj;
     int i;
     Aig_ManForEachObj( p, pObj, i )
         if ( Aig_ObjIsCi(pObj) )
             assert( (int)pObj->fPhase == 0 );
         else
             assert( (int)pObj->fPhase == (Aig_ObjPhaseReal(Aig_ObjChild0(pObj)) & Aig_ObjPhaseReal(Aig_ObjChild1(pObj))) );
 }

Aig_Man_t* Aig_ManChoiceConstructive	(	Vec_Ptr_t *	vAigs,
		int	fVerbose
	)

Function*************************************************************

Synopsis [Constructively accumulates choices.]

Description []

SideEffects []

SeeAlso []

Definition at line 1564 of file aigPart.c.

 {
     Vec_Ptr_t * vPios;
     Aig_Man_t * pNew, * pThis, * pPrev, * pTemp;
     int i;
     // start AIG with choices
     pPrev = (Aig_Man_t *)Vec_PtrEntry( vAigs, 0 );
     pNew = Aig_ManDupOrdered( pPrev );
     // create room for equivalent nodes and representatives
     assert( pNew->pReprs == NULL );
     pNew->nReprsAlloc = Vec_PtrSize(vAigs) * Aig_ManObjNumMax(pNew);
     pNew->pReprs = ABC_ALLOC( Aig_Obj_t *, pNew->nReprsAlloc );
     memset( pNew->pReprs, 0, sizeof(Aig_Obj_t *) * pNew->nReprsAlloc );
     // add other AIGs one by one
     Vec_PtrForEachEntryStart( Aig_Man_t *, vAigs, pThis, i, 1 )
     {
         Aig_ManChoiceConstructiveOne( pNew, pPrev, pThis );
         pPrev = pThis;
     }
     // derive the result of choicing
     pNew = Aig_ManRehash( pNew );
     // create the equivalent nodes lists
     Aig_ManMarkValidChoices( pNew );
     // reconstruct the network
     vPios = Aig_ManOrderPios( pNew, (Aig_Man_t *)Vec_PtrEntry( vAigs, 0 ) );
     pNew = Aig_ManDupDfsGuided( pTemp = pNew, vPios );
     Aig_ManStop( pTemp );
     Vec_PtrFree( vPios );
     // duplicate the timing manager
     pTemp = (Aig_Man_t *)Vec_PtrEntry( vAigs, 0 );
     if ( pTemp->pManTime )
         pNew->pManTime = Tim_ManDup( (Tim_Man_t *)pTemp->pManTime, 0 );
     // reset levels
     Aig_ManChoiceLevel( pNew );
     return pNew;
 }

int Aig_ManChoiceLevel ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Computes levels for AIG with choices and white boxes.]

Description []

SideEffects []

SeeAlso []

Definition at line 581 of file aigDfs.c.

 {
     Aig_Obj_t * pObj;
     int i, LevelMax = 0;
     Aig_ManForEachObj( p, pObj, i )
         Aig_ObjSetLevel( pObj, 0 );
     Aig_ManSetCioIds( p );
     Aig_ManIncrementTravId( p );
     Aig_ManForEachCo( p, pObj, i )
     {
         Aig_ManChoiceLevel_rec( p, pObj );
         if ( LevelMax < Aig_ObjLevel(pObj) )
             LevelMax = Aig_ObjLevel(pObj);
     }
     // account for dangling boxes
     Aig_ManForEachCi( p, pObj, i )
     {
         Aig_ManChoiceLevel_rec( p, pObj );
         if ( LevelMax < Aig_ObjLevel(pObj) )
             LevelMax = Aig_ObjLevel(pObj);
     }
     Aig_ManCleanCioIds( p );
 //    Aig_ManForEachNode( p, pObj, i )
 //        assert( Aig_ObjLevel(pObj) > 0 );
     return LevelMax;
 } 

int Aig_ManChoiceNum ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Sets the PI/PO numbers.]

Description []

SideEffects []

SeeAlso []

Definition at line 1007 of file aigUtil.c.

 {
     Aig_Obj_t * pObj;
     int i, Counter = 0;
     Aig_ManForEachNode( p, pObj, i )
         Counter += Aig_ObjIsChoice( p, pObj );
     return Counter;
 }

Aig_Man_t* Aig_ManChoicePartitioned	(	Vec_Ptr_t *	vAigs,
		int	nPartSize,
		int	nConfMax,
		int	nLevelMax,
		int	fVerbose
	)

Function*************************************************************

Synopsis [Performs partitioned choice computation.]

Description [Assumes that each output in the second AIG cannot have more supp vars than the same output in the first AIG.]

SideEffects []

SeeAlso []

Definition at line 1247 of file aigPart.c.

 {
 //    extern int Cmd_CommandExecute( void * pAbc, char * sCommand );
 //    extern void * Abc_FrameGetGlobalFrame();
 //    extern Aig_Man_t * Fra_FraigChoice( Aig_Man_t * pManAig, int nConfMax, int nLevelMax );
 
     Vec_Ptr_t * vPios;
     Vec_Ptr_t * vOutsTotal, * vOuts;
     Aig_Man_t * pAigTotal, * pAigPart, * pAig, * pTemp;
     Vec_Int_t * vPart, * vPartSupp;
     Vec_Ptr_t * vParts;
     Aig_Obj_t * pObj;
     void ** ppData;
     int i, k, m, nIdMax;
     assert( Vec_PtrSize(vAigs) > 1 );
 
     // compute the total number of IDs
     nIdMax = 0;
     Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pAig, i )
         nIdMax += Aig_ManObjNumMax(pAig);
 
     // partition the first AIG in the array
     pAig = (Aig_Man_t *)Vec_PtrEntry( vAigs, 0 );
     vParts = Aig_ManPartitionSmart( pAig, nPartSize, 0, NULL );
 
     // start the total fraiged AIG
     pAigTotal = Aig_ManStartFrom( pAig );
     Aig_ManReprStart( pAigTotal, nIdMax );
     vOutsTotal = Vec_PtrStart( Aig_ManCoNum(pAig) );
 
     // set the PI numbers
     Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pAig, i )
         Aig_ManForEachCi( pAig, pObj, k )
             pObj->pNext = (Aig_Obj_t *)(long)k;
 
 //    Cmd_CommandExecute( Abc_FrameGetGlobalFrame(), "unset progressbar" );
 
     // create the total fraiged AIG
     vPartSupp = Vec_IntAlloc( 100 ); // maps part PI num into total PI num
     Vec_PtrForEachEntry( Vec_Int_t *, vParts, vPart, i )
     {
         // derive the partition AIG
         pAigPart = Aig_ManStart( 5000 );
 //        pAigPart->pName = Extra_UtilStrsav( pAigPart->pName );
         Vec_IntClear( vPartSupp );
         Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pAig, k )
         {
             vOuts = Aig_ManDupPart( pAigPart, pAig, vPart, vPartSupp, 0 );
             if ( k == 0 )
             {
                 Vec_PtrForEachEntry( Aig_Obj_t *, vOuts, pObj, m )
                     Aig_ObjCreateCo( pAigPart, pObj );
             }
             Vec_PtrFree( vOuts );
         }
         // derive the total AIG from the partitioned AIG
         vOuts = Aig_ManDupPart( pAigTotal, pAigPart, vPart, vPartSupp, 1 );
         // add to the outputs
         Vec_PtrForEachEntry( Aig_Obj_t *, vOuts, pObj, k )
         {
             assert( Vec_PtrEntry( vOutsTotal, Vec_IntEntry(vPart,k) ) == NULL );
             Vec_PtrWriteEntry( vOutsTotal, Vec_IntEntry(vPart,k), pObj );
         }
         Vec_PtrFree( vOuts );
         // store contents of pData pointers
         ppData = ABC_ALLOC( void *, Aig_ManObjNumMax(pAigPart) );
         Aig_ManForEachObj( pAigPart, pObj, k )
             ppData[k] = pObj->pData;
         // report the process
         if ( fVerbose )
         printf( "Part %4d  (out of %4d)  PI = %5d. PO = %5d. And = %6d. Lev = %4d.\r", 
             i+1, Vec_PtrSize(vParts), Aig_ManCiNum(pAigPart), Aig_ManCoNum(pAigPart), 
             Aig_ManNodeNum(pAigPart), Aig_ManLevelNum(pAigPart) );
         // compute equivalence classes (to be stored in pNew->pReprs)
         pAig = Fra_FraigChoice( pAigPart, nConfMax, nLevelMax );
         Aig_ManStop( pAig );
         // reset the pData pointers
         Aig_ManForEachObj( pAigPart, pObj, k )
             pObj->pData = ppData[k];
         ABC_FREE( ppData );
         // transfer representatives to the total AIG
         if ( pAigPart->pReprs )
             Aig_ManTransferRepr( pAigTotal, pAigPart );
         Aig_ManStop( pAigPart );
     }
     if ( fVerbose )
     printf( "                                                                                          \r" );
     Vec_VecFree( (Vec_Vec_t *)vParts );
     Vec_IntFree( vPartSupp );
 
 //    Cmd_CommandExecute( Abc_FrameGetGlobalFrame(), "set progressbar" );
 
     // clear the PI numbers
     Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pAig, i )
         Aig_ManForEachCi( pAig, pObj, k )
             pObj->pNext = NULL;
 
     // add the outputs in the same order
     Vec_PtrForEachEntry( Aig_Obj_t *, vOutsTotal, pObj, i )
         Aig_ObjCreateCo( pAigTotal, pObj );
     Vec_PtrFree( vOutsTotal );
 
     // derive the result of choicing
     pAig = Aig_ManRehash( pAigTotal );
     // create the equivalent nodes lists
     Aig_ManMarkValidChoices( pAig );
     // reconstruct the network
     vPios = Aig_ManOrderPios( pAig, (Aig_Man_t *)Vec_PtrEntry(vAigs,0) );
     pAig = Aig_ManDupDfsGuided( pTemp = pAig, vPios );
     Aig_ManStop( pTemp );
     Vec_PtrFree( vPios );
     // duplicate the timing manager
     pTemp = (Aig_Man_t *)Vec_PtrEntry( vAigs, 0 );
     if ( pTemp->pManTime )
         pAig->pManTime = Tim_ManDup( (Tim_Man_t *)pTemp->pManTime, 0 );
     // reset levels
     Aig_ManChoiceLevel( pAig );
     return pAig;
 }

static Aig_Obj_t* Aig_ManCi	(	Aig_Man_t *	p,
		int	i
	)

inlinestatic

Definition at line 266 of file aig.h.

266 { return (Aig_Obj_t *)Vec_PtrEntry(p->vCis, i); }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

Aig_Obj_t_

Definition: aig.h:69

Vec_PtrEntry

static void * Vec_PtrEntry(Vec_Ptr_t *p, int i)

Definition: vecPtr.h:362

int Aig_ManCiCleanup ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Removes PIs without fanouts.]

Description [Returns the number of PIs removed.]

SideEffects []

SeeAlso []

Definition at line 314 of file aigMan.c.

 {
     Aig_Obj_t * pObj;
     int i, k = 0, nPisOld = Aig_ManCiNum(p);
     Vec_PtrForEachEntry( Aig_Obj_t *, p->vCis, pObj, i )
     {
         if ( i >= Aig_ManCiNum(p) - Aig_ManRegNum(p) )
             Vec_PtrWriteEntry( p->vCis, k++, pObj );
         else if ( Aig_ObjRefs(pObj) > 0 )
             Vec_PtrWriteEntry( p->vCis, k++, pObj );
         else
             Vec_PtrWriteEntry( p->vObjs, pObj->Id, NULL );
     }
     Vec_PtrShrink( p->vCis, k );
     p->nObjs[AIG_OBJ_CI] = Vec_PtrSize( p->vCis );
     if ( Aig_ManRegNum(p) )
         p->nTruePis = Aig_ManCiNum(p) - Aig_ManRegNum(p);
     return nPisOld - Aig_ManCiNum(p);
 }

static int Aig_ManCiNum ( Aig_Man_t * p )

inlinestatic

Definition at line 251 of file aig.h.

251 { return p->nObjs[AIG_OBJ_CI]; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

AIG_OBJ_CI

Definition: aig.h:60

void Aig_ManCleanCioIds ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Sets the PI/PO numbers.]

Description []

SideEffects []

SeeAlso []

Definition at line 986 of file aigUtil.c.

 {
     Aig_Obj_t * pObj;
     int i;
     Aig_ManForEachCi( p, pObj, i )
         pObj->pNext = NULL;
     Aig_ManForEachCo( p, pObj, i )
         pObj->pNext = NULL;
 }

void Aig_ManCleanData ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Cleans the data pointers for the nodes.]

Description []

SideEffects []

SeeAlso []

Definition at line 205 of file aigUtil.c.

 {
     Aig_Obj_t * pObj;
     int i;
     Aig_ManForEachObj( p, pObj, i )
         pObj->pData = NULL;
 }

void Aig_ManCleanMarkA ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Cleans fMarkA.]

Description []

SideEffects []

SeeAlso []

Definition at line 148 of file aigUtil.c.

 {
     Aig_Obj_t * pObj;
     int i;
     Aig_ManForEachObj( p, pObj, i )
         pObj->fMarkA = 0;
 }

void Aig_ManCleanMarkAB ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Cleans fMarkB.]

Description []

SideEffects []

SeeAlso []

Definition at line 186 of file aigUtil.c.

 {
     Aig_Obj_t * pObj;
     int i;
     Aig_ManForEachObj( p, pObj, i )
         pObj->fMarkA = pObj->fMarkB = 0;
 }

void Aig_ManCleanMarkB ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Cleans fMarkB.]

Description []

SideEffects []

SeeAlso []

Definition at line 167 of file aigUtil.c.

 {
     Aig_Obj_t * pObj;
     int i;
     Aig_ManForEachObj( p, pObj, i )
         pObj->fMarkB = 0;
 }

void Aig_ManCleanNext ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Cleans the data pointers for the nodes.]

Description []

SideEffects []

SeeAlso []

Definition at line 224 of file aigUtil.c.

 {
     Aig_Obj_t * pObj;
     int i;
     Aig_ManForEachObj( p, pObj, i )
         pObj->pNext = NULL;
 }

int Aig_ManCleanup ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Removes combinational logic that does not feed into POs.]

Description [Returns the number of dangling nodes removed.]

SideEffects []

SeeAlso []

Definition at line 265 of file aigMan.c.

 {
     Vec_Ptr_t * vObjs;
     Aig_Obj_t * pNode;
     int i, nNodesOld = Aig_ManNodeNum(p);
     // collect roots of dangling nodes
     vObjs = Vec_PtrAlloc( 100 );
     Aig_ManForEachObj( p, pNode, i )
         if ( Aig_ObjIsNode(pNode) && Aig_ObjRefs(pNode) == 0 )
             Vec_PtrPush( vObjs, pNode );
     // recursively remove dangling nodes
     Vec_PtrForEachEntry( Aig_Obj_t *, vObjs, pNode, i )
         Aig_ObjDelete_rec( p, pNode, 1 );
     Vec_PtrFree( vObjs );
     return nNodesOld - Aig_ManNodeNum(p);
 }

static Aig_Obj_t* Aig_ManCo	(	Aig_Man_t *	p,
		int	i
	)

inlinestatic

Definition at line 267 of file aig.h.

267 { return (Aig_Obj_t *)Vec_PtrEntry(p->vCos, i); }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

Aig_Obj_t_

Definition: aig.h:69

Vec_PtrEntry

static void * Vec_PtrEntry(Vec_Ptr_t *p, int i)

Definition: vecPtr.h:362

int Aig_ManCoCleanup ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Removes POs with constant input.]

Description [Returns the number of POs removed.]

SideEffects []

SeeAlso []

Definition at line 345 of file aigMan.c.

 {
     Aig_Obj_t * pObj;
     int i, k = 0, nPosOld = Aig_ManCoNum(p);
     Vec_PtrForEachEntry( Aig_Obj_t *, p->vCos, pObj, i )
     {
         if ( i >= Aig_ManCoNum(p) - Aig_ManRegNum(p) )
             Vec_PtrWriteEntry( p->vCos, k++, pObj );
         else if ( !Aig_ObjIsConst1(Aig_ObjFanin0(pObj)) || !Aig_ObjFaninC0(pObj) ) // non-const or const1
             Vec_PtrWriteEntry( p->vCos, k++, pObj );
         else
         {
             Aig_ObjDisconnect( p, pObj );
             Vec_PtrWriteEntry( p->vObjs, pObj->Id, NULL );
         }
     }
     Vec_PtrShrink( p->vCos, k );
     p->nObjs[AIG_OBJ_CO] = Vec_PtrSize( p->vCos );
     if ( Aig_ManRegNum(p) )
         p->nTruePos = Aig_ManCoNum(p) - Aig_ManRegNum(p);
     return nPosOld - Aig_ManCoNum(p);
 }

void Aig_ManComputeSccs ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Computes strongly connected components of registers.]

Description []

SideEffects []

SeeAlso []

Definition at line 489 of file aigScl.c.

 {
     Vec_Ptr_t * vSupports, * vMatrix, * vMatrix2;
     Vec_Int_t * vSupp, * vSupp2, * vComp;
     char * pVarsTot;
     int i, k, m, iOut, iIn, nComps;
     if ( Aig_ManRegNum(p) == 0 )
     {
         printf( "The network is combinational.\n" );
         return;
     }
     // get structural supports for each output
     vSupports = Aig_ManSupports( p );
     // transforms the supports into the latch dependency matrix
     vMatrix = Vec_PtrStart( Aig_ManRegNum(p) );
     Vec_PtrForEachEntry( Vec_Int_t *, vSupports, vSupp, i )
     {
         // skip true POs
         iOut = Vec_IntPop( vSupp );
         iOut -= Aig_ManCoNum(p) - Aig_ManRegNum(p);
         if ( iOut < 0 )
             continue;
         // remove PIs
         m = 0;
         Vec_IntForEachEntry( vSupp, iIn, k )
         {
             iIn -= Aig_ManCiNum(p) - Aig_ManRegNum(p);
             if ( iIn < 0 )
                 continue;
             assert( iIn < Aig_ManRegNum(p) );
             Vec_IntWriteEntry( vSupp, m++, iIn );
         }
         Vec_IntShrink( vSupp, m );
         // store support in the matrix
         assert( iOut < Aig_ManRegNum(p) );
         Vec_PtrWriteEntry( vMatrix, iOut, vSupp );
     }
     // create the reverse matrix
     vMatrix2 = Vec_PtrAlloc( Aig_ManRegNum(p) );
     for ( i = 0; i < Aig_ManRegNum(p); i++ )
         Vec_PtrPush( vMatrix2, Vec_IntAlloc(8) );
     Vec_PtrForEachEntry( Vec_Int_t *, vMatrix, vSupp, i )
     {
         Vec_IntForEachEntry( vSupp, iIn, k )
         {
             vSupp2 = (Vec_Int_t *)Vec_PtrEntry( vMatrix2, iIn );
             Vec_IntPush( vSupp2, i );
         }
     } 
 
     // detect strongly connected components
     vComp = Vec_IntAlloc( Aig_ManRegNum(p) );
     pVarsTot = ABC_ALLOC( char, Aig_ManRegNum(p) );
     memset( pVarsTot, 0, Aig_ManRegNum(p) * sizeof(char) );
     for ( nComps = 0; ; nComps++ )
     {
         Vec_IntClear( vComp );
         // get the first support
         for ( iOut = 0; iOut < Aig_ManRegNum(p); iOut++ )
             if ( pVarsTot[iOut] == 0 )
                 break;
         if ( iOut == Aig_ManRegNum(p) )
             break;
         pVarsTot[iOut] = 1;
         Vec_IntPush( vComp, iOut );
         Vec_IntForEachEntry( vComp, iOut, i )
         {
             vSupp = (Vec_Int_t *)Vec_PtrEntry( vMatrix, iOut );
             Vec_IntForEachEntry( vSupp, iIn, k )
             {
                 if ( pVarsTot[iIn] )
                     continue;
                 pVarsTot[iIn] = 1;
                 Vec_IntPush( vComp, iIn );
             }
             vSupp2 = (Vec_Int_t *)Vec_PtrEntry( vMatrix2, iOut );
             Vec_IntForEachEntry( vSupp2, iIn, k )
             {
                 if ( pVarsTot[iIn] )
                     continue;
                 pVarsTot[iIn] = 1;
                 Vec_IntPush( vComp, iIn );
             }
         }
         if ( Vec_IntSize(vComp) == Aig_ManRegNum(p) )
         {
             printf( "There is only one SCC of registers in this network.\n" );
             break;
         }
         printf( "SCC #%d contains %5d registers.\n", nComps+1, Vec_IntSize(vComp) );
     }
     ABC_FREE( pVarsTot );
     Vec_IntFree( vComp );
     Vec_PtrFree( vMatrix );
     Vec_VecFree( (Vec_Vec_t *)vMatrix2 );
     Vec_VecFree( (Vec_Vec_t *)vSupports );
 }

static Aig_Obj_t* Aig_ManConst0 ( Aig_Man_t * p )

inlinestatic

Definition at line 263 of file aig.h.

263 { return Aig_Not(p->pConst1); }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

Aig_Not

static Aig_Obj_t * Aig_Not(Aig_Obj_t *p)

Definition: aig.h:247

static Aig_Obj_t* Aig_ManConst1 ( Aig_Man_t * p )

inlinestatic

Definition at line 264 of file aig.h.

264 { return p->pConst1; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

Aig_Man_t* Aig_ManConstReduce	(	Aig_Man_t *	p,
		int	fUseMvSweep,
		int	nFramesSymb,
		int	nFramesSatur,
		int	fVerbose,
		int	fVeryVerbose
	)

Function*************************************************************

Synopsis [Reduces the circuit using ternary simulation.]

Description []

SideEffects []

SeeAlso []

Definition at line 498 of file aigTsim.c.

 {
     Aig_Man_t * pTemp;
     Vec_Ptr_t * vMap;
     while ( Aig_ManRegNum(p) > 0 )
     {
         if ( fUseMvSweep )
             vMap = Saig_MvManSimulate( p, nFramesSymb, nFramesSatur, fVerbose, fVeryVerbose );
         else
             vMap = Aig_ManTernarySimulate( p, fVerbose, fVeryVerbose );
         if ( vMap == NULL )
             break;
         p = Aig_ManRemap( pTemp = p, vMap );
         Vec_PtrFree( vMap );
         Aig_ManSeqCleanup( p );
         if ( fVerbose )
             Aig_ManReportImprovement( pTemp, p );
         Aig_ManStop( pTemp );
     }
     return p;
 }

static int Aig_ManConstrNum ( Aig_Man_t * p )

inlinestatic

Definition at line 261 of file aig.h.

261 { return p->nConstrs; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

static int Aig_ManCoNum ( Aig_Man_t * p )

inlinestatic

Definition at line 252 of file aig.h.

252 { return p->nObjs[AIG_OBJ_CO]; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

AIG_OBJ_CO

Definition: aig.h:61

int Aig_ManCountMergeRegs ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Returns the number of dangling nodes removed.]

Description []

SideEffects []

SeeAlso []

Definition at line 310 of file aigScl.c.

 {
     Aig_Obj_t * pObj, * pFanin;
     int i, Counter = 0, Const0 = 0, Const1 = 0;
     Aig_ManIncrementTravId( p );
     Aig_ManForEachLiSeq( p, pObj, i )
     {
         pFanin = Aig_ObjFanin0(pObj);
         if ( Aig_ObjIsConst1(pFanin) )
         {
             if ( Aig_ObjFaninC0(pObj) )
                 Const0++;
             else
                 Const1++;
         }
         if ( Aig_ObjIsTravIdCurrent(p, pFanin) )
             continue;
         Aig_ObjSetTravIdCurrent(p, pFanin);
         Counter++;
     }
     printf( "Regs = %d. Fanins = %d. Const0 = %d. Const1 = %d.\n", 
         Aig_ManRegNum(p), Counter, Const0, Const1 );
     return 0;
 }

int Aig_ManCountReprs ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Transfer representatives and return the number of critical fanouts.]

Description []

SideEffects []

SeeAlso []

Definition at line 378 of file aigRepr.c.

 {
     Aig_Obj_t * pObj;
     int i, Counter = 0;
     if ( p->pReprs == NULL )
         return 0;
     Aig_ManForEachObj( p, pObj, i )
         Counter += (p->pReprs[i] != NULL);
     return Counter;
 }

Aig_Man_t* Aig_ManCreateMiter	(	Aig_Man_t *	p1,
		Aig_Man_t *	p2,
		int	Oper
	)

Function*************************************************************

Synopsis [Creates the miter of the two AIG managers.]

Description [Oper is the operation to perform on the outputs of the miter. Oper == 0 is XOR Oper == 1 is complemented implication (p1 => p2) Oper == 2 is OR Oper == 3 is AND ]

SideEffects []

SeeAlso []

Definition at line 1049 of file aigDup.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj;
     int i;
     assert( Aig_ManRegNum(p1) == 0 );
     assert( Aig_ManRegNum(p2) == 0 );
     assert( Aig_ManCoNum(p1) == 1 );
     assert( Aig_ManCoNum(p2) == 1 );
     assert( Aig_ManCiNum(p1) == Aig_ManCiNum(p2) );
     pNew = Aig_ManStart( Aig_ManObjNumMax(p1) + Aig_ManObjNumMax(p2) );
     // add first AIG
     Aig_ManConst1(p1)->pData = Aig_ManConst1(pNew);
     Aig_ManForEachCi( p1, pObj, i )
         pObj->pData = Aig_ObjCreateCi( pNew );
     Aig_ManForEachNode( p1, pObj, i )
         pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
     // add second AIG
     Aig_ManConst1(p2)->pData = Aig_ManConst1(pNew);
     Aig_ManForEachCi( p2, pObj, i )
         pObj->pData = Aig_ManCi( pNew, i );
     Aig_ManForEachNode( p2, pObj, i )
         pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
     // add the output
     if ( Oper == 0 ) // XOR
         pObj = Aig_Exor( pNew, Aig_ObjChild0Copy(Aig_ManCo(p1,0)), Aig_ObjChild0Copy(Aig_ManCo(p2,0)) );
     else if ( Oper == 1 ) // implication is PO(p1) -> PO(p2)  ...  complement is PO(p1) & !PO(p2) 
         pObj = Aig_And( pNew, Aig_ObjChild0Copy(Aig_ManCo(p1,0)), Aig_Not(Aig_ObjChild0Copy(Aig_ManCo(p2,0))) );
     else if ( Oper == 2 ) // OR
         pObj = Aig_Or( pNew, Aig_ObjChild0Copy(Aig_ManCo(p1,0)), Aig_ObjChild0Copy(Aig_ManCo(p2,0)) );
     else if ( Oper == 3 ) // AND
         pObj = Aig_And( pNew, Aig_ObjChild0Copy(Aig_ManCo(p1,0)), Aig_ObjChild0Copy(Aig_ManCo(p2,0)) );
     else
         assert( 0 );
     Aig_ObjCreateCo( pNew, pObj );
     Aig_ManCleanup( pNew );
     return pNew;
 }

void Aig_ManCutStop ( Aig_ManCut_t * p )

Function*************************************************************

Synopsis [Stops the fraiging manager.]

Description []

SideEffects []

SeeAlso []

Definition at line 86 of file aigCuts.c.

 {
     Aig_MmFixedStop( p->pMemCuts, 0 );
     ABC_FREE( p->puTemp[0] );
     ABC_FREE( p->pCuts );
     ABC_FREE( p );
 }

unsigned* Aig_ManCutTruth	(	Aig_Obj_t *	pRoot,
		Vec_Ptr_t *	vLeaves,
		Vec_Ptr_t *	vNodes,
		Vec_Ptr_t *	vTruthElem,
		Vec_Ptr_t *	vTruthStore
	)

Function*************************************************************

Synopsis [Computes truth table of the cut.]

Description [The returned pointer should be used immediately.]

SideEffects []

SeeAlso []

Definition at line 80 of file aigTruth.c.

 {
     Aig_Obj_t * pObj;
     int i, nWords;
     assert( Vec_PtrSize(vLeaves) <= Vec_PtrSize(vTruthElem) );
     assert( Vec_PtrSize(vNodes) <= Vec_PtrSize(vTruthStore) );
     assert( Vec_PtrSize(vNodes) == 0 || pRoot == Vec_PtrEntryLast(vNodes) );  
     // assign elementary truth tables
     Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pObj, i )
         pObj->pData = Vec_PtrEntry( vTruthElem, i );
     // compute truths for other nodes
     nWords = Abc_TruthWordNum( Vec_PtrSize(vLeaves) );
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
         pObj->pData = Aig_ManCutTruthOne( pObj, (unsigned *)Vec_PtrEntry(vTruthStore, i), nWords );
     return (unsigned *)pRoot->pData;
 }

Vec_Ptr_t* Aig_ManDfs	(	Aig_Man_t *	p,
		int	fNodesOnly
	)

Function*************************************************************

Synopsis [Collects objects of the AIG in the DFS order.]

Description [Works with choice nodes.]

SideEffects []

SeeAlso []

Definition at line 145 of file aigDfs.c.

 {
     Vec_Ptr_t * vNodes;
     Aig_Obj_t * pObj;
     int i;
     Aig_ManIncrementTravId( p );
     Aig_ObjSetTravIdCurrent( p, Aig_ManConst1(p) );
     // start the array of nodes
     vNodes = Vec_PtrAlloc( Aig_ManObjNumMax(p) );
     // mark PIs if they should not be collected
     if ( fNodesOnly )
         Aig_ManForEachCi( p, pObj, i )
             Aig_ObjSetTravIdCurrent( p, pObj );
     else
         Vec_PtrPush( vNodes, Aig_ManConst1(p) );
     // collect nodes reachable in the DFS order
     Aig_ManForEachCo( p, pObj, i )
         Aig_ManDfs_rec( p, fNodesOnly? Aig_ObjFanin0(pObj): pObj, vNodes );
     if ( fNodesOnly )
         assert( Vec_PtrSize(vNodes) == Aig_ManNodeNum(p) );
     else
         assert( Vec_PtrSize(vNodes) == Aig_ManObjNum(p) );
     return vNodes;
 }

Vec_Ptr_t* Aig_ManDfsAll ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Collects objects of the AIG in the DFS order.]

Description []

SideEffects []

SeeAlso []

Definition at line 214 of file aigDfs.c.

 {
     Vec_Ptr_t * vNodes;
     Aig_Obj_t * pObj;
     int i;
     Aig_ManIncrementTravId( p );
     vNodes = Vec_PtrAlloc( Aig_ManObjNumMax(p) );
     // add constant
     Aig_ObjSetTravIdCurrent( p, Aig_ManConst1(p) );
     Vec_PtrPush( vNodes, Aig_ManConst1(p) );
     // collect nodes reachable in the DFS order
     Aig_ManForEachCo( p, pObj, i )
         Aig_ManDfsAll_rec( p, pObj, vNodes );
     Aig_ManForEachCi( p, pObj, i )
         if ( !Aig_ObjIsTravIdCurrent(p, pObj) )
             Vec_PtrPush( vNodes, pObj );
     assert( Vec_PtrSize(vNodes) == Aig_ManObjNum(p) );
     return vNodes;
 }

Vec_Ptr_t* Aig_ManDfsChoices ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Collects internal nodes in the DFS order.]

Description []

SideEffects []

SeeAlso []

Definition at line 391 of file aigDfs.c.

 {
     Vec_Ptr_t * vNodes;
     Aig_Obj_t * pObj;
     int i, Counter = 0;
 
     Aig_ManForEachNode( p, pObj, i )
     {
         if ( Aig_ObjEquiv(p, pObj) == NULL )
             continue;
         Counter = 0;
         for ( pObj = Aig_ObjEquiv(p, pObj) ; pObj; pObj = Aig_ObjEquiv(p, pObj) )
             Counter++;
 //        printf( "%d ", Counter );
     }
 //    printf( "\n" );
 
     assert( p->pEquivs != NULL );
     Aig_ManIncrementTravId( p );
     // mark constant and PIs
     Aig_ObjSetTravIdCurrent( p, Aig_ManConst1(p) );
     Aig_ManForEachCi( p, pObj, i )
         Aig_ObjSetTravIdCurrent( p, pObj );
     // go through the nodes
     vNodes = Vec_PtrAlloc( Aig_ManNodeNum(p) );
     Aig_ManForEachCo( p, pObj, i )
         Aig_ManDfsChoices_rec( p, Aig_ObjFanin0(pObj), vNodes );
     return vNodes;
 }

Vec_Ptr_t* Aig_ManDfsNodes	(	Aig_Man_t *	p,
		Aig_Obj_t **	ppNodes,
		int	nNodes
	)

Function*************************************************************

Synopsis [Collects internal nodes and PIs in the DFS order.]

Description []

SideEffects []

SeeAlso []

Definition at line 333 of file aigDfs.c.

 {
     Vec_Ptr_t * vNodes;
 //    Aig_Obj_t * pObj;
     int i;
     Aig_ManIncrementTravId( p );
     // mark constant and PIs
     Aig_ObjSetTravIdCurrent( p, Aig_ManConst1(p) );
 //    Aig_ManForEachCi( p, pObj, i )
 //        Aig_ObjSetTravIdCurrent( p, pObj );
     // go through the nodes
     vNodes = Vec_PtrAlloc( Aig_ManNodeNum(p) );
     for ( i = 0; i < nNodes; i++ )
         if ( Aig_ObjIsCo(ppNodes[i]) )
             Aig_ManDfs_rec( p, Aig_ObjFanin0(ppNodes[i]), vNodes );
         else
             Aig_ManDfs_rec( p, ppNodes[i], vNodes );
     return vNodes;
 }

Vec_Ptr_t* Aig_ManDfsPreorder	(	Aig_Man_t *	p,
		int	fNodesOnly
	)

Function*************************************************************

Synopsis [Collects objects of the AIG in the DFS order.]

Description [Works with choice nodes.]

SideEffects []

SeeAlso []

Definition at line 271 of file aigDfs.c.

 {
     Vec_Ptr_t * vNodes;
     Aig_Obj_t * pObj;
     int i;
     Aig_ManIncrementTravId( p );
     Aig_ObjSetTravIdCurrent( p, Aig_ManConst1(p) );
     // start the array of nodes
     vNodes = Vec_PtrAlloc( Aig_ManObjNumMax(p) );
     // mark PIs if they should not be collected
     if ( fNodesOnly )
         Aig_ManForEachCi( p, pObj, i )
             Aig_ObjSetTravIdCurrent( p, pObj );
     else
         Vec_PtrPush( vNodes, Aig_ManConst1(p) );
     // collect nodes reachable in the DFS order
     Aig_ManForEachCo( p, pObj, i )
         Aig_ManDfsPreorder_rec( p, fNodesOnly? Aig_ObjFanin0(pObj): pObj, vNodes );
     if ( fNodesOnly )
         assert( Vec_PtrSize(vNodes) == Aig_ManNodeNum(p) );
     else
         assert( Vec_PtrSize(vNodes) == Aig_ManObjNum(p) );
     return vNodes;
 }

Vec_Ptr_t* Aig_ManDfsReverse ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Collects internal nodes in the reverse DFS order.]

Description []

SideEffects []

SeeAlso []

Definition at line 458 of file aigDfs.c.

 {
     Vec_Ptr_t * vNodes;
     Aig_Obj_t * pObj;
     int i;
     Aig_ManIncrementTravId( p );
     // mark POs
     Aig_ManForEachCo( p, pObj, i )
         Aig_ObjSetTravIdCurrent( p, pObj );
     // go through the nodes
     vNodes = Vec_PtrAlloc( Aig_ManNodeNum(p) );
     Aig_ManForEachObj( p, pObj, i )
         if ( Aig_ObjIsNode(pObj) || Aig_ObjIsBuf(pObj) )
             Aig_ManDfsReverse_rec( p, pObj, vNodes );
     return vNodes;
 }

void Aig_ManDump ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Write speculative miter for one node.]

Description []

SideEffects []

SeeAlso []

Definition at line 712 of file aigUtil.c.

 { 
     static int Counter = 0;
     char FileName[20];
     // dump the logic into a file
     sprintf( FileName, "aigbug\\%03d.blif", ++Counter );
     Aig_ManDumpBlif( p, FileName, NULL, NULL );
     printf( "Intermediate AIG with %d nodes was written into file \"%s\".\n", Aig_ManNodeNum(p), FileName );
 }

void Aig_ManDumpBlif	(	Aig_Man_t *	p,
		char *	pFileName,
		Vec_Ptr_t *	vPiNames,
		Vec_Ptr_t *	vPoNames
	)

Function*************************************************************

Synopsis [Writes the AIG into a BLIF file.]

Description []

SideEffects []

SeeAlso []

Definition at line 733 of file aigUtil.c.

 {
     FILE * pFile;
     Vec_Ptr_t * vNodes;
     Aig_Obj_t * pObj, * pObjLi, * pObjLo, * pConst1 = NULL;
     int i, nDigits, Counter = 0;
     if ( Aig_ManCoNum(p) == 0 )
     {
         printf( "Aig_ManDumpBlif(): AIG manager does not have POs.\n" );
         return;
     }
     // check if constant is used
     Aig_ManForEachCo( p, pObj, i )
         if ( Aig_ObjIsConst1(Aig_ObjFanin0(pObj)) )
             pConst1 = Aig_ManConst1(p);
     // collect nodes in the DFS order
     vNodes = Aig_ManDfs( p, 1 );
     // assign IDs to objects
     Aig_ManConst1(p)->iData = Counter++;
     Aig_ManForEachCi( p, pObj, i )
         pObj->iData = Counter++;
     Aig_ManForEachCo( p, pObj, i )
         pObj->iData = Counter++;
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
         pObj->iData = Counter++;
     nDigits = Abc_Base10Log( Counter );
     // write the file 
     pFile = fopen( pFileName, "w" );
     fprintf( pFile, "# BLIF file written by procedure Aig_ManDumpBlif()\n" );
 //    fprintf( pFile, "# http://www.eecs.berkeley.edu/~alanmi/abc/\n" );
     fprintf( pFile, ".model %s\n", p->pName );
     // write PIs
     fprintf( pFile, ".inputs" );
     Aig_ManForEachPiSeq( p, pObj, i )
         if ( vPiNames )
             fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, i) );
         else
             fprintf( pFile, " n%0*d", nDigits, pObj->iData );
     fprintf( pFile, "\n" );
     // write POs
     fprintf( pFile, ".outputs" );
     Aig_ManForEachPoSeq( p, pObj, i )
         if ( vPoNames )
             fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPoNames, i) );
         else
             fprintf( pFile, " n%0*d", nDigits, pObj->iData );
     fprintf( pFile, "\n" );
     // write latches
     if ( Aig_ManRegNum(p) )
     {
         fprintf( pFile, "\n" );
         Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
         {
             fprintf( pFile, ".latch" );
             if ( vPoNames )
                 fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPoNames, Aig_ManCoNum(p)-Aig_ManRegNum(p)+i) );
             else
                 fprintf( pFile, " n%0*d", nDigits, pObjLi->iData );
             if ( vPiNames )
                 fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, Aig_ManCiNum(p)-Aig_ManRegNum(p)+i) );
             else
                 fprintf( pFile, " n%0*d", nDigits, pObjLo->iData );
             fprintf( pFile, " 0\n" );
         }
         fprintf( pFile, "\n" );
     } 
     // write nodes
     if ( pConst1 )
         fprintf( pFile, ".names n%0*d\n 1\n", nDigits, pConst1->iData );
     Aig_ManSetCioIds( p );
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
     {
         fprintf( pFile, ".names" );
         if ( vPiNames && Aig_ObjIsCi(Aig_ObjFanin0(pObj)) )
             fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, Aig_ObjCioId(Aig_ObjFanin0(pObj))) );
         else
             fprintf( pFile, " n%0*d", nDigits, Aig_ObjFanin0(pObj)->iData );
         if ( vPiNames && Aig_ObjIsCi(Aig_ObjFanin1(pObj)) )
             fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, Aig_ObjCioId(Aig_ObjFanin1(pObj))) );
         else
             fprintf( pFile, " n%0*d", nDigits, Aig_ObjFanin1(pObj)->iData );
         fprintf( pFile, " n%0*d\n", nDigits, pObj->iData );
         fprintf( pFile, "%d%d 1\n", !Aig_ObjFaninC0(pObj), !Aig_ObjFaninC1(pObj) );
     }
     // write POs
     Aig_ManForEachCo( p, pObj, i )
     {
         fprintf( pFile, ".names" );
         if ( vPiNames && Aig_ObjIsCi(Aig_ObjFanin0(pObj)) )
             fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, Aig_ObjCioId(Aig_ObjFanin0(pObj))) );
         else
             fprintf( pFile, " n%0*d", nDigits, Aig_ObjFanin0(pObj)->iData );
         if ( vPoNames )
             fprintf( pFile, " %s\n", (char*)Vec_PtrEntry(vPoNames, Aig_ObjCioId(pObj)) );
         else
             fprintf( pFile, " n%0*d\n", nDigits, pObj->iData );
         fprintf( pFile, "%d 1\n", !Aig_ObjFaninC0(pObj) );
     }
     Aig_ManCleanCioIds( p );
     fprintf( pFile, ".end\n\n" );
     fclose( pFile );
     Vec_PtrFree( vNodes );
 }

void Aig_ManDumpVerilog	(	Aig_Man_t *	p,
		char *	pFileName
	)

Function*************************************************************

Synopsis [Writes the AIG into a Verilog file.]

Description []

SideEffects []

SeeAlso []

Definition at line 848 of file aigUtil.c.

 {
     FILE * pFile;
     Vec_Ptr_t * vNodes;
     Aig_Obj_t * pObj, * pObjLi, * pObjLo, * pConst1 = NULL;
     int i, nDigits, Counter = 0;
     if ( Aig_ManCoNum(p) == 0 )
     {
         printf( "Aig_ManDumpBlif(): AIG manager does not have POs.\n" );
         return;
     }
     // check if constant is used
     Aig_ManForEachCo( p, pObj, i )
         if ( Aig_ObjIsConst1(Aig_ObjFanin0(pObj)) )
             pConst1 = Aig_ManConst1(p);
     // collect nodes in the DFS order
     vNodes = Aig_ManDfs( p, 1 );
     // assign IDs to objects
     Aig_ManConst1(p)->iData = Counter++;
     Aig_ManForEachCi( p, pObj, i )
         pObj->iData = Counter++;
     Aig_ManForEachCo( p, pObj, i )
         pObj->iData = Counter++;
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
         pObj->iData = Counter++;
     nDigits = Abc_Base10Log( Counter );
     // write the file
     pFile = fopen( pFileName, "w" );
     fprintf( pFile, "// Verilog file written by procedure Aig_ManDumpVerilog()\n" );
 //    fprintf( pFile, "// http://www.eecs.berkeley.edu/~alanmi/abc/\n" );
     if ( Aig_ManRegNum(p) )
         fprintf( pFile, "module %s ( clock", p->pName? p->pName: "test" );
     else
         fprintf( pFile, "module %s (", p->pName? p->pName: "test" );
     Aig_ManForEachPiSeq( p, pObj, i )
         fprintf( pFile, "%s n%0*d", ((Aig_ManRegNum(p) || i)? ",":""), nDigits, pObj->iData );
     Aig_ManForEachPoSeq( p, pObj, i )
         fprintf( pFile, ", n%0*d", nDigits, pObj->iData );
     fprintf( pFile, " );\n" );
 
     // write PIs
     if ( Aig_ManRegNum(p) )
         fprintf( pFile, "input clock;\n" );
     Aig_ManForEachPiSeq( p, pObj, i )
         fprintf( pFile, "input n%0*d;\n", nDigits, pObj->iData );
     // write POs
     Aig_ManForEachPoSeq( p, pObj, i )
         fprintf( pFile, "output n%0*d;\n", nDigits, pObj->iData );
     // write latches
     if ( Aig_ManRegNum(p) )
     {
     Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
         fprintf( pFile, "reg n%0*d;\n", nDigits, pObjLo->iData );
     Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
         fprintf( pFile, "wire n%0*d;\n", nDigits, pObjLi->iData );
     }
     // write nodes
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
         fprintf( pFile, "wire n%0*d;\n", nDigits, pObj->iData );
     if ( pConst1 )
         fprintf( pFile, "wire n%0*d;\n", nDigits, pConst1->iData );
     // write nodes
     if ( pConst1 )
         fprintf( pFile, "assign n%0*d = 1\'b1;\n", nDigits, pConst1->iData );
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
     {
         fprintf( pFile, "assign n%0*d = %sn%0*d & %sn%0*d;\n", 
             nDigits, pObj->iData,
             !Aig_ObjFaninC0(pObj) ? " " : "~", nDigits, Aig_ObjFanin0(pObj)->iData, 
             !Aig_ObjFaninC1(pObj) ? " " : "~", nDigits, Aig_ObjFanin1(pObj)->iData
             );
     }
     // write POs
     Aig_ManForEachPoSeq( p, pObj, i )
     {
         fprintf( pFile, "assign n%0*d = %sn%0*d;\n", 
             nDigits, pObj->iData,
             !Aig_ObjFaninC0(pObj) ? " " : "~", nDigits, Aig_ObjFanin0(pObj)->iData );
     }
     if ( Aig_ManRegNum(p) )
     {
         Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
         {
             fprintf( pFile, "assign n%0*d = %sn%0*d;\n", 
                 nDigits, pObjLi->iData,
                 !Aig_ObjFaninC0(pObjLi) ? " " : "~", nDigits, Aig_ObjFanin0(pObjLi)->iData );
         }
     }
 
     // write initial state
     if ( Aig_ManRegNum(p) )
     {
         Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
             fprintf( pFile, "always @ (posedge clock) begin n%0*d <= n%0*d; end\n", 
                  nDigits, pObjLo->iData,
                  nDigits, pObjLi->iData );
         Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
             fprintf( pFile, "initial begin n%0*d <= 1\'b0; end\n", 
                  nDigits, pObjLo->iData );
     }
 
     fprintf( pFile, "endmodule\n\n" );
     fclose( pFile );
     Vec_PtrFree( vNodes );
 }

Aig_Man_t* Aig_ManDupArray ( Vec_Ptr_t * vArray )

Function*************************************************************

Synopsis [Duplicates AIG with only one primary output.]

Description []

SideEffects []

SeeAlso []

Definition at line 1255 of file aigDup.c.

 {
     Aig_Man_t * p, * pNew;
     Aig_Obj_t * pObj;
     int i, k;
     if ( Vec_PtrSize(vArray) == 0 )
         return NULL;
     p = (Aig_Man_t *)Vec_PtrEntry( vArray, 0 );
     Vec_PtrForEachEntry( Aig_Man_t *, vArray, pNew, k )
     {
         assert( Aig_ManRegNum(pNew) == 0 );
         assert( Aig_ManCiNum(pNew) == Aig_ManCiNum(p) );
     }
     // create the new manager
     pNew = Aig_ManStart( 10000 );
     pNew->pName = Abc_UtilStrsav( p->pName );
     Aig_ManForEachCi( p, pObj, i )
         Aig_ObjCreateCi(pNew);
     // create the PIs
     Vec_PtrForEachEntry( Aig_Man_t *, vArray, p, k )
     {
         Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
         Aig_ManForEachCi( p, pObj, i )
             pObj->pData = Aig_ManCi( pNew, i );
         Aig_ManForEachNode( p, pObj, i )
             pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
         Aig_ManForEachCo( p, pObj, i )
             Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
     }
     Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
     // check the resulting network
     if ( !Aig_ManCheck(pNew) )
         printf( "Aig_ManDupSimple(): The check has failed.\n" );
     return pNew;
 }

Aig_Man_t* Aig_ManDupCof	(	Aig_Man_t *	p,
		int	iInput,
		int	Value
	)

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [Orders nodes as follows: PIs, ANDs, POs.]

SideEffects []

SeeAlso []

Definition at line 345 of file aigDup.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj, * pObjNew;
     int i;
     assert( p->pManTime == NULL );
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nAsserts = p->nAsserts;
     pNew->nConstrs = p->nConstrs;
     pNew->nBarBufs = p->nBarBufs;
     if ( p->vFlopNums )
         pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
     // create the PIs
     Aig_ManCleanData( p );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
     Aig_ManForEachCi( p, pObj, i )
     {
         if ( i == iInput )
             pObjNew = Value ? Aig_ManConst1(pNew) : Aig_ManConst0(pNew);
         else
         {
             pObjNew = Aig_ObjCreateCi( pNew );
             pObjNew->Level = pObj->Level;
         }
         pObj->pData = pObjNew;
     }
     // duplicate internal nodes
     Aig_ManForEachObj( p, pObj, i )
         if ( Aig_ObjIsBuf(pObj) )
         {
             pObjNew = Aig_ObjChild0Copy(pObj);
             pObj->pData = pObjNew;
         }
         else if ( Aig_ObjIsNode(pObj) )
         {
             pObjNew = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
             pObj->pData = pObjNew;
         }
     // add the POs
     Aig_ManForEachCo( p, pObj, i )
     {
         pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
         pObj->pData = pObjNew;
     }
 //    assert( Aig_ManBufNum(p) != 0 || Aig_ManNodeNum(p) == Aig_ManNodeNum(pNew) );
     Aig_ManCleanup( pNew );
     Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
     // check the resulting network
     if ( !Aig_ManCheck(pNew) )
         printf( "Aig_ManDupSimple(): The check has failed.\n" );
     return pNew;
 }

Aig_Man_t* Aig_ManDupDfs ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [This duplicator works for AIGs with choices.]

SideEffects []

SeeAlso []

Definition at line 563 of file aigDup.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj, * pObjNew;
     int i, nNodes;
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nAsserts = p->nAsserts;
     pNew->nConstrs = p->nConstrs;
     pNew->nBarBufs = p->nBarBufs;
     if ( p->vFlopNums )
         pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
     // duplicate representation of choice nodes
     if ( p->pEquivs )
         pNew->pEquivs = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
     if ( p->pReprs )
         pNew->pReprs = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
     // create the PIs
     Aig_ManCleanData( p );
     // duplicate internal nodes
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
     Aig_ManForEachObj( p, pObj, i )
     {
         if ( Aig_ObjIsCi(pObj) )
         {
             pObjNew = Aig_ObjCreateCi( pNew );
             pObjNew->Level = pObj->Level;
             pObj->pData = pObjNew;
         }
         else if ( Aig_ObjIsCo(pObj) )
         {
             Aig_ManDupDfs_rec( pNew, p, Aig_ObjFanin0(pObj) );        
 //            assert( pObj->Level == ((Aig_Obj_t*)pObj->pData)->Level );
             pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
             pObj->pData = pObjNew;
         }
     }
     assert( p->pEquivs != NULL || Aig_ManBufNum(p) != 0 || Aig_ManNodeNum(p) == Aig_ManNodeNum(pNew) );
     if ( p->pEquivs == NULL && p->pReprs == NULL && (nNodes = Aig_ManCleanup( pNew )) )
         printf( "Aig_ManDupDfs(): Cleanup after AIG duplication removed %d nodes.\n", nNodes );
     Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
     // duplicate the timing manager
     if ( p->pManTime )
         pNew->pManTime = Tim_ManDup( (Tim_Man_t *)p->pManTime, 0 );
     // check the resulting network
     if ( !Aig_ManCheck(pNew) )
         printf( "Aig_ManDupDfs(): The check has failed.\n" );
     return pNew;
 }

Aig_Man_t* Aig_ManDupDfsGuided	(	Aig_Man_t *	p,
		Vec_Ptr_t *	vPios
	)

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [This duplicator works for AIGs with choices.]

SideEffects []

SeeAlso []

Definition at line 694 of file aigDup.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj, * pObjNew;
     int i, nNodes;
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nAsserts = p->nAsserts;
     pNew->nConstrs = p->nConstrs;
     pNew->nBarBufs = p->nBarBufs;
     if ( p->vFlopNums )
         pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
     // duplicate representation of choice nodes
     if ( p->pEquivs )
     {
         pNew->pEquivs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
         memset( pNew->pEquivs, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(p) );
     }
     if ( p->pReprs )
     {
         pNew->pReprs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
         memset( pNew->pReprs, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(p) );
     }
     // create the PIs
     Aig_ManCleanData( p );
     // duplicate internal nodes
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
     Vec_PtrForEachEntry( Aig_Obj_t *, vPios, pObj, i )
     {
         if ( Aig_ObjIsCi(pObj) )
         {
             pObjNew = Aig_ObjCreateCi( pNew );
             pObjNew->Level = pObj->Level;
             pObj->pData = pObjNew;
         }
         else if ( Aig_ObjIsCo(pObj) )
         {
             Aig_ManDupDfsGuided_rec( pNew, p, Aig_ObjFanin0(pObj) );        
 //            assert( pObj->Level == ((Aig_Obj_t*)pObj->pData)->Level );
             pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
             pObj->pData = pObjNew;
         }
     }
 //    assert( Aig_ManBufNum(p) != 0 || Aig_ManNodeNum(p) == Aig_ManNodeNum(pNew) );
     if ( p->pEquivs == NULL && p->pReprs == NULL && (nNodes = Aig_ManCleanup( pNew )) )
         printf( "Aig_ManDupDfs(): Cleanup after AIG duplication removed %d nodes.\n", nNodes );
     Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
     // duplicate the timing manager
     if ( p->pManTime )
         pNew->pManTime = Tim_ManDup( (Tim_Man_t *)p->pManTime, 0 );
     // check the resulting network
     if ( !Aig_ManCheck(pNew) )
         printf( "Aig_ManDupDfs(): The check has failed.\n" );
     return pNew;
 }

Aig_Man_t* Aig_ManDupExor ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Duplicates the AIG manager to have EXOR gates.]

Description [Assumes topological ordering of the nodes.]

SideEffects []

SeeAlso []

Definition at line 462 of file aigDup.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj, * pObjNew;
     int i;
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->fCatchExor = 1;
     pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nAsserts = p->nAsserts;
     pNew->nConstrs = p->nConstrs;
     pNew->nBarBufs = p->nBarBufs;
     if ( p->vFlopNums )
         pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
     // create the PIs
     Aig_ManCleanData( p );
     // duplicate internal nodes
     Aig_ManForEachObj( p, pObj, i )
     {
         if ( Aig_ObjIsBuf(pObj) )
         {
             pObjNew = Aig_ObjChild0Copy(pObj);
         }
         else if ( Aig_ObjIsNode(pObj) )
         {
             pObjNew = Aig_Oper( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj), Aig_ObjType(pObj) );
         }
         else if ( Aig_ObjIsCi(pObj) )
         {
             pObjNew = Aig_ObjCreateCi( pNew );
             pObjNew->Level = pObj->Level;
         }
         else if ( Aig_ObjIsCo(pObj) )
         {
             pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
         }
         else if ( Aig_ObjIsConst1(pObj) )
         {
             pObjNew = Aig_ManConst1(pNew);
         }
         else
             assert( 0 );
         pObj->pData = pObjNew;
     }
     Aig_ManCleanup( pNew );
     Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
     // duplicate the timing manager
     if ( p->pManTime )
         pNew->pManTime = Tim_ManDup( (Tim_Man_t *)p->pManTime, 0 );
     // check the resulting network
     if ( !Aig_ManCheck(pNew) )
         printf( "Aig_ManDupExor(): The check has failed.\n" );
     return pNew;
 }

Aig_Man_t* Aig_ManDupFlopsOnly ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [Assumes topological ordering of nodes.]

SideEffects []

SeeAlso []

Definition at line 871 of file aigDup.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj;
     int i;
     pNew = Aig_ManDupWithoutPos( p );
     Saig_ManForEachLi( p, pObj, i )
         pObj->pData = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
     Aig_ManCleanup( pNew );
     Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
     if ( !Aig_ManCheck(pNew) )
         printf( "Aig_ManDupFlopsOnly(): The check has failed.\n" );
     return pNew;
 
 }

Aig_Man_t* Aig_ManDupLevelized ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [This duplicator works for AIGs with choices.]

SideEffects []

SeeAlso []

Definition at line 763 of file aigDup.c.

 {
     Vec_Vec_t * vLevels;
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj, * pObjNew;
     int i, k;
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nAsserts = p->nAsserts;
     pNew->nConstrs = p->nConstrs;
     pNew->nBarBufs = p->nBarBufs;
     if ( p->vFlopNums )
         pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
     // duplicate representation of choice nodes
     if ( p->pEquivs )
     {
         pNew->pEquivs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
         memset( pNew->pEquivs, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(p) );
     }
     if ( p->pReprs )
     {
         pNew->pReprs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
         memset( pNew->pReprs, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(p) );
     }
     // create the PIs
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
     Aig_ManForEachCi( p, pObj, i )
     {
         pObjNew = Aig_ObjCreateCi( pNew );
         pObjNew->Level = pObj->Level;
         pObj->pData = pObjNew;
     }
     // duplicate internal nodes
     vLevels = Aig_ManLevelize( p );
     Vec_VecForEachEntry( Aig_Obj_t *, vLevels, pObj, i, k )
     {
         pObjNew = Aig_Oper( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj), Aig_ObjType(pObj) );
         pObj->pData = pObjNew;
     }
     Vec_VecFree( vLevels );
     // duplicate POs
     Aig_ManForEachCo( p, pObj, i )
     {
         pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
         pObj->pData = pObjNew;
     }
     assert( Aig_ManBufNum(p) != 0 || Aig_ManNodeNum(p) == Aig_ManNodeNum(pNew) );
 //    if ( (nNodes = Aig_ManCleanup( pNew )) )
 //        printf( "Aig_ManDupLevelized(): Cleanup after AIG duplication removed %d nodes.\n", nNodes );
     Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
     // duplicate the timing manager
     if ( p->pManTime )
         pNew->pManTime = Tim_ManDup( (Tim_Man_t *)p->pManTime, 0 );
     // check the resulting network
     if ( !Aig_ManCheck(pNew) )
         printf( "Aig_ManDupLevelized(): The check has failed.\n" );
     return pNew;
 }

Aig_Man_t* Aig_ManDupNodes	(	Aig_Man_t *	pMan,
		Vec_Ptr_t *	vArray
	)

Function*************************************************************

Synopsis [Duplicates AIG with only one primary output.]

Description []

SideEffects []

SeeAlso []

Definition at line 1302 of file aigDup.c.

 {
     Aig_Man_t * pNew;
     Vec_Ptr_t * vObjs;
     Aig_Obj_t * pObj;
     int i;
     if ( Vec_PtrSize(vArray) == 0 )
         return NULL;
     vObjs = Aig_ManDfsNodes( pMan, (Aig_Obj_t **)Vec_PtrArray(vArray), Vec_PtrSize(vArray) );
     // create the new manager
     pNew = Aig_ManStart( 10000 );
     pNew->pName = Abc_UtilStrsav( pMan->pName );
     Aig_ManConst1(pMan)->pData = Aig_ManConst1(pNew);
     Vec_PtrForEachEntry( Aig_Obj_t *, vObjs, pObj, i )
         if ( Aig_ObjIsCi(pObj) )
             pObj->pData = Aig_ObjCreateCi(pNew);
     Vec_PtrForEachEntry( Aig_Obj_t *, vObjs, pObj, i )
         if ( Aig_ObjIsNode(pObj) )
             pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
     Vec_PtrForEachEntry( Aig_Obj_t *, vArray, pObj, i )
             Aig_ObjCreateCo( pNew, (Aig_Obj_t *)pObj->pData );
     Aig_ManSetRegNum( pNew, 0 );
     Vec_PtrFree( vObjs );
     return pNew;
 }

Aig_Man_t* Aig_ManDupOneOutput	(	Aig_Man_t *	p,
		int	iPoNum,
		int	fAddRegs
	)

Function*************************************************************

Synopsis [Duplicates AIG with only one primary output.]

Description []

SideEffects []

SeeAlso []

Definition at line 1152 of file aigDup.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj;
     int i;
     assert( Aig_ManRegNum(p) > 0 );
     assert( iPoNum < Aig_ManCoNum(p)-Aig_ManRegNum(p) );
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     // create the PIs
     Aig_ManCleanData( p );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
     Aig_ManForEachCi( p, pObj, i )
         pObj->pData = Aig_ObjCreateCi( pNew );
     // set registers
     pNew->nRegs    = fAddRegs? p->nRegs : 0;
     pNew->nTruePis = fAddRegs? p->nTruePis : p->nTruePis + p->nRegs;
     pNew->nTruePos = 1;
     // duplicate internal nodes
     Aig_ManForEachNode( p, pObj, i )
         pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
     // create the PO
     pObj = Aig_ManCo( p, iPoNum );
     Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
     // create register inputs with MUXes
     if ( fAddRegs )
     {
         Aig_ManForEachLiSeq( p, pObj, i )
             Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
     }
     Aig_ManCleanup( pNew );
     return pNew;
 }

Aig_Man_t* Aig_ManDupOrdered ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [Assumes topological ordering of the nodes.]

SideEffects []

SeeAlso []

Definition at line 277 of file aigDup.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj, * pObjNew;
     int i, nNodes;
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nAsserts = p->nAsserts;
     pNew->nConstrs = p->nConstrs;
     pNew->nBarBufs = p->nBarBufs;
     if ( p->vFlopNums )
         pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
     // create the PIs
     Aig_ManCleanData( p );
     // duplicate internal nodes
     Aig_ManForEachObj( p, pObj, i )
     {
         if ( Aig_ObjIsBuf(pObj) )
         {
             pObjNew = Aig_ObjChild0Copy(pObj);
         }
         else if ( Aig_ObjIsNode(pObj) )
         {
             pObjNew = Aig_Oper( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj), Aig_ObjType(pObj) );
         }
         else if ( Aig_ObjIsCi(pObj) )
         {
             pObjNew = Aig_ObjCreateCi( pNew );
             pObjNew->Level = pObj->Level;
         }
         else if ( Aig_ObjIsCo(pObj) )
         {
             pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
         }
         else if ( Aig_ObjIsConst1(pObj) )
         {
             pObjNew = Aig_ManConst1(pNew);
         }
         else
             assert( 0 );
         pObj->pData = pObjNew;
     }
     assert( Aig_ManBufNum(p) != 0 || Aig_ManNodeNum(p) == Aig_ManNodeNum(pNew) );
     if ( (nNodes = Aig_ManCleanup( pNew )) )
         printf( "Aig_ManDupOrdered(): Cleanup after AIG duplication removed %d nodes.\n", nNodes );
     Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
     // duplicate the timing manager
     if ( p->pManTime )
         pNew->pManTime = Tim_ManDup( (Tim_Man_t *)p->pManTime, 0 );
     // check the resulting network
     if ( !Aig_ManCheck(pNew) )
         printf( "Aig_ManDupOrdered(): The check has failed.\n" );
     return pNew;
 }

Aig_Man_t* Aig_ManDupOrpos	(	Aig_Man_t *	p,
		int	fAddRegs
	)

Function*************************************************************

Synopsis [Duplicates AIG with only one primary output.]

Description []

SideEffects []

SeeAlso []

Definition at line 1099 of file aigDup.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj, * pMiter;
     int i;
     assert( Aig_ManRegNum(p) > 0 );
     if ( p->nConstrs > 0 )
     {
         printf( "The AIG manager should have no constraints.\n" );
         return NULL;
     }
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     // create the PIs
     Aig_ManCleanData( p );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
     Aig_ManForEachCi( p, pObj, i )
         pObj->pData = Aig_ObjCreateCi( pNew );
     // set registers
     pNew->nRegs    = fAddRegs? p->nRegs : 0;
     pNew->nTruePis = fAddRegs? p->nTruePis : p->nTruePis + p->nRegs;
     pNew->nTruePos = 1;
     // duplicate internal nodes
     Aig_ManForEachNode( p, pObj, i )
         pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
     // create the PO
     pMiter = Aig_ManConst0(pNew);
     Aig_ManForEachPoSeq( p, pObj, i )
         pMiter = Aig_Or( pNew, pMiter, Aig_ObjChild0Copy(pObj) ); 
     Aig_ObjCreateCo( pNew, pMiter );
     // create register inputs with MUXes
     if ( fAddRegs )
     {
         Aig_ManForEachLiSeq( p, pObj, i )
             Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
     }
     Aig_ManCleanup( pNew );
     return pNew;
 }

Aig_Man_t* Aig_ManDupRepr	(	Aig_Man_t *	p,
		int	fOrdered
	)

Function*************************************************************

Synopsis [Duplicates AIG while substituting representatives.]

Description []

SideEffects []

SeeAlso []

Definition at line 267 of file aigRepr.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj;
     int i;
     // start the HOP package
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nConstrs = p->nConstrs;
     pNew->nBarBufs = p->nBarBufs;
     if ( p->vFlopNums )
         pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
     // map the const and primary inputs
     Aig_ManCleanData( p );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
     Aig_ManForEachCi( p, pObj, i )
         pObj->pData = Aig_ObjCreateCi(pNew);
 //    Aig_ManForEachCi( p, pObj, i )
 //        pObj->pData = Aig_ObjGetRepr( p, pObj );
     // map the internal nodes
     if ( fOrdered )
     {
         Aig_ManForEachNode( p, pObj, i )
             pObj->pData = Aig_And( pNew, Aig_ObjChild0Repr(p, pObj), Aig_ObjChild1Repr(p, pObj) );
     }
     else
     {
 //        Aig_ManForEachObj( p, pObj, i )
 //            if ( p->pReprs[i] )
 //                printf( "Substituting %d for %d.\n", p->pReprs[i]->Id, pObj->Id );
 
         Aig_ManForEachCo( p, pObj, i )
             Aig_ManDupRepr_rec( pNew, p, Aig_ObjFanin0(pObj) );
     }
     // transfer the POs
     Aig_ManForEachCo( p, pObj, i )
         Aig_ObjCreateCo( pNew, Aig_ObjChild0Repr(p, pObj) );
     Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
     // check the new manager
     if ( !Aig_ManCheck(pNew) )
         printf( "Aig_ManDupRepr: Check has failed.\n" );
     return pNew;
 }

Aig_Man_t* Aig_ManDupReprBasic ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Duplicates AIG with representatives without removing registers.]

Description []

SideEffects []

SeeAlso []

Definition at line 323 of file aigRepr.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj;
     int i;
     assert( p->pReprs != NULL );
     // reconstruct AIG with representatives
     pNew = Aig_ManDupRepr( p, 0 );
     // perfrom sequential cleanup but do not remove registers
     Aig_ManSeqCleanupBasic( pNew );
     // remove pointers to the dead nodes
     Aig_ManForEachObj( p, pObj, i )
         if ( pObj->pData && Aig_ObjIsNone((Aig_Obj_t *)pObj->pData) )
             pObj->pData = NULL;
     return pNew;
 }

Aig_Man_t* Aig_ManDupRepres ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Duplicates AIG while substituting representatives.]

Description []

SideEffects []

SeeAlso []

Definition at line 920 of file aigDup.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj;
     int i;
     // start the HOP package
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nConstrs = p->nConstrs;
     pNew->nBarBufs = p->nBarBufs;
     if ( p->vFlopNums )
         pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
     // map the const and primary inputs
     Aig_ManCleanData( p );
     Aig_ManForEachObj( p, pObj, i )
     {
         if ( Aig_ObjIsNode(pObj) )
             pObj->pData = Aig_And( pNew, Aig_ObjChild0Repres(p, pObj), Aig_ObjChild1Repres(p, pObj) );
         else if ( Aig_ObjIsCi(pObj) )
         {
             pObj->pData = Aig_ObjCreateCi(pNew);
             pObj->pData = Aig_ObjGetRepres( p, pObj );
         }
         else if ( Aig_ObjIsCo(pObj) )
             pObj->pData = Aig_ObjCreateCo( pNew, Aig_ObjChild0Repres(p, pObj) );
         else if ( Aig_ObjIsConst1(pObj) )
             pObj->pData = Aig_ManConst1(pNew);
         else
             assert( 0 );
     }
     Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
     // check the new manager
     if ( !Aig_ManCheck(pNew) )
         printf( "Aig_ManDupRepres: Check has failed.\n" );
     return pNew;
 }

Aig_Man_t* Aig_ManDupRepresDfs ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Duplicates AIG while substituting representatives.]

Description []

SideEffects []

SeeAlso []

Definition at line 995 of file aigDup.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj;
     int i;
     // start the HOP package
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nConstrs = p->nConstrs;
     pNew->nBarBufs = p->nBarBufs;
     if ( p->vFlopNums )
         pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
     // map the const and primary inputs
     Aig_ManCleanData( p );
     Aig_ManForEachObj( p, pObj, i )
     {
         if ( Aig_ObjIsNode(pObj) )
             continue;
         if ( Aig_ObjIsCi(pObj) )
             pObj->pData = Aig_ObjCreateCi(pNew);
         else if ( Aig_ObjIsCo(pObj) )
         {
             Aig_ManDupRepres_rec( pNew, p, Aig_ObjFanin0(pObj) );
             pObj->pData = Aig_ObjCreateCo( pNew, Aig_ObjChild0Repres(p, pObj) );
         }
         else if ( Aig_ObjIsConst1(pObj) )
             pObj->pData = Aig_ManConst1(pNew);
         else 
             assert( 0 );
     }
     Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
     // check the new manager
     if ( !Aig_ManCheck(pNew) )
         printf( "Aig_ManDupRepresDfs: Check has failed.\n" );
     return pNew;
 }

Aig_Man_t* Aig_ManDupSimple ( Aig_Man_t * p )

DECLARATIONS ///.

CFile****************************************************************

FileName [aigDup.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [AIG duplication (re-strashing).]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id:: aigDup.c,v 1.00 2007/04/28 00:00:00 alanmi Exp

]FUNCTION DEFINITIONS /// Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [Orders nodes as follows: PIs, ANDs, POs.]

SideEffects []

SeeAlso []

Definition at line 46 of file aigDup.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj, * pObjNew;
     int i;
     assert( p->pManTime == NULL );
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nAsserts = p->nAsserts;
     pNew->nConstrs = p->nConstrs;
     pNew->nBarBufs = p->nBarBufs;
     if ( p->vFlopNums )
         pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
     // create the PIs
     Aig_ManCleanData( p );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
     Aig_ManForEachCi( p, pObj, i )
     {
         pObjNew = Aig_ObjCreateCi( pNew );
         pObjNew->Level = pObj->Level;
         pObj->pData = pObjNew;
     }
     // duplicate internal nodes
     Aig_ManForEachObj( p, pObj, i )
         if ( Aig_ObjIsBuf(pObj) )
         {
             pObjNew = Aig_ObjChild0Copy(pObj);
             pObj->pData = pObjNew;
         }
         else if ( Aig_ObjIsNode(pObj) )
         {
             pObjNew = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
             pObj->pData = pObjNew;
         }
     // add the POs
     Aig_ManForEachCo( p, pObj, i )
     {
         pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
         pObj->pData = pObjNew;
     }
     assert( Aig_ManBufNum(p) != 0 || Aig_ManNodeNum(p) == Aig_ManNodeNum(pNew) );
     Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
     // check the resulting network
     if ( !Aig_ManCheck(pNew) )
         printf( "Aig_ManDupSimple(): The check has failed.\n" );
     return pNew;
 }

Aig_Man_t* Aig_ManDupSimpleDfs ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [Orders nodes as follows: PIs, ANDs, POs.]

SideEffects [This procedure assumes that buffers are not used during HAIG recording. This way, each HAIG node is in one-to-one correspondence with old HAIG node. There is no need to create new nodes, just reassign the pointers. If it were not the case, we would need to create HAIG nodes for each new node duplicated. ]

SeeAlso []

Definition at line 184 of file aigDup.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj, * pObjNew;
     int i;
     assert( p->pManTime == NULL );
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nAsserts = p->nAsserts;
     pNew->nConstrs = p->nConstrs;
     pNew->nBarBufs = p->nBarBufs;
     if ( p->vFlopNums )
         pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
     // create the PIs
     Aig_ManCleanData( p );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
     Aig_ManForEachCi( p, pObj, i )
     {
         pObjNew = Aig_ObjCreateCi( pNew );
         pObjNew->Level = pObj->Level;
         pObj->pData = pObjNew;
     }
     // duplicate internal nodes
     Aig_ManForEachObj( p, pObj, i )
         if ( !Aig_ObjIsCo(pObj) )
         {
             Aig_ManDupSimpleDfs_rec( pNew, p, pObj );        
             assert( pObj->Level == ((Aig_Obj_t*)pObj->pData)->Level );
         }
     // add the POs
     Aig_ManForEachCo( p, pObj, i )
     {
         pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
         pObj->pData = pObjNew;
     }
     assert( Aig_ManBufNum(p) != 0 || Aig_ManNodeNum(p) == Aig_ManNodeNum(pNew) );
     Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
     // check the resulting network
     if ( !Aig_ManCheck(pNew) )
         printf( "Aig_ManDupSimple(): The check has failed.\n" );
     return pNew;
 }

Aig_Obj_t* Aig_ManDupSimpleDfs_rec	(	Aig_Man_t *	pNew,
		Aig_Man_t *	p,
		Aig_Obj_t *	pObj
	)

Function*************************************************************

Synopsis [Duplicates the AIG manager recursively.]

Description []

SideEffects []

SeeAlso []

Definition at line 157 of file aigDup.c.

 {
     if ( pObj->pData )
         return (Aig_Obj_t *)pObj->pData;
     Aig_ManDupSimpleDfs_rec( pNew, p, Aig_ObjFanin0(pObj) );
     if ( Aig_ObjIsBuf(pObj) )
         return (Aig_Obj_t *)(pObj->pData = Aig_ObjChild0Copy(pObj));
     Aig_ManDupSimpleDfs_rec( pNew, p, Aig_ObjFanin1(pObj) );
     pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
     return (Aig_Obj_t *)pObj->pData;
 }

Aig_Man_t* Aig_ManDupSimpleDfsPart	(	Aig_Man_t *	p,
		Vec_Ptr_t *	vPis,
		Vec_Ptr_t *	vPos
	)

Function*************************************************************

Synopsis [Duplicates part of the AIG manager.]

Description [Orders nodes as follows: PIs, ANDs, POs.]

SideEffects []

SeeAlso []

Definition at line 240 of file aigDup.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj, * pObjNew;
     int i;
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     // create the PIs
     Aig_ManCleanData( p );
     Aig_ManConst1(p)->pData = Aig_ManConst1( pNew );
     Vec_PtrForEachEntry( Aig_Obj_t *, vPis, pObj, i )
         pObj->pData = Aig_ObjCreateCi( pNew );
     // duplicate internal nodes
     Vec_PtrForEachEntry( Aig_Obj_t *, vPos, pObj, i )
     {
         pObjNew = Aig_ManDupSimpleDfs_rec( pNew, p, Aig_ObjFanin0(pObj) );        
         pObjNew = Aig_NotCond( pObjNew, Aig_ObjFaninC0(pObj) );
         Aig_ObjCreateCo( pNew, pObjNew );
     }
     Aig_ManSetRegNum( pNew, 0 );
     // check the resulting network
     if ( !Aig_ManCheck(pNew) )
         printf( "Aig_ManDupSimple(): The check has failed.\n" );
     return pNew;
 }

Aig_Man_t* Aig_ManDupSimpleWithHints	(	Aig_Man_t *	p,
		Vec_Int_t *	vHints
	)

Function*************************************************************

Synopsis [Derives AIG with hints.]

Description []

SideEffects []

SeeAlso []

Definition at line 107 of file aigDup.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj;
     int i, Entry;
     assert( p->nAsserts == 0 || p->nConstrs == 0 );
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->pName = Abc_UtilStrsav( p->pName );
     // create the PIs
     Aig_ManCleanData( p );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
     Aig_ManForEachCi( p, pObj, i )
     {
         pObj->pData = Aig_ObjCreateCi( pNew );
         Entry = Vec_IntEntry( vHints, Aig_ObjId(pObj) );
         if ( Entry == 0 || Entry == 1 )
             pObj->pData = Aig_NotCond( Aig_ManConst1(pNew), Entry ); // restrict to the complement of constraint!!!
     }
     // duplicate internal nodes
     Aig_ManForEachNode( p, pObj, i )
     {
         pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
         Entry = Vec_IntEntry( vHints, Aig_ObjId(pObj) );
         if ( Entry == 0 || Entry == 1 )
             pObj->pData = Aig_NotCond( Aig_ManConst1(pNew), Entry ); // restrict to the complement of constraint!!!
     }
     // add the POs
     Aig_ManForEachCo( p, pObj, i )
         pObj->pData = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
     Aig_ManCleanup( pNew );
     Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
     // check the resulting network
     if ( !Aig_ManCheck(pNew) )
         printf( "Llb_ManDeriveAigWithHints(): The check has failed.\n" );
     return pNew;
 }

Aig_Man_t* Aig_ManDupTrim ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [Assumes topological ordering of the nodes.]

SideEffects []

SeeAlso []

Definition at line 413 of file aigDup.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj, * pObjNew;
     int i, nNodes;
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nConstrs = p->nConstrs;
     pNew->nBarBufs = p->nBarBufs;
     // create the PIs
     Aig_ManCleanData( p );
     // duplicate internal nodes
     Aig_ManForEachObj( p, pObj, i )
     {
         if ( Aig_ObjIsNode(pObj) )
             pObjNew = Aig_Oper( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj), Aig_ObjType(pObj) );
         else if ( Aig_ObjIsCi(pObj) )
             pObjNew = (Aig_ObjRefs(pObj) > 0 || Saig_ObjIsLo(p, pObj)) ? Aig_ObjCreateCi(pNew) : NULL;
         else if ( Aig_ObjIsCo(pObj) )
             pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
         else if ( Aig_ObjIsConst1(pObj) )
             pObjNew = Aig_ManConst1(pNew);
         else
             assert( 0 );
         pObj->pData = pObjNew;
     }
     assert( Aig_ManNodeNum(p) == Aig_ManNodeNum(pNew) );
     if ( (nNodes = Aig_ManCleanup( pNew )) )
         printf( "Aig_ManDupTrim(): Cleanup after AIG duplication removed %d nodes.\n", nNodes );
     Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
     // check the resulting network
     if ( !Aig_ManCheck(pNew) )
         printf( "Aig_ManDupTrim(): The check has failed.\n" );
     return pNew;
 }

Aig_Man_t* Aig_ManDupUnsolvedOutputs	(	Aig_Man_t *	p,
		int	fAddRegs
	)

Function*************************************************************

Synopsis [Duplicates AIG with only one primary output.]

Description []

SideEffects []

SeeAlso []

Definition at line 1199 of file aigDup.c.

 { 
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj;
     int i, nOuts = 0;
     assert( Aig_ManRegNum(p) > 0 );
     if ( p->nConstrs > 0 )
     {
         printf( "The AIG manager should have no constraints.\n" );
         return NULL;
     }
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     // create the PIs
     Aig_ManCleanData( p );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
     Aig_ManForEachCi( p, pObj, i )
         pObj->pData = Aig_ObjCreateCi( pNew );
     // create the POs
     nOuts = 0;
     Aig_ManForEachPoSeq( p, pObj, i )
         nOuts += ( Aig_ObjFanin0(pObj) != Aig_ManConst1(p) );
     // set registers
     pNew->nRegs    = fAddRegs? p->nRegs : 0;
     pNew->nTruePis = fAddRegs? p->nTruePis : p->nTruePis + p->nRegs;
     pNew->nTruePos = nOuts;
     // duplicate internal nodes
     Aig_ManForEachNode( p, pObj, i )
         pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
     // create the PO
     Aig_ManForEachPoSeq( p, pObj, i )
         if ( Aig_ObjFanin0(pObj) != Aig_ManConst1(p) )
             Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
     // create register inputs with MUXes
     if ( fAddRegs )
     {
         Aig_ManForEachLiSeq( p, pObj, i )
             Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
     }
     Aig_ManCleanup( pNew );
     return pNew;
 }

Aig_Man_t* Aig_ManDupWithoutPos ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [Assumes topological ordering of nodes.]

SideEffects []

SeeAlso []

Definition at line 835 of file aigDup.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj;
     int i;
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     // create the PIs
     Aig_ManCleanData( p );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
     Aig_ManForEachCi( p, pObj, i )
         pObj->pData = Aig_ObjCreateCi( pNew );
     // duplicate internal nodes
     Aig_ManForEachObj( p, pObj, i )
     {
         assert( !Aig_ObjIsBuf(pObj) );
         if ( Aig_ObjIsNode(pObj) )
             pObj->pData = Aig_Oper( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj), Aig_ObjType(pObj) );
     }
     assert( Aig_ManBufNum(p) != 0 || Aig_ManNodeNum(p) == Aig_ManNodeNum(pNew) );
     return pNew;
 }

static int Aig_ManExorNum ( Aig_Man_t * p )

inlinestatic

Definition at line 255 of file aig.h.

255 { return p->nObjs[AIG_OBJ_EXOR]; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

AIG_OBJ_EXOR

Definition: aig.h:64

Aig_Man_t* Aig_ManExtractMiter	(	Aig_Man_t *	p,
		Aig_Obj_t *	pNode1,
		Aig_Obj_t *	pNode2
	)

Function*************************************************************

Synopsis [Extracts the miter composed of XOR of the two nodes.]

Description []

SideEffects []

SeeAlso []

Definition at line 147 of file aigMan.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj;
     int i;
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     // create the PIs
     Aig_ManCleanData( p );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
     Aig_ManForEachCi( p, pObj, i )
         pObj->pData = Aig_ObjCreateCi(pNew);
     // dump the nodes
     Aig_ManDup_rec( pNew, p, pNode1 );   
     Aig_ManDup_rec( pNew, p, pNode2 );   
     // construct the EXOR
     pObj = Aig_Exor( pNew, (Aig_Obj_t *)pNode1->pData, (Aig_Obj_t *)pNode2->pData ); 
     pObj = Aig_NotCond( pObj, Aig_Regular(pObj)->fPhase ^ Aig_IsComplement(pObj) );
     // add the PO
     Aig_ObjCreateCo( pNew, pObj );
     // check the resulting network
     if ( !Aig_ManCheck(pNew) )
         printf( "Aig_ManExtractMiter(): The check has failed.\n" );
     return pNew;
 }

void Aig_ManFanoutStart ( Aig_Man_t * p )

FUNCTION DEFINITIONS ///.

Function*************************************************************

Synopsis [Create fanout for all objects in the manager.]

Description []

SideEffects []

SeeAlso []

Definition at line 56 of file aigFanout.c.

 {
     Aig_Obj_t * pObj;
     int i;
     assert( Aig_ManBufNum(p) == 0 );
     // allocate fanout datastructure
     assert( p->pFanData == NULL );
     p->nFansAlloc = 2 * Aig_ManObjNumMax(p);
     if ( p->nFansAlloc < (1<<12) )
         p->nFansAlloc = (1<<12);
     p->pFanData = ABC_ALLOC( int, 5 * p->nFansAlloc );
     memset( p->pFanData, 0, sizeof(int) * 5 * p->nFansAlloc );
     // add fanouts for all objects
     Aig_ManForEachObj( p, pObj, i )
     {
         if ( Aig_ObjChild0(pObj) )
             Aig_ObjAddFanout( p, Aig_ObjFanin0(pObj), pObj );
         if ( Aig_ObjChild1(pObj) )
             Aig_ObjAddFanout( p, Aig_ObjFanin1(pObj), pObj );
     }
 }

void Aig_ManFanoutStop ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Deletes fanout for all objects in the manager.]

Description []

SideEffects []

SeeAlso []

Definition at line 89 of file aigFanout.c.

 {
     assert( p->pFanData != NULL );
     ABC_FREE( p->pFanData );
     p->nFansAlloc = 0;
 }

static Aig_Obj_t* Aig_ManFetchMemory ( Aig_Man_t * p )

inlinestatic

Definition at line 368 of file aig.h.

 {
     extern char * Aig_MmFixedEntryFetch( Aig_MmFixed_t * p );
     Aig_Obj_t * pTemp;
     pTemp = (Aig_Obj_t *)Aig_MmFixedEntryFetch( p->pMemObjs );
     memset( pTemp, 0, sizeof(Aig_Obj_t) ); 
     pTemp->Id = Vec_PtrSize(p->vObjs);
     Vec_PtrPush( p->vObjs, pTemp );
     return pTemp;
 }

void Aig_ManFindCut	(	Aig_Obj_t *	pRoot,
		Vec_Ptr_t *	vFront,
		Vec_Ptr_t *	vVisited,
		int	nSizeLimit,
		int	nFanoutLimit
	)

Function*************************************************************

Synopsis [Computes one sequential cut of the given size.]

Description []

SideEffects []

SeeAlso []

Definition at line 145 of file aigWin.c.

 {
     Aig_Obj_t * pNode;
     int i;
 
     assert( !Aig_IsComplement(pRoot) );
     assert( Aig_ObjIsNode(pRoot) );
     assert( Aig_ObjChild0(pRoot) );
     assert( Aig_ObjChild1(pRoot) );
 
     // start the cut 
     Vec_PtrClear( vFront );
     Vec_PtrPush( vFront, Aig_ObjFanin0(pRoot) );
     Vec_PtrPush( vFront, Aig_ObjFanin1(pRoot) );
 
     // start the visited nodes
     Vec_PtrClear( vVisited );
     Vec_PtrPush( vVisited, pRoot );
     Vec_PtrPush( vVisited, Aig_ObjFanin0(pRoot) );
     Vec_PtrPush( vVisited, Aig_ObjFanin1(pRoot) );
 
     // mark these nodes
     assert( !pRoot->fMarkA );
     assert( !Aig_ObjFanin0(pRoot)->fMarkA );
     assert( !Aig_ObjFanin1(pRoot)->fMarkA );
     pRoot->fMarkA = 1;
     Aig_ObjFanin0(pRoot)->fMarkA = 1;
     Aig_ObjFanin1(pRoot)->fMarkA = 1;
 
     // compute the cut
     while ( Aig_ManFindCut_int( vFront, vVisited, nSizeLimit, nFanoutLimit ) );
     assert( Vec_PtrSize(vFront) <= nSizeLimit );
 
     // clean the visit markings
     Vec_PtrForEachEntry( Aig_Obj_t *, vVisited, pNode, i )
         pNode->fMarkA = 0;
 }

void Aig_ManFlipFirstPo ( Aig_Man_t * p )

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 457 of file aigMan.c.

 {
     Aig_ObjChild0Flip( Aig_ManCo(p, 0) ); 
 }

Aig_Man_t* Aig_ManFraigPartitioned	(	Aig_Man_t *	pAig,
		int	nPartSize,
		int	nConfMax,
		int	nLevelMax,
		int	fVerbose
	)

Function*************************************************************

Synopsis [Performs partitioned choice computation.]

Description [Assumes that each output in the second AIG cannot have more supp vars than the same output in the first AIG.]

SideEffects []

SeeAlso []

Definition at line 1379 of file aigPart.c.

 {
 //    extern Aig_Man_t * Fra_FraigChoice( Aig_Man_t * pManAig, int nConfMax, int nLevelMax );
 
     Aig_Man_t * pAigPart, * pAigTemp;
     Vec_Int_t * vPart;
     Vec_Ptr_t * vParts;
     Aig_Obj_t * pObj;
     void ** ppData;
     int i, k;
 
     // partition the outputs of the AIG
     vParts = Aig_ManPartitionNaive( pAig, nPartSize );
 
     // start the equivalence classes
     Aig_ManReprStart( pAig, Aig_ManObjNumMax(pAig) );
 
     // set the PI numbers
     Aig_ManSetCioIds( pAig );
 
     // create the total fraiged AIG
     Vec_PtrForEachEntry( Vec_Int_t *, vParts, vPart, i )
     {
         // derive the partition AIG
         pAigPart = Aig_ManDupPartAll( pAig, vPart );
         // store contents of pData pointers
         ppData = ABC_ALLOC( void *, Aig_ManObjNumMax(pAigPart) );
         Aig_ManForEachObj( pAigPart, pObj, k )
             ppData[k] = pObj->pData;
         // report the process
         if ( fVerbose )
         printf( "Part %4d  (out of %4d)  PI = %5d. PO = %5d. And = %6d. Lev = %4d.\r", 
             i+1, Vec_PtrSize(vParts), Aig_ManCiNum(pAigPart), Aig_ManCoNum(pAigPart), 
             Aig_ManNodeNum(pAigPart), Aig_ManLevelNum(pAigPart) );
         // compute equivalence classes (to be stored in pNew->pReprs)
         pAigTemp = Fra_FraigChoice( pAigPart, nConfMax, nLevelMax );
         Aig_ManStop( pAigTemp );
         // reset the pData pointers
         Aig_ManForEachObj( pAigPart, pObj, k )
             pObj->pData = ppData[k];
         ABC_FREE( ppData );
         // transfer representatives to the total AIG
         if ( pAigPart->pReprs )
             Aig_ManTransferRepr( pAig, pAigPart );
         Aig_ManStop( pAigPart );
     }
     if ( fVerbose )
     printf( "                                                                                          \r" );
     Vec_VecFree( (Vec_Vec_t *)vParts );
 
     // clear the PI numbers
     Aig_ManCleanCioIds( pAig );
 
     // derive the result of choicing
     return Aig_ManDupRepr( pAig, 0 );
 }

Aig_Man_t* Aig_ManFrames	(	Aig_Man_t *	pAig,
		int	nFs,
		int	fInit,
		int	fOuts,
		int	fRegs,
		int	fEnlarge,
		Aig_Obj_t ***	ppObjMap
	)

FUNCTION DEFINITIONS ///.

Function*************************************************************

Synopsis [Performs timeframe expansion of the AIG.]

Description []

SideEffects []

SeeAlso []

Definition at line 51 of file aigFrames.c.

 {
     Aig_Man_t * pFrames;
     Aig_Obj_t * pObj, * pObjLi, * pObjLo, * pObjNew;
     Aig_Obj_t ** pObjMap;
     int i, f;
 
     // create mapping for the frames nodes
     pObjMap  = ABC_ALLOC( Aig_Obj_t *, nFs * Aig_ManObjNumMax(pAig) );
     memset( pObjMap, 0, sizeof(Aig_Obj_t *) * nFs * Aig_ManObjNumMax(pAig) );
 
     // start the fraig package
     pFrames = Aig_ManStart( Aig_ManObjNumMax(pAig) * nFs );
     pFrames->pName = Abc_UtilStrsav( pAig->pName );
     pFrames->pSpec = Abc_UtilStrsav( pAig->pSpec );
     // map constant nodes
     for ( f = 0; f < nFs; f++ )
         Aig_ObjSetFrames( pObjMap, nFs, Aig_ManConst1(pAig), f, Aig_ManConst1(pFrames) );
     // create PI nodes for the frames
     for ( f = 0; f < nFs; f++ )
         Aig_ManForEachPiSeq( pAig, pObj, i )
             Aig_ObjSetFrames( pObjMap, nFs, pObj, f, Aig_ObjCreateCi(pFrames) );
     // set initial state for the latches
     if ( fInit )
     {
         Aig_ManForEachLoSeq( pAig, pObj, i )
             Aig_ObjSetFrames( pObjMap, nFs, pObj, 0, Aig_ManConst0(pFrames) );
     }
     else 
     {
         Aig_ManForEachLoSeq( pAig, pObj, i )
             Aig_ObjSetFrames( pObjMap, nFs, pObj, 0, Aig_ObjCreateCi(pFrames) );
     }
 
     // add timeframes
     for ( f = 0; f < nFs; f++ )
     {
 //        printf( "Frame = %d.\n", f );
         // add internal nodes of this frame
         Aig_ManForEachNode( pAig, pObj, i )
         {
 //            Aig_Obj_t * pFanin0 = Aig_ObjChild0Frames(pObjMap,nFs,pObj,f);
 //            Aig_Obj_t * pFanin1 = Aig_ObjChild1Frames(pObjMap,nFs,pObj,f);
 //            printf( "Node = %3d.  Fanin0 = %3d. Fanin1 = %3d.\n", pObj->Id, Aig_Regular(pFanin0)->Id, Aig_Regular(pFanin1)->Id );
             pObjNew = Aig_And( pFrames, Aig_ObjChild0Frames(pObjMap,nFs,pObj,f), Aig_ObjChild1Frames(pObjMap,nFs,pObj,f) );
             Aig_ObjSetFrames( pObjMap, nFs, pObj, f, pObjNew );
         }
         // set the latch inputs and copy them into the latch outputs of the next frame
         Aig_ManForEachLiLoSeq( pAig, pObjLi, pObjLo, i )
         {
             pObjNew = Aig_ObjChild0Frames(pObjMap,nFs,pObjLi,f);
             if ( f < nFs - 1 )
                 Aig_ObjSetFrames( pObjMap, nFs, pObjLo, f+1, pObjNew );
         }
     }
     if ( fOuts )
     {
         for ( f = fEnlarge?nFs-1:0; f < nFs; f++ )
             Aig_ManForEachPoSeq( pAig, pObj, i )
             {
                 pObjNew = Aig_ObjCreateCo( pFrames, Aig_ObjChild0Frames(pObjMap,nFs,pObj,f) );
                 Aig_ObjSetFrames( pObjMap, nFs, pObj, f, pObjNew );
             }
     }
     if ( fRegs )
     {
         pFrames->nRegs = pAig->nRegs;
         Aig_ManForEachLiSeq( pAig, pObj, i )
         {
             pObjNew = Aig_ObjCreateCo( pFrames, Aig_ObjChild0Frames(pObjMap,nFs,pObj,fEnlarge?0:nFs-1) );
             Aig_ObjSetFrames( pObjMap, nFs, pObj, nFs-1, pObjNew );
         }
         Aig_ManSetRegNum( pFrames, Aig_ManRegNum(pAig) );
     }
     Aig_ManCleanup( pFrames );
     // return the new manager
     if ( ppObjMap )
         *ppObjMap = pObjMap;
     else
         ABC_FREE( pObjMap );
     return pFrames;
 }

static int Aig_ManGetCost ( Aig_Man_t * p )

inlinestatic

Definition at line 257 of file aig.h.

257 { return p->nObjs[AIG_OBJ_AND]+3*p->nObjs[AIG_OBJ_EXOR]; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

AIG_OBJ_EXOR

Definition: aig.h:64

AIG_OBJ_AND

Definition: aig.h:63

static Aig_Obj_t* Aig_ManGhost ( Aig_Man_t * p )

inlinestatic

Definition at line 265 of file aig.h.

265 { return &p->Ghost; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

int Aig_ManHasNoGaps ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Make sure AIG has not gaps in the numeric order.]

Description []

SideEffects []

SeeAlso []

Definition at line 86 of file aigUtil.c.

 {
     return (int)(Aig_ManObjNum(p) == Aig_ManCiNum(p) + Aig_ManCoNum(p) + Aig_ManNodeNum(p) + 1);
 }

void Aig_ManIncrementTravId ( Aig_Man_t * p )

DECLARATIONS ///.

CFile****************************************************************

FileName [aigUtil.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [Various procedures.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id:: aigUtil.c,v 1.00 2007/04/28 00:00:00 alanmi Exp

]FUNCTION DEFINITIONS /// Function*************************************************************

Synopsis [Increments the current traversal ID of the network.]

Description []

SideEffects []

SeeAlso []

Definition at line 44 of file aigUtil.c.

 {
     if ( p->nTravIds >= (1<<30)-1 )
         Aig_ManCleanData( p );
     p->nTravIds++;
 }

void Aig_ManInvertConstraints ( Aig_Man_t * pAig )

Function*************************************************************

Synopsis [Complements the constraint outputs.]

Description []

SideEffects []

SeeAlso []

Definition at line 1543 of file aigUtil.c.

 {
     Aig_Obj_t * pObj;
     int i;
     if ( Aig_ManConstrNum(pAig) == 0 )
         return;
     Saig_ManForEachPo( pAig, pObj, i )
     {
         if ( i >= Saig_ManPoNum(pAig) - Aig_ManConstrNum(pAig) )
             Aig_ObjChild0Flip( pObj );
     }
 }

Vec_Vec_t* Aig_ManLevelize ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Levelizes the nodes.]

Description []

SideEffects []

SeeAlso []

Definition at line 307 of file aigDfs.c.

 {
     Aig_Obj_t * pObj;
     Vec_Vec_t * vLevels;
     int nLevels, i;
     nLevels = Aig_ManLevelNum( p );
     vLevels = Vec_VecStart( nLevels + 1 );
     Aig_ManForEachObj( p, pObj, i )
     {
         assert( (int)pObj->Level <= nLevels );
         Vec_VecPush( vLevels, pObj->Level, pObj );
     }
     return vLevels;
 }

int Aig_ManLevelNum ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Computes the max number of levels in the manager.]

Description []

SideEffects []

SeeAlso []

Definition at line 486 of file aigDfs.c.

 {
     Aig_Obj_t * pObj;
     int i, LevelsMax;
     LevelsMax = 0;
     Aig_ManForEachCo( p, pObj, i )
         LevelsMax = Abc_MaxInt( LevelsMax, (int)Aig_ObjFanin0(pObj)->Level );
     return LevelsMax;
 }

int Aig_ManLevels ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Collect the latches.]

Description []

SideEffects []

SeeAlso []

Definition at line 102 of file aigUtil.c.

 {
     Aig_Obj_t * pObj;
     int i, LevelMax = 0;
     Aig_ManForEachCo( p, pObj, i )
         LevelMax = Abc_MaxInt( LevelMax, (int)Aig_ObjFanin0(pObj)->Level );
     return LevelMax;
 }

static Aig_Obj_t* Aig_ManLi	(	Aig_Man_t *	p,
		int	i
	)

inlinestatic

Definition at line 269 of file aig.h.

269 { return (Aig_Obj_t *)Vec_PtrEntry(p->vCos, Aig_ManCoNum(p)-Aig_ManRegNum(p)+i); }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

Aig_ManCoNum

static int Aig_ManCoNum(Aig_Man_t *p)

Definition: aig.h:252

Aig_Obj_t_

Definition: aig.h:69

Vec_PtrEntry

static void * Vec_PtrEntry(Vec_Ptr_t *p, int i)

Definition: vecPtr.h:362

Aig_ManRegNum

static int Aig_ManRegNum(Aig_Man_t *p)

Definition: aig.h:260

static Aig_Obj_t* Aig_ManLo	(	Aig_Man_t *	p,
		int	i
	)

inlinestatic

Definition at line 268 of file aig.h.

268 { return (Aig_Obj_t *)Vec_PtrEntry(p->vCis, Aig_ManCiNum(p)-Aig_ManRegNum(p)+i); }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

Aig_ManCiNum

static int Aig_ManCiNum(Aig_Man_t *p)

Definition: aig.h:251

Aig_Obj_t_

Definition: aig.h:69

Vec_PtrEntry

static void * Vec_PtrEntry(Vec_Ptr_t *p, int i)

Definition: vecPtr.h:362

Aig_ManRegNum

static int Aig_ManRegNum(Aig_Man_t *p)

Definition: aig.h:260

void Aig_ManMarkValidChoices ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Marks the nodes that are Creates choices.]

Description [The input AIG is assumed to have representatives assigned.]

SideEffects []

SeeAlso []

Definition at line 481 of file aigRepr.c.

 {
     Aig_Obj_t * pObj, * pRepr;
     int i;
     assert( p->pReprs != NULL );
     // create equivalent nodes in the manager
     assert( p->pEquivs == NULL );
     p->pEquivs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
     memset( p->pEquivs, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(p) );
     // make the choice nodes
     Aig_ManForEachNode( p, pObj, i )
     {
         pRepr = Aig_ObjFindRepr( p, pObj );
         if ( pRepr == NULL )
             continue;
         // skip constant and PI classes
         if ( !Aig_ObjIsNode(pRepr) )
         {
             Aig_ObjClearRepr( p, pObj );
             continue;
         }
         // skip choices with combinatinal loops
         if ( Aig_ObjCheckTfi( p, pObj, pRepr ) )
         {
             Aig_ObjClearRepr( p, pObj );
             continue;
         }
 //printf( "Node %d is represented by node %d.\n", pObj->Id, pRepr->Id );
         // add choice to the choice node
         if ( pObj->nRefs > 0 )
         {
             Aig_ObjClearRepr( p, pObj );
             continue;
         }
         assert( pObj->nRefs == 0 );
         p->pEquivs[pObj->Id] = p->pEquivs[pRepr->Id];
         p->pEquivs[pRepr->Id] = pObj;
     }
 }

Vec_Ptr_t* Aig_ManMiterPartitioned	(	Aig_Man_t *	p1,
		Aig_Man_t *	p2,
		int	nPartSize,
		int	fSmart
	)

Function*************************************************************

Synopsis [Create partitioned miter of the two AIGs.]

Description [Assumes that each output in the second AIG cannot have more supp vars than the same output in the first AIG.]

SideEffects []

SeeAlso []

Definition at line 1189 of file aigPart.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pMiter;
     Vec_Ptr_t * vMiters, * vNodes1, * vNodes2;
     Vec_Ptr_t * vParts, * vPartSupps;
     Vec_Int_t * vPart, * vPartSupp;
     int i, k;
     // partition the first manager
     if ( fSmart )
         vParts = Aig_ManPartitionSmart( p1, nPartSize, 0, &vPartSupps );
     else
     {
         vParts = Aig_ManPartitionNaive( p1, nPartSize );
         vPartSupps = Aig_ManSupportNodes( p1, vParts );
     }
     // derive miters
     vMiters = Vec_PtrAlloc( Vec_PtrSize(vParts) );
     for ( i = 0; i < Vec_PtrSize(vParts); i++ )
     {
         // get partition and its support
         vPart     = (Vec_Int_t *)Vec_PtrEntry( vParts, i );
         vPartSupp = (Vec_Int_t *)Vec_PtrEntry( vPartSupps, i );
         // create the new miter
         pNew = Aig_ManStart( 1000 );
         // create the PIs
         for ( k = 0; k < Vec_IntSize(vPartSupp); k++ )
             Aig_ObjCreateCi( pNew );
         // copy the components
         vNodes1 = Aig_ManDupPart( pNew, p1, vPart, vPartSupp, 0 );
         vNodes2 = Aig_ManDupPart( pNew, p2, vPart, vPartSupp, 0 );
         // create the miter
         pMiter = Aig_MiterTwo( pNew, vNodes1, vNodes2 );
         Vec_PtrFree( vNodes1 );
         Vec_PtrFree( vNodes2 );
         // create the output
         Aig_ObjCreateCo( pNew, pMiter );
         // clean up
         Aig_ManCleanup( pNew );
         Vec_PtrPush( vMiters, pNew );
     }
     Vec_VecFree( (Vec_Vec_t *)vParts );
     Vec_VecFree( (Vec_Vec_t *)vPartSupps );
     return vMiters;
 }

Vec_Ptr_t* Aig_ManMuxesCollect ( Aig_Man_t * pAig )

Function*************************************************************

Synopsis [Collects muxes.]

Description []

SideEffects []

SeeAlso []

Definition at line 1460 of file aigUtil.c.

 {
     Vec_Ptr_t * vMuxes;
     Aig_Obj_t * pObj;
     int i;
     vMuxes = Vec_PtrAlloc( 100 );
     Aig_ManForEachNode( pAig, pObj, i )
         if ( Aig_ObjIsMuxType(pObj) )
             Vec_PtrPush( vMuxes, pObj );
     return vMuxes;
 }

void Aig_ManMuxesDeref	(	Aig_Man_t *	pAig,
		Vec_Ptr_t *	vMuxes
	)

Function*************************************************************

Synopsis [Dereferences muxes.]

Description []

SideEffects []

SeeAlso []

Definition at line 1483 of file aigUtil.c.

 {
     Aig_Obj_t * pObj, * pNodeT, * pNodeE, * pNodeC;
     int i;
     Vec_PtrForEachEntry( Aig_Obj_t *, vMuxes, pObj, i )
     {
         if ( Aig_ObjRecognizeExor( pObj, &pNodeT, &pNodeE ) )
         {
             pNodeT->nRefs--;
             pNodeE->nRefs--;
         }
         else
         {
             pNodeC = Aig_ObjRecognizeMux( pObj, &pNodeT, &pNodeE );
             pNodeC->nRefs--;
         }
     }
 }

void Aig_ManMuxesRef	(	Aig_Man_t *	pAig,
		Vec_Ptr_t *	vMuxes
	)

Function*************************************************************

Synopsis [References muxes.]

Description []

SideEffects []

SeeAlso []

Definition at line 1513 of file aigUtil.c.

 {
     Aig_Obj_t * pObj, * pNodeT, * pNodeE, * pNodeC;
     int i;
     Vec_PtrForEachEntry( Aig_Obj_t *, vMuxes, pObj, i )
     {
         if ( Aig_ObjRecognizeExor( pObj, &pNodeT, &pNodeE ) )
         {
             pNodeT->nRefs++;
             pNodeE->nRefs++;
         }
         else
         {
             pNodeC = Aig_ObjRecognizeMux( pObj, &pNodeT, &pNodeE );
             pNodeC->nRefs++;
         }
     }
 }

static int Aig_ManNodeNum ( Aig_Man_t * p )

inlinestatic

Definition at line 256 of file aig.h.

256 { return p->nObjs[AIG_OBJ_AND]+p->nObjs[AIG_OBJ_EXOR]; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

AIG_OBJ_EXOR

Definition: aig.h:64

AIG_OBJ_AND

Definition: aig.h:63

static Aig_Obj_t* Aig_ManObj	(	Aig_Man_t *	p,
		int	i
	)

inlinestatic

Definition at line 270 of file aig.h.

270 { return p->vObjs ? (Aig_Obj_t *)Vec_PtrEntry(p->vObjs, i) : NULL; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

Aig_Obj_t_

Definition: aig.h:69

Vec_PtrEntry

static void * Vec_PtrEntry(Vec_Ptr_t *p, int i)

Definition: vecPtr.h:362

static int Aig_ManObjNum ( Aig_Man_t * p )

inlinestatic

Definition at line 258 of file aig.h.

258 { return Vec_PtrSize(p->vObjs) - p->nDeleted; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

Vec_PtrSize

static int Vec_PtrSize(Vec_Ptr_t *p)

Definition: vecPtr.h:295

static int Aig_ManObjNumMax ( Aig_Man_t * p )

inlinestatic

Definition at line 259 of file aig.h.

259 { return Vec_PtrSize(p->vObjs); }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

Vec_PtrSize

static int Vec_PtrSize(Vec_Ptr_t *p)

Definition: vecPtr.h:295

Vec_Ptr_t* Aig_ManOrderPios	(	Aig_Man_t *	p,
		Aig_Man_t *	pOrder
	)

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [This duplicator works for AIGs with choices.]

SideEffects []

SeeAlso []

Definition at line 626 of file aigDup.c.

 {
     Vec_Ptr_t * vPios;
     Aig_Obj_t * pObj;
     int i;
     assert( Aig_ManCiNum(p) == Aig_ManCiNum(pOrder) );
     assert( Aig_ManCoNum(p) == Aig_ManCoNum(pOrder) );
     Aig_ManSetCioIds( pOrder );
     vPios = Vec_PtrAlloc( Aig_ManCiNum(p) + Aig_ManCoNum(p) );
     Aig_ManForEachObj( pOrder, pObj, i )
     {
         if ( Aig_ObjIsCi(pObj) )
             Vec_PtrPush( vPios, Aig_ManCi(p, Aig_ObjCioId(pObj)) );
         else if ( Aig_ObjIsCo(pObj) )
             Vec_PtrPush( vPios, Aig_ManCo(p, Aig_ObjCioId(pObj)) );
     }
     Aig_ManCleanCioIds( pOrder );
     return vPios;
 }

void Aig_ManOrderStart ( Aig_Man_t * p )

DECLARATIONS ///.

CFile****************************************************************

FileName [aigOrder.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [Dynamically updated topological order.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id:: aigOrder.c,v 1.00 2007/04/28 00:00:00 alanmi Exp

]FUNCTION DEFINITIONS /// Function*************************************************************

Synopsis [Initializes the order datastructure.]

Description []

SideEffects []

SeeAlso []

Definition at line 45 of file aigOrder.c.

 {
     Aig_Obj_t * pObj;
     int i;
     assert( Aig_ManBufNum(p) == 0 );
     // allocate order datastructure
     assert( p->pOrderData == NULL );
     p->nOrderAlloc = 2 * Aig_ManObjNumMax(p);
     if ( p->nOrderAlloc < (1<<12) )
         p->nOrderAlloc = (1<<12);
     p->pOrderData = ABC_ALLOC( unsigned, 2 * p->nOrderAlloc );
     memset( p->pOrderData, 0xFF, sizeof(unsigned) * 2 * p->nOrderAlloc );
     // add the constant node
     p->pOrderData[0] = p->pOrderData[1] = 0;
     p->iPrev = p->iNext = 0;
     // add the internal nodes
     Aig_ManForEachNode( p, pObj, i )
         Aig_ObjOrderInsert( p, pObj->Id );
 }

void Aig_ManOrderStop ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Deletes the order datastructure.]

Description []

SideEffects []

SeeAlso []

Definition at line 76 of file aigOrder.c.

 {
     assert( p->pOrderData );
     ABC_FREE( p->pOrderData );
     p->nOrderAlloc = 0;
     p->iPrev = p->iNext = 0;
 }

void Aig_ManPartDivide	(	Vec_Ptr_t *	vResult,
		Vec_Int_t *	vDomain,
		int	nPartSize,
		int	nOverSize
	)

Function*************************************************************

Synopsis [Divides a large partition into several ones.]

Description []

SideEffects []

SeeAlso []

Definition at line 513 of file aigPartReg.c.

 {
     Vec_Int_t * vPart;
     int i, Counter;
     assert( nPartSize && Vec_IntSize(vDomain) > nPartSize );
     if ( nOverSize >= nPartSize )
     {
         printf( "Overlap size (%d) is more or equal than the partition size (%d).\n", nOverSize, nPartSize );
         printf( "Adjusting it to be equal to half of the partition size.\n" );
         nOverSize = nPartSize/2;
     }
     assert( nOverSize < nPartSize );
     for ( Counter = 0; Counter < Vec_IntSize(vDomain); Counter -= nOverSize )
     {
         vPart = Vec_IntAlloc( nPartSize );
         for ( i = 0; i < nPartSize; i++, Counter++ )
             if ( Counter < Vec_IntSize(vDomain) )
                 Vec_IntPush( vPart, Vec_IntEntry(vDomain, Counter) );
         if ( Vec_IntSize(vPart) <= nOverSize )
             Vec_IntFree(vPart);
         else
             Vec_PtrPush( vResult, vPart );
     }
 }

Vec_Ptr_t* Aig_ManPartitionNaive	(	Aig_Man_t *	p,
		int	nPartSize
	)

Function*************************************************************

Synopsis [Perform the naive partitioning.]

Description []

SideEffects []

SeeAlso []

Definition at line 941 of file aigPart.c.

 {
     Vec_Ptr_t * vParts;
     Aig_Obj_t * pObj;
     int nParts, i;
     nParts = (Aig_ManCoNum(p) / nPartSize) + ((Aig_ManCoNum(p) % nPartSize) > 0);
     vParts = (Vec_Ptr_t *)Vec_VecStart( nParts );
     Aig_ManForEachCo( p, pObj, i )
         Vec_IntPush( (Vec_Int_t *)Vec_PtrEntry(vParts, i / nPartSize), i );
     return vParts;
 }

Vec_Ptr_t* Aig_ManPartitionSmart	(	Aig_Man_t *	p,
		int	nSuppSizeLimit,
		int	fVerbose,
		Vec_Ptr_t **	pvPartSupps
	)

Function*************************************************************

Synopsis [Perform the smart partitioning.]

Description []

SideEffects []

SeeAlso []

Definition at line 686 of file aigPart.c.

 {
     Vec_Ptr_t * vPartSuppsBit;
     Vec_Ptr_t * vSupports, * vPartsAll, * vPartsAll2, * vPartSuppsAll;//, * vPartPtr;
     Vec_Int_t * vOne, * vPart, * vPartSupp, * vTemp;
     int i, iPart, iOut;
     abctime clk;
 
     // compute the supports for all outputs
 clk = Abc_Clock();
     vSupports = Aig_ManSupports( p );
 if ( fVerbose )
 {
 ABC_PRT( "Supps", Abc_Clock() - clk );
 }
     // start char-based support representation
     vPartSuppsBit = Vec_PtrAlloc( 1000 );
 
     // create partitions
 clk = Abc_Clock();
     vPartsAll = Vec_PtrAlloc( 256 );
     vPartSuppsAll = Vec_PtrAlloc( 256 );
     Vec_PtrForEachEntry( Vec_Int_t *, vSupports, vOne, i )
     {
         // get the output number
         iOut = Vec_IntPop(vOne);
         // find closely matching part
         iPart = Aig_ManPartitionSmartFindPart( vPartSuppsAll, vPartsAll, vPartSuppsBit, nSuppSizeLimit, vOne );
         if ( iPart == -1 )
         {
             // create new partition
             vPart = Vec_IntAlloc( 32 );
             Vec_IntPush( vPart, iOut );
             // create new partition support
             vPartSupp = Vec_IntDup( vOne );
             // add this partition and its support
             Vec_PtrPush( vPartsAll, vPart );
             Vec_PtrPush( vPartSuppsAll, vPartSupp );
 
             Vec_PtrPush( vPartSuppsBit, Aig_ManSuppCharStart(vOne, Aig_ManCiNum(p)) );
         }
         else
         {
             // add output to this partition
             vPart = (Vec_Int_t *)Vec_PtrEntry( vPartsAll, iPart );
             Vec_IntPush( vPart, iOut );
             // merge supports
             vPartSupp = (Vec_Int_t *)Vec_PtrEntry( vPartSuppsAll, iPart );
             vPartSupp = Vec_IntTwoMerge( vTemp = vPartSupp, vOne );
             Vec_IntFree( vTemp );
             // reinsert new support
             Vec_PtrWriteEntry( vPartSuppsAll, iPart, vPartSupp );
 
             Aig_ManSuppCharAdd( (unsigned *)Vec_PtrEntry(vPartSuppsBit, iPart), vOne, Aig_ManCiNum(p) );
         }
     }
 
     // stop char-based support representation
     Vec_PtrForEachEntry( Vec_Int_t *, vPartSuppsBit, vTemp, i )
         ABC_FREE( vTemp );
     Vec_PtrFree( vPartSuppsBit );
 
 //printf( "\n" );
 if ( fVerbose )
 {
 ABC_PRT( "Parts", Abc_Clock() - clk );
 }
 
 clk = Abc_Clock();
     // reorder partitions in the decreasing order of support sizes
     // remember partition number in each partition support
     Vec_PtrForEachEntry( Vec_Int_t *, vPartSuppsAll, vOne, i )
         Vec_IntPush( vOne, i );
     // sort the supports in the decreasing order
     Vec_VecSort( (Vec_Vec_t *)vPartSuppsAll, 1 );
     // reproduce partitions
     vPartsAll2 = Vec_PtrAlloc( 256 );
     Vec_PtrForEachEntry( Vec_Int_t *, vPartSuppsAll, vOne, i )
         Vec_PtrPush( vPartsAll2, Vec_PtrEntry(vPartsAll, Vec_IntPop(vOne)) );
     Vec_PtrFree( vPartsAll );
     vPartsAll = vPartsAll2;
 
     // compact small partitions
 //    Aig_ManPartitionPrint( p, vPartsAll, vPartSuppsAll );
     Aig_ManPartitionCompact( vPartsAll, vPartSuppsAll, nSuppSizeLimit );
     if ( fVerbose )
 //    Aig_ManPartitionPrint( p, vPartsAll, vPartSuppsAll );
     printf( "Created %d partitions.\n", Vec_PtrSize(vPartsAll) );
 
 if ( fVerbose )
 {
 //ABC_PRT( "Comps", Abc_Clock() - clk );
 }
 
     // cleanup
     Vec_VecFree( (Vec_Vec_t *)vSupports );
     if ( pvPartSupps == NULL )
         Vec_VecFree( (Vec_Vec_t *)vPartSuppsAll );
     else
         *pvPartSupps = vPartSuppsAll;
 /*
     // converts from intergers to nodes
     Vec_PtrForEachEntry( Vec_Int_t *, vPartsAll, vPart, iPart )
     {
         vPartPtr = Vec_PtrAlloc( Vec_IntSize(vPart) );
         Vec_IntForEachEntry( vPart, iOut, i )
             Vec_PtrPush( vPartPtr, Aig_ManCo(p, iOut) );
         Vec_IntFree( vPart );
         Vec_PtrWriteEntry( vPartsAll, iPart, vPartPtr );
     }
 */
     return vPartsAll;
 }

Vec_Ptr_t* Aig_ManPartitionSmartRegisters	(	Aig_Man_t *	pAig,
		int	nSuppSizeLimit,
		int	fVerbose
	)

Function*************************************************************

Synopsis [Perform the smart partitioning.]

Description []

SideEffects []

SeeAlso []

Definition at line 811 of file aigPart.c.

 {
     Vec_Ptr_t * vPartSuppsBit;
     Vec_Ptr_t * vSupports, * vPartsAll, * vPartsAll2, * vPartSuppsAll;
     Vec_Int_t * vOne, * vPart, * vPartSupp, * vTemp;
     int i, iPart, iOut;
     abctime clk;
 
     // add output number to each
 clk = Abc_Clock();
     vSupports = Aig_ManSupportsRegisters( pAig );
     assert( Vec_PtrSize(vSupports) == Aig_ManRegNum(pAig) );
     Vec_PtrForEachEntry( Vec_Int_t *, vSupports, vOne, i )
         Vec_IntPush( vOne, i );
 if ( fVerbose )
 {
 ABC_PRT( "Supps", Abc_Clock() - clk );
 }
 
     // start char-based support representation
     vPartSuppsBit = Vec_PtrAlloc( 1000 );
 
     // create partitions
 clk = Abc_Clock();
     vPartsAll = Vec_PtrAlloc( 256 );
     vPartSuppsAll = Vec_PtrAlloc( 256 );
     Vec_PtrForEachEntry( Vec_Int_t *, vSupports, vOne, i )
     {
         // get the output number
         iOut = Vec_IntPop(vOne);
         // find closely matching part
         iPart = Aig_ManPartitionSmartFindPart( vPartSuppsAll, vPartsAll, vPartSuppsBit, nSuppSizeLimit, vOne );
         if ( iPart == -1 )
         {
             // create new partition
             vPart = Vec_IntAlloc( 32 );
             Vec_IntPush( vPart, iOut );
             // create new partition support
             vPartSupp = Vec_IntDup( vOne );
             // add this partition and its support
             Vec_PtrPush( vPartsAll, vPart );
             Vec_PtrPush( vPartSuppsAll, vPartSupp );
 
             Vec_PtrPush( vPartSuppsBit, Aig_ManSuppCharStart(vOne, Vec_PtrSize(vSupports)) );
         }
         else
         {
             // add output to this partition
             vPart = (Vec_Int_t *)Vec_PtrEntry( vPartsAll, iPart );
             Vec_IntPush( vPart, iOut );
             // merge supports
             vPartSupp = (Vec_Int_t *)Vec_PtrEntry( vPartSuppsAll, iPart );
             vPartSupp = Vec_IntTwoMerge( vTemp = vPartSupp, vOne );
             Vec_IntFree( vTemp );
             // reinsert new support
             Vec_PtrWriteEntry( vPartSuppsAll, iPart, vPartSupp );
 
             Aig_ManSuppCharAdd( (unsigned *)Vec_PtrEntry(vPartSuppsBit, iPart), vOne, Vec_PtrSize(vSupports) );
         }
     }
 
     // stop char-based support representation
     Vec_PtrForEachEntry( Vec_Int_t *, vPartSuppsBit, vTemp, i )
         ABC_FREE( vTemp );
     Vec_PtrFree( vPartSuppsBit );
 
 //printf( "\n" );
 if ( fVerbose )
 {
 ABC_PRT( "Parts", Abc_Clock() - clk );
 }
 
 clk = Abc_Clock();
     // reorder partitions in the decreasing order of support sizes
     // remember partition number in each partition support
     Vec_PtrForEachEntry( Vec_Int_t *, vPartSuppsAll, vOne, i )
         Vec_IntPush( vOne, i );
     // sort the supports in the decreasing order
     Vec_VecSort( (Vec_Vec_t *)vPartSuppsAll, 1 );
     // reproduce partitions
     vPartsAll2 = Vec_PtrAlloc( 256 );
     Vec_PtrForEachEntry( Vec_Int_t *, vPartSuppsAll, vOne, i )
         Vec_PtrPush( vPartsAll2, Vec_PtrEntry(vPartsAll, Vec_IntPop(vOne)) );
     Vec_PtrFree( vPartsAll );
     vPartsAll = vPartsAll2;
 
     // compact small partitions
 //    Aig_ManPartitionPrint( p, vPartsAll, vPartSuppsAll );
     Aig_ManPartitionCompact( vPartsAll, vPartSuppsAll, nSuppSizeLimit );
     if ( fVerbose )
 //    Aig_ManPartitionPrint( p, vPartsAll, vPartSuppsAll );
     printf( "Created %d partitions.\n", Vec_PtrSize(vPartsAll) );
 
 if ( fVerbose )
 {
 //ABC_PRT( "Comps", Abc_Clock() - clk );
 }
 
     // cleanup
     Vec_VecFree( (Vec_Vec_t *)vSupports );
 //    if ( pvPartSupps == NULL )
         Vec_VecFree( (Vec_Vec_t *)vPartSuppsAll );
 //    else
 //        *pvPartSupps = vPartSuppsAll;
 
 /*
     // converts from intergers to nodes
     Vec_PtrForEachEntry( Vec_Int_t *, vPartsAll, vPart, iPart )
     {
         vPartPtr = Vec_PtrAlloc( Vec_IntSize(vPart) );
         Vec_IntForEachEntry( vPart, iOut, i )
             Vec_PtrPush( vPartPtr, Aig_ManCo(p, iOut) );
         Vec_IntFree( vPart );
         Vec_PtrWriteEntry( vPartsAll, iPart, vPartPtr );
     }
 */
     return vPartsAll;
 }

void Aig_ManPrintStats ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Stops the AIG manager.]

Description []

SideEffects []

SeeAlso []

Definition at line 379 of file aigMan.c.

 {
     int nChoices = Aig_ManChoiceNum(p);
     printf( "%-15s : ",      p->pName );
     printf( "pi = %5d  ",    Aig_ManCiNum(p)-Aig_ManRegNum(p) );
     printf( "po = %5d  ",    Aig_ManCoNum(p)-Aig_ManRegNum(p) );
     if ( Aig_ManRegNum(p) )
     printf( "lat = %5d  ", Aig_ManRegNum(p) );
     printf( "and = %7d  ",   Aig_ManAndNum(p) );
 //    printf( "Eq = %7d  ",     Aig_ManHaigCounter(p) );
     if ( Aig_ManExorNum(p) )
     printf( "xor = %5d  ",    Aig_ManExorNum(p) );
     if ( nChoices )
     printf( "ch = %5d  ",  nChoices );
     if ( Aig_ManBufNum(p) )
     printf( "buf = %5d  ",    Aig_ManBufNum(p) );
 //    printf( "Cre = %6d  ",  p->nCreated );
 //    printf( "Del = %6d  ",  p->nDeleted );
 //    printf( "Lev = %3d  ",  Aig_ManLevelNum(p) );
 //    printf( "Max = %7d  ",  Aig_ManObjNumMax(p) );
     printf( "lev = %3d",  Aig_ManLevels(p) );
     printf( "\n" );
     fflush( stdout );
 }

void Aig_ManPrintVerbose	(	Aig_Man_t *	p,
		int	fHaig
	)

Function*************************************************************

Synopsis [Prints node in HAIG.]

Description []

SideEffects []

SeeAlso []

Definition at line 685 of file aigUtil.c.

 {
     Vec_Ptr_t * vNodes;
     Aig_Obj_t * pObj;
     int i;
     printf( "PIs: " );
     Aig_ManForEachCi( p, pObj, i )
         printf( " %p", pObj );
     printf( "\n" );
     vNodes = Aig_ManDfs( p, 0 );
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
         Aig_ObjPrintVerbose( pObj, fHaig ), printf( "\n" );
     printf( "\n" );
     Vec_PtrFree( vNodes );
 }

unsigned Aig_ManRandom ( int fReset )

Function*************************************************************

Synopsis [Creates a sequence of random numbers.]

Description []

SideEffects []

SeeAlso [http://www.codeproject.com/KB/recipes/SimpleRNG.aspx]

Definition at line 1157 of file aigUtil.c.

 {
     static unsigned int m_z = NUMBER1;
     static unsigned int m_w = NUMBER2;
     if ( fReset )
     {
         m_z = NUMBER1;
         m_w = NUMBER2;
     }
     m_z = 36969 * (m_z & 65535) + (m_z >> 16);
     m_w = 18000 * (m_w & 65535) + (m_w >> 16);
     return (m_z << 16) + m_w;
 }

word Aig_ManRandom64 ( int fReset )

Function*************************************************************

Synopsis [Creates a sequence of random numbers.]

Description []

SideEffects []

SeeAlso []

Definition at line 1182 of file aigUtil.c.

 {
     word Res = (word)Aig_ManRandom(fReset);
     return Res | ((word)Aig_ManRandom(0) << 32);
 }

void Aig_ManRandomInfo	(	Vec_Ptr_t *	vInfo,
		int	iInputStart,
		int	iWordStart,
		int	iWordStop
	)

Function*************************************************************

Synopsis [Creates random info for the primary inputs.]

Description []

SideEffects []

SeeAlso []

Definition at line 1200 of file aigUtil.c.

 {
     unsigned * pInfo;
     int i, w;
     Vec_PtrForEachEntryStart( unsigned *, vInfo, pInfo, i, iInputStart )
         for ( w = iWordStart; w < iWordStop; w++ )
             pInfo[w] = Aig_ManRandom(0);
 }

static void Aig_ManRecycleMemory	(	Aig_Man_t *	p,
		Aig_Obj_t *	pEntry
	)

inlinestatic

Definition at line 378 of file aig.h.

 {
     extern void Aig_MmFixedEntryRecycle( Aig_MmFixed_t * p, char * pEntry );
     assert( pEntry->nRefs == 0 );
     pEntry->Type = AIG_OBJ_NONE; // distinquishes a dead node from a live node
     Aig_MmFixedEntryRecycle( p->pMemObjs, (char *)pEntry );
     p->nDeleted++;
 }

Aig_Man_t* Aig_ManReduceLaches	(	Aig_Man_t *	p,
		int	fVerbose
	)

Function*************************************************************

Synopsis [Reduces the latches.]

Description []

SideEffects []

SeeAlso []

Definition at line 455 of file aigScl.c.

 {
     Aig_Man_t * pTemp;
     Vec_Ptr_t * vMap;
     int nSaved, nCur;
     if ( fVerbose )
         printf( "Performing combinational register sweep:\n" );
     for ( nSaved = 0; (nCur = Aig_ManReduceLachesCount(p)); nSaved += nCur )
     {
 //        printf( "Reducible = %d\n", nCur );
         vMap = Aig_ManReduceLachesOnce( p );
         p = Aig_ManRemap( pTemp = p, vMap );
         Vec_PtrFree( vMap );
         Aig_ManSeqCleanup( p );
         if ( fVerbose )
             Aig_ManReportImprovement( pTemp, p );
         Aig_ManStop( pTemp );
         if ( p->nRegs == 0 )
             break;
     }
     return p;
 }

Aig_Man_t* Aig_ManRegCreatePart	(	Aig_Man_t *	pAig,
		Vec_Int_t *	vPart,
		int *	pnCountPis,
		int *	pnCountRegs,
		int **	ppMapBack
	)

Function*************************************************************

Synopsis [Computes partitioning of registers.]

Description []

SideEffects []

SeeAlso []

Definition at line 308 of file aigPartReg.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj, * pObjNew;
     Vec_Ptr_t * vNodes;
     Vec_Ptr_t * vRoots;
     int nOffset, iOut, i;
     int nCountPis, nCountRegs;
     int * pMapBack;
     // collect roots
     vRoots = Vec_PtrAlloc( Vec_IntSize(vPart) );
     nOffset = Aig_ManCoNum(pAig)-Aig_ManRegNum(pAig);
     Vec_IntForEachEntry( vPart, iOut, i )
     {
         pObj = Aig_ManCo(pAig, nOffset+iOut);
         Vec_PtrPush( vRoots, Aig_ObjFanin0(pObj) );
     }
     // collect/mark nodes/PIs in the DFS order
     vNodes = Aig_ManDfsNodes( pAig, (Aig_Obj_t **)Vec_PtrArray(vRoots), Vec_PtrSize(vRoots) );
     Vec_PtrFree( vRoots );
     // unmark register outputs
     nOffset = Aig_ManCiNum(pAig)-Aig_ManRegNum(pAig);
     Vec_IntForEachEntry( vPart, iOut, i )
     {
         pObj = Aig_ManCi(pAig, nOffset+iOut);
         Aig_ObjSetTravIdPrevious( pAig, pObj );
     }
     // count pure PIs
     nCountPis = nCountRegs = 0;
     Aig_ManForEachPiSeq( pAig, pObj, i )
         nCountPis += Aig_ObjIsTravIdCurrent(pAig, pObj);
     // count outputs of other registers
     Aig_ManForEachLoSeq( pAig, pObj, i )
         nCountRegs += Aig_ObjIsTravIdCurrent(pAig, pObj); 
     if ( pnCountPis )
         *pnCountPis = nCountPis;
     if ( pnCountRegs )
         *pnCountRegs = nCountRegs;
     // create the new manager
     pNew = Aig_ManStart( Vec_PtrSize(vNodes) );
     Aig_ManConst1(pAig)->pData = Aig_ManConst1(pNew);
     // create the PIs
     Aig_ManForEachCi( pAig, pObj, i )
         if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
             pObj->pData = Aig_ObjCreateCi(pNew);
     // add variables for the register outputs
     // create fake POs to hold the register outputs
     nOffset = Aig_ManCiNum(pAig)-Aig_ManRegNum(pAig);
     Vec_IntForEachEntry( vPart, iOut, i )
     {
         pObj = Aig_ManCi(pAig, nOffset+iOut);
         pObj->pData = Aig_ObjCreateCi(pNew);
         Aig_ObjCreateCo( pNew, (Aig_Obj_t *)pObj->pData );
         Aig_ObjSetTravIdCurrent( pAig, pObj ); // added
     }
     // create the nodes
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
         if ( Aig_ObjIsNode(pObj) )
             pObj->pData = Aig_And(pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
     // add real POs for the registers
     nOffset = Aig_ManCoNum(pAig)-Aig_ManRegNum(pAig);
     Vec_IntForEachEntry( vPart, iOut, i )
     {
         pObj = Aig_ManCo( pAig, nOffset+iOut );
         Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
     }
     pNew->nRegs = Vec_IntSize(vPart);
     // create map
     if ( ppMapBack )
     {
         pMapBack = ABC_ALLOC( int, Aig_ManObjNumMax(pNew) );
         memset( pMapBack, 0xff, sizeof(int) * Aig_ManObjNumMax(pNew) );
         // map constant nodes
         pMapBack[0] = 0;
         // logic cones of register outputs
         Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
         {
             pObjNew = Aig_Regular((Aig_Obj_t *)pObj->pData);
             pMapBack[pObjNew->Id] = pObj->Id;
         }
         // map register outputs
         nOffset = Aig_ManCiNum(pAig)-Aig_ManRegNum(pAig);
         Vec_IntForEachEntry( vPart, iOut, i )
         {
             pObj = Aig_ManCi(pAig, nOffset+iOut);
             pObjNew = (Aig_Obj_t *)pObj->pData;
             pMapBack[pObjNew->Id] = pObj->Id;
         }
         *ppMapBack = pMapBack;
     }
     Vec_PtrFree( vNodes );
     return pNew;
 }

static int Aig_ManRegNum ( Aig_Man_t * p )

inlinestatic

Definition at line 260 of file aig.h.

260 { return p->nRegs; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

Vec_Ptr_t* Aig_ManRegPartitionSimple	(	Aig_Man_t *	pAig,
		int	nPartSize,
		int	nOverSize
	)

Function*************************************************************

Synopsis [Computes partitioning of registers.]

Description []

SideEffects []

SeeAlso []

Definition at line 474 of file aigPartReg.c.

 {
     Vec_Ptr_t * vResult;
     Vec_Int_t * vPart;
     int i, Counter;
     if ( nOverSize >= nPartSize )
     {
         printf( "Overlap size (%d) is more or equal than the partition size (%d).\n", nOverSize, nPartSize );
         printf( "Adjusting it to be equal to half of the partition size.\n" );
         nOverSize = nPartSize/2;
     }
     assert( nOverSize < nPartSize );
     vResult = Vec_PtrAlloc( 100 );
     for ( Counter = 0; Counter < Aig_ManRegNum(pAig); Counter -= nOverSize )
     {
         vPart = Vec_IntAlloc( nPartSize );
         for ( i = 0; i < nPartSize; i++, Counter++ )
             if ( Counter < Aig_ManRegNum(pAig) )
                 Vec_IntPush( vPart, Counter );
         if ( Vec_IntSize(vPart) <= nOverSize )
             Vec_IntFree(vPart);
         else
             Vec_PtrPush( vResult, vPart );
     }
     return vResult;
 }

Vec_Ptr_t* Aig_ManRegPartitionSmart	(	Aig_Man_t *	pAig,
		int	nPartSize
	)

Function*************************************************************

Synopsis [Computes partitioning of registers.]

Description []

SideEffects []

SeeAlso []

Definition at line 413 of file aigPartReg.c.

 {
     extern void Ioa_WriteAiger( Aig_Man_t * pMan, char * pFileName, int fWriteSymbols, int fCompact );
 
     Aig_ManPre_t * p;
     Vec_Ptr_t * vResult;
     int iSeed, iNext, i, k;
     // create the manager
     p = Aig_ManRegManStart( pAig, nPartSize );
     // add partitions as long as registers remain
     for ( i = 0; (iSeed = Aig_ManRegFindSeed(p)) >= 0; i++ )
     {
 //printf( "Seed variable = %d.\n", iSeed );
         // clean the current partition information
         Vec_IntClear( p->vRegs );
         Vec_IntClear( p->vUniques );
         Vec_IntClear( p->vFreeVars );
         Vec_FltClear( p->vPartCost );
         memset( p->pfPartVars, 0, sizeof(char) * Aig_ManRegNum(p->pAig) );
         // add the register and its partition support
         Aig_ManRegPartitionAdd( p, iSeed );
         // select the best var to add
         for ( k = 0; Vec_IntSize(p->vRegs) < p->nRegsMax; k++ )
         {
             // get the next best variable
             iNext = Aig_ManRegFindBestVar( p );
             if ( iNext == -1 )
                 break;
             // add the register to the support of the partition
             Aig_ManRegPartitionAdd( p, iNext );
             // report the result
 //printf( "Part %3d  Reg %3d : Free = %4d. Total = %4d. Ratio = %6.2f. Unique = %4d.\n", i, k, 
 //                Vec_IntSize(p->vFreeVars), Vec_IntSize(p->vRegs), 
 //                1.0*Vec_IntSize(p->vFreeVars)/Vec_IntSize(p->vRegs), Vec_IntSize(p->vUniques) );
             // quit if there are not free variables
             if ( Vec_IntSize(p->vFreeVars) == 0 )
                 break;
         }
         // add this partition to the set
         Vec_PtrPush( p->vParts, Vec_IntDup(p->vRegs) );        
 printf( "Part %3d  SUMMARY:  Free = %4d. Total = %4d. Ratio = %6.2f. Unique = %4d.\n", i,
                 Vec_IntSize(p->vFreeVars), Vec_IntSize(p->vRegs), 
                 1.0*Vec_IntSize(p->vFreeVars)/Vec_IntSize(p->vRegs), Vec_IntSize(p->vUniques) );
 //printf( "\n" ); 
     }
     vResult = p->vParts; p->vParts = NULL;
     Aig_ManRegManStop( p );
     return vResult;
 }

Vec_Ptr_t* Aig_ManRegProjectOnehots	(	Aig_Man_t *	pAig,
		Aig_Man_t *	pPart,
		Vec_Ptr_t *	vOnehots,
		int	fVerbose
	)

Function*************************************************************

Synopsis [Creates projection of 1-hot registers onto the given partition.]

Description [Assumes that the relevant register outputs are labeled with the current traversal ID.]

SideEffects []

SeeAlso []

Definition at line 248 of file aigPartReg.c.

 {
     Vec_Ptr_t * vOnehotsPart = NULL;
     Vec_Int_t * vGroup, * vGroupNew;
     Aig_Obj_t * pObj, * pObjNew;
     int nOffset, iReg, i, k;
     // set the PI numbers
     Aig_ManForEachCi( pPart, pObj, i )
         pObj->iData = i;
     // go through each group and check if registers are involved in this one
     nOffset = Aig_ManCiNum(pAig)-Aig_ManRegNum(pAig);
     Vec_PtrForEachEntry( Vec_Int_t *, vOnehots, vGroup, i )
     {
         vGroupNew = NULL;
         Vec_IntForEachEntry( vGroup, iReg, k )
         {
             pObj = Aig_ManCi( pAig, nOffset+iReg );
             if ( !Aig_ObjIsTravIdCurrent(pAig, pObj) )
                 continue;
             if ( vGroupNew == NULL )
                 vGroupNew = Vec_IntAlloc( Vec_IntSize(vGroup) );
             pObjNew = (Aig_Obj_t *)pObj->pData;
             Vec_IntPush( vGroupNew, pObjNew->iData );
         }
         if ( vGroupNew == NULL )
             continue;
         if ( Vec_IntSize(vGroupNew) > 1 )
         {
             if ( vOnehotsPart == NULL )
                 vOnehotsPart = Vec_PtrAlloc( 100 );
             Vec_PtrPush( vOnehotsPart, vGroupNew );
         }
         else
             Vec_IntFree( vGroupNew );
     }
     // clear the PI numbers
     Aig_ManForEachCi( pPart, pObj, i )
         pObj->iData = 0;
     // print out
     if ( vOnehotsPart && fVerbose )
     {
         printf( "Partition contains %d groups of 1-hot registers: { ", Vec_PtrSize(vOnehotsPart) );
         Vec_PtrForEachEntry( Vec_Int_t *, vOnehotsPart, vGroup, k )
             printf( "%d ", Vec_IntSize(vGroup) );
         printf( "}\n" );
     }
     return vOnehotsPart;
 }

Aig_Man_t* Aig_ManRehash ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Iteratively rehashes the AIG.]

Description [The input AIG is assumed to have representatives assigned.]

SideEffects []

SeeAlso []

Definition at line 454 of file aigRepr.c.

 {
     Aig_Man_t * pTemp;
     int i, nFanouts;
     assert( p->pReprs != NULL );
     for ( i = 0; (nFanouts = Aig_ManRemapRepr( p )); i++ )
     {
 //        printf( "Iter = %3d. Fanouts = %6d. Nodes = %7d.\n", i+1, nFanouts, Aig_ManNodeNum(p) );
         p = Aig_ManDupRepr( pTemp = p, 1 );
         Aig_ManReprStart( p, Aig_ManObjNumMax(p) );
         Aig_ManTransferRepr( p, pTemp );
         Aig_ManStop( pTemp );
     }
     return p;
 }

void* Aig_ManReleaseData ( Aig_Man_t * p )

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 473 of file aigMan.c.

 { 
     void * pD = p->pData; 
     p->pData = NULL; 
     return pD;
 }

Aig_Man_t* Aig_ManRemap	(	Aig_Man_t *	p,
		Vec_Ptr_t *	vMap
	)

DECLARATIONS ///.

CFile****************************************************************

FileName [aigScl.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [Sequential cleanup.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id:: aigScl.c,v 1.00 2007/04/28 00:00:00 alanmi Exp

]FUNCTION DEFINITIONS /// Function*************************************************************

Synopsis [Remaps the manager.]

Description [Map in the array specifies for each CI node the node that should be used after remapping.]

SideEffects []

SeeAlso []

Definition at line 46 of file aigScl.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj, * pObjMapped;
     int i, nTruePis;
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nAsserts = p->nAsserts;
     pNew->nConstrs = p->nConstrs;
     pNew->nBarBufs = p->nBarBufs;
     assert( p->vFlopNums == NULL || Vec_IntSize(p->vFlopNums) == p->nRegs );
     if ( p->vFlopNums )
         pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
     if ( p->vFlopReprs )
         pNew->vFlopReprs = Vec_IntDup( p->vFlopReprs );
     // create the PIs
     Aig_ManCleanData( p );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
     Aig_ManForEachCi( p, pObj, i )
         pObj->pData = Aig_ObjCreateCi(pNew);
     // implement the mapping
     nTruePis = Aig_ManCiNum(p)-Aig_ManRegNum(p);
     if ( p->vFlopReprs )
     {
         Aig_ManForEachLoSeq( p, pObj, i )
             pObj->pNext = (Aig_Obj_t *)(long)Vec_IntEntry( p->vFlopNums, i-nTruePis );
     }
     Aig_ManForEachCi( p, pObj, i )
     {
         pObjMapped = (Aig_Obj_t *)Vec_PtrEntry( vMap, i );
         pObj->pData = Aig_NotCond( (Aig_Obj_t *)Aig_Regular(pObjMapped)->pData, Aig_IsComplement(pObjMapped) );
         if ( pNew->vFlopReprs && i >= nTruePis && pObj != pObjMapped )
         {
             Vec_IntPush( pNew->vFlopReprs, Aig_ObjCioId(pObj) );
             if ( Aig_ObjIsConst1( Aig_Regular(pObjMapped) ) )
                 Vec_IntPush( pNew->vFlopReprs, -1 );
             else
             {
                 assert( !Aig_IsComplement(pObjMapped) );
                 assert( Aig_ObjIsCi(pObjMapped) );
                 assert( Aig_ObjCioId(pObj) != Aig_ObjCioId(pObjMapped) );
                 Vec_IntPush( pNew->vFlopReprs, Aig_ObjCioId(pObjMapped) );
             }
         }
     }
     if ( p->vFlopReprs )
     {
         Aig_ManForEachLoSeq( p, pObj, i )
             pObj->pNext = NULL;
     }
     // duplicate internal nodes
     Aig_ManForEachObj( p, pObj, i )
         if ( Aig_ObjIsBuf(pObj) )
             pObj->pData = Aig_ObjChild0Copy(pObj);
         else if ( Aig_ObjIsNode(pObj) )
             pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
     // add the POs
     Aig_ManForEachCo( p, pObj, i )
         Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
     assert( Aig_ManNodeNum(p) >= Aig_ManNodeNum(pNew) );
     Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
     // check the resulting network
     if ( !Aig_ManCheck(pNew) )
         printf( "Aig_ManRemap(): The check has failed.\n" );
     return pNew;
 }

void Aig_ManReportImprovement	(	Aig_Man_t *	p,
		Aig_Man_t *	pNew
	)

Function*************************************************************

Synopsis [Reports the reduction of the AIG.]

Description []

SideEffects []

SeeAlso []

Definition at line 415 of file aigMan.c.

 {
     printf( "REG: Beg = %5d. End = %5d. (R =%5.1f %%)  ",
         Aig_ManRegNum(p), Aig_ManRegNum(pNew), 
         Aig_ManRegNum(p)? 100.0*(Aig_ManRegNum(p)-Aig_ManRegNum(pNew))/Aig_ManRegNum(p) : 0.0 );
     printf( "AND: Beg = %6d. End = %6d. (R =%5.1f %%)",
         Aig_ManNodeNum(p), Aig_ManNodeNum(pNew), 
         Aig_ManNodeNum(p)? 100.0*(Aig_ManNodeNum(p)-Aig_ManNodeNum(pNew))/Aig_ManNodeNum(p) : 0.0 );
     printf( "\n" );
 }

void Aig_ManReprStart	(	Aig_Man_t *	p,
		int	nIdMax
	)

DECLARATIONS ///.

CFile****************************************************************

FileName [aigRepr.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [Handing node representatives.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id:: aigRepr.c,v 1.00 2007/04/28 00:00:00 alanmi Exp

]FUNCTION DEFINITIONS /// Function*************************************************************

Synopsis [Starts the array of representatives.]

Description []

SideEffects []

SeeAlso []

Definition at line 45 of file aigRepr.c.

 {
     assert( Aig_ManBufNum(p) == 0 );
     assert( p->pReprs == NULL );
     p->nReprsAlloc = nIdMax;
     p->pReprs = ABC_ALLOC( Aig_Obj_t *, p->nReprsAlloc );
     memset( p->pReprs, 0, sizeof(Aig_Obj_t *) * p->nReprsAlloc );
 }

void Aig_ManReprStop ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Stop the array of representatives.]

Description []

SideEffects []

SeeAlso []

Definition at line 65 of file aigRepr.c.

 {
     assert( p->pReprs != NULL );
     ABC_FREE( p->pReprs );
     p->nReprsAlloc = 0;    
 }

void Aig_ManResetRefs ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Reset reference counters.]

Description []

SideEffects []

SeeAlso []

Definition at line 122 of file aigUtil.c.

 {
     Aig_Obj_t * pObj;
     int i;
     Aig_ManForEachObj( p, pObj, i )
         pObj->nRefs = 0;
     Aig_ManForEachObj( p, pObj, i )
     {
         if ( Aig_ObjFanin0(pObj) )
             Aig_ObjFanin0(pObj)->nRefs++;
         if ( Aig_ObjFanin1(pObj) )
             Aig_ObjFanin1(pObj)->nRefs++;
     }
 }

Aig_Man_t* Aig_ManRetimeFrontier	(	Aig_Man_t *	p,
		int	nStepsMax
	)

Function*************************************************************

Synopsis [Performs forward retiming.]

Description []

SideEffects []

SeeAlso []

Definition at line 125 of file aigRetF.c.

 {
     Aig_Obj_t * pObj, * pObjNew, * pObjLo, * pObjLo0, * pObjLo1, * pObjLi, * pObjLi0, * pObjLi1;//, * pObjLi0_, * pObjLi1_, * pObjLi0__, * pObjLi1__;
     int i, Counter, fCompl, fChange;
     assert( Aig_ManRegNum(p) > 0 );
     // remove structural hashing table
     Aig_TableClear( p );
     // mark the retimable nodes
     Aig_ManRetimeMark( p );
     // mark the register outputs
     Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
     {
         pObjLo->fMarkA = 1;
         pObjLo->pNext = pObjLi;
         pObjLi->pNext = pObjLo;
     }
     // go through the nodes and find retimable ones
     Counter = 0;
     fChange = 1;
     while ( fChange )
     {
         fChange = 0;
         Aig_ManForEachNode( p, pObj, i )
         {
             if ( !pObj->fMarkB )
                 continue;
             if ( Aig_ObjIsBuf(pObj) )
                 continue;
             // get the real inputs of the node (skipping the buffers)
             pObjLo0 = Aig_ObjReal_rec( Aig_ObjChild0(pObj) );
             pObjLo1 = Aig_ObjReal_rec( Aig_ObjChild1(pObj) );
             if ( !Aig_Regular(pObjLo0)->fMarkA || !Aig_Regular(pObjLo1)->fMarkA )
                 continue;
             // remember complemented attribute
             fCompl = Aig_IsComplement(pObjLo0) & Aig_IsComplement(pObjLo1);
             // get the register inputs
 //            pObjLi0_ = Aig_Regular(pObjLo0)->pNext;
 //            pObjLi1_ = Aig_Regular(pObjLo1)->pNext;
 //            pObjLi0__ = Aig_ObjChild0(Aig_Regular(pObjLo0)->pNext);
 //            pObjLi1__ = Aig_ObjChild0(Aig_Regular(pObjLo1)->pNext);
             pObjLi0 = Aig_NotCond( Aig_ObjChild0(Aig_Regular(pObjLo0)->pNext), Aig_IsComplement(pObjLo0) );
             pObjLi1 = Aig_NotCond( Aig_ObjChild0(Aig_Regular(pObjLo1)->pNext), Aig_IsComplement(pObjLo1) );
             // create new node
             pObjNew = Aig_And( p, pObjLi0, pObjLi1 );
             pObjNew->fMarkB = 1;
             // create new register
             pObjLo = Aig_ObjCreateCi(p);
             pObjLo->fMarkA = 1;
             pObjLi = Aig_ObjCreateCo( p, Aig_NotCond(pObjNew, fCompl) );
             p->nRegs++;
             pObjLo->pNext = pObjLi;
             pObjLi->pNext = pObjLo;
             // add the buffer
             Aig_ObjDisconnect( p, pObj );
             pObj->Type = AIG_OBJ_BUF;
             p->nObjs[AIG_OBJ_AND]--;
             p->nObjs[AIG_OBJ_BUF]++;
             Aig_ObjConnect( p, pObj, Aig_NotCond(pObjLo, fCompl), NULL );
             // create HAIG if defined
             // mark the change
             fChange = 1;
             // check the limit
             if ( ++Counter >= nStepsMax )
             {
                 fChange = 0;
                 break;
             }
         }
     }
     // clean the markings
     Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
     {
         pObjLo->fMarkA = 0;
         pObjLo->pNext = pObjLi->pNext = NULL;
     }
     Aig_ManForEachObj( p, pObj, i )
         pObj->fMarkB = 0;
     // remove useless registers
     Aig_ManSeqCleanup( p );
     // rehash the nodes
     return Aig_ManDupOrdered( p ); 
 }

Aig_Man_t* Aig_ManScl	(	Aig_Man_t *	pAig,
		int	fLatchConst,
		int	fLatchEqual,
		int	fUseMvSweep,
		int	nFramesSymb,
		int	nFramesSatur,
		int	fVerbose,
		int	fVeryVerbose
	)

Function*************************************************************

Synopsis [Gives the current ABC network to AIG manager for processing.]

Description []

SideEffects []

SeeAlso []

Definition at line 650 of file aigScl.c.

 {
     extern void Saig_ManReportUselessRegisters( Aig_Man_t * pAig );
     extern int Saig_ManReportComplements( Aig_Man_t * p );
 
     Aig_Man_t * pAigInit, * pAigNew;
     Aig_Obj_t * pFlop1, * pFlop2;
     int i, Entry1, Entry2, nTruePis;//, nRegs;
 
     if ( pAig->vClockDoms && Vec_VecSize(pAig->vClockDoms) > 0 )
         return Aig_ManSclPart( pAig, fLatchConst, fLatchEqual, fVerbose);
 
     // store the original AIG
     assert( pAig->vFlopNums == NULL );
     pAigInit = pAig;
     pAig = Aig_ManDupSimple( pAig );
     // create storage for latch numbers
     pAig->vFlopNums = Vec_IntStartNatural( pAig->nRegs );
     pAig->vFlopReprs = Vec_IntAlloc( 100 );
     Aig_ManSeqCleanup( pAig );
     if ( fLatchConst && pAig->nRegs )
         pAig = Aig_ManConstReduce( pAig, fUseMvSweep, nFramesSymb, nFramesSatur, fVerbose, fVeryVerbose );
     if ( fLatchEqual && pAig->nRegs )
         pAig = Aig_ManReduceLaches( pAig, fVerbose );
     // translate pairs into reprs
     nTruePis = Aig_ManCiNum(pAigInit)-Aig_ManRegNum(pAigInit);
     Aig_ManReprStart( pAigInit, Aig_ManObjNumMax(pAigInit) );
     Vec_IntForEachEntry( pAig->vFlopReprs, Entry1, i )
     {
         Entry2 = Vec_IntEntry( pAig->vFlopReprs, ++i ); 
         pFlop1 = Aig_ManCi( pAigInit, nTruePis + Entry1 );
         pFlop2 = (Entry2 == -1)? Aig_ManConst1(pAigInit) : Aig_ManCi( pAigInit, nTruePis + Entry2 );
         assert( pFlop1 != pFlop2 );
         if ( pFlop1->Id > pFlop2->Id )
             pAigInit->pReprs[pFlop1->Id] = pFlop2;
         else
             pAigInit->pReprs[pFlop2->Id] = pFlop1;
     }
     Aig_ManStop( pAig );
 //    Aig_ManSeqCleanup( pAigInit );
     pAigNew = Aig_ManDupRepr( pAigInit, 0 );
     Aig_ManSeqCleanup( pAigNew );
 
 //    Saig_ManReportUselessRegisters( pAigNew );
     if ( Aig_ManRegNum(pAigNew) == 0 )
         return pAigNew;
 //    nRegs = Saig_ManReportComplements( pAigNew );
 //    if ( nRegs ) 
 //    printf( "The number of complemented registers = %d.\n", nRegs );
     return pAigNew;
 }

int Aig_ManSeqCleanup ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Returns the number of dangling nodes removed.]

Description []

SideEffects []

SeeAlso []

Definition at line 158 of file aigScl.c.

 {
     Vec_Ptr_t * vNodes, * vCis, * vCos;
     Aig_Obj_t * pObj, * pObjLi, * pObjLo;
     int i, nTruePis, nTruePos;
 //    assert( Aig_ManBufNum(p) == 0 );
 
     // mark the PIs
     Aig_ManIncrementTravId( p );
     Aig_ObjSetTravIdCurrent( p, Aig_ManConst1(p) );
     Aig_ManForEachPiSeq( p, pObj, i )
         Aig_ObjSetTravIdCurrent( p, pObj );
 
     // prepare to collect nodes reachable from POs
     vNodes = Vec_PtrAlloc( 100 );
     Aig_ManForEachPoSeq( p, pObj, i )
         Vec_PtrPush( vNodes, pObj );
 
     // remember latch inputs in latch outputs
     Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
         pObjLo->pNext = pObjLi;
     // mark the nodes reachable from these nodes
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
         Aig_ManSeqCleanup_rec( p, pObj, vNodes );
     assert( Vec_PtrSize(vNodes) <= Aig_ManCoNum(p) );
     // clean latch output pointers
     Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
         pObjLo->pNext = NULL;
 
     // if some latches are removed, update PIs/POs
     if ( Vec_PtrSize(vNodes) < Aig_ManCoNum(p) )
     {
         if ( p->vFlopNums )
         {
             int nTruePos = Aig_ManCoNum(p)-Aig_ManRegNum(p);
             int iNum, k = 0;
             Aig_ManForEachCo( p, pObj, i )
                 if ( i >= nTruePos && Aig_ObjIsTravIdCurrent(p, pObj) )
                 {
                     iNum = Vec_IntEntry( p->vFlopNums, i - nTruePos );
                     Vec_IntWriteEntry( p->vFlopNums, k++, iNum );
                 }
             assert( k == Vec_PtrSize(vNodes) - nTruePos );
             Vec_IntShrink( p->vFlopNums, k );
         }
         // collect new CIs/COs
         vCis = Vec_PtrAlloc( Aig_ManCiNum(p) );
         Aig_ManForEachCi( p, pObj, i )
             if ( Aig_ObjIsTravIdCurrent(p, pObj) )
                 Vec_PtrPush( vCis, pObj );
             else
             {
                 Vec_PtrWriteEntry( p->vObjs, pObj->Id, NULL );
 //                Aig_ManRecycleMemory( p, pObj );
             }
         vCos = Vec_PtrAlloc( Aig_ManCoNum(p) );
         Aig_ManForEachCo( p, pObj, i )
             if ( Aig_ObjIsTravIdCurrent(p, pObj) )
                 Vec_PtrPush( vCos, pObj );
             else
             {
                 Aig_ObjDisconnect( p, pObj );
                 Vec_PtrWriteEntry( p->vObjs, pObj->Id, NULL );
 //                Aig_ManRecycleMemory( p, pObj );
             }
         // remember the number of true PIs/POs
         nTruePis = Aig_ManCiNum(p) - Aig_ManRegNum(p);
         nTruePos = Aig_ManCoNum(p) - Aig_ManRegNum(p);
         // set the new number of registers
         p->nRegs -= Aig_ManCoNum(p) - Vec_PtrSize(vNodes);
         // create new PIs/POs
         assert( Vec_PtrSize(vCis) == nTruePis + p->nRegs );
         assert( Vec_PtrSize(vCos) == nTruePos + p->nRegs );
         Vec_PtrFree( p->vCis );    p->vCis = vCis;
         Vec_PtrFree( p->vCos );    p->vCos = vCos;
         p->nObjs[AIG_OBJ_CI] = Vec_PtrSize( p->vCis );
         p->nObjs[AIG_OBJ_CO] = Vec_PtrSize( p->vCos );
                 
     }
     Vec_PtrFree( vNodes );
     p->nTruePis = Aig_ManCiNum(p) - Aig_ManRegNum(p); 
     p->nTruePos = Aig_ManCoNum(p) - Aig_ManRegNum(p); 
     Aig_ManSetCioIds( p );
     // remove dangling nodes
     return Aig_ManCleanup( p );
 }

int Aig_ManSeqCleanupBasic ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Returns the number of dangling nodes removed.]

Description [This cleanup procedure is different in that it removes logic but does not remove the dangling latches.]

SideEffects []

SeeAlso []

Definition at line 257 of file aigScl.c.

 {
     Vec_Ptr_t * vNodes;
     Aig_Obj_t * pObj, * pObjLi, * pObjLo;
     int i;
 //    assert( Aig_ManBufNum(p) == 0 );
 
     // mark the PIs
     Aig_ManIncrementTravId( p );
     Aig_ObjSetTravIdCurrent( p, Aig_ManConst1(p) );
     Aig_ManForEachPiSeq( p, pObj, i )
         Aig_ObjSetTravIdCurrent( p, pObj );
 
     // prepare to collect nodes reachable from POs
     vNodes = Vec_PtrAlloc( 100 );
     Aig_ManForEachPoSeq( p, pObj, i )
         Vec_PtrPush( vNodes, pObj );
 
     // remember latch inputs in latch outputs
     Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
         pObjLo->pNext = pObjLi;
     // mark the nodes reachable from these nodes
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
         Aig_ManSeqCleanup_rec( p, pObj, vNodes );
     assert( Vec_PtrSize(vNodes) <= Aig_ManCoNum(p) );
     // clean latch output pointers
     Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
         pObjLo->pNext = NULL;
 
     // if some latches are removed, update PIs/POs
     if ( Vec_PtrSize(vNodes) < Aig_ManCoNum(p) )
     {
         // add constant drivers to the dangling latches
         Aig_ManForEachCo( p, pObj, i )
             if ( !Aig_ObjIsTravIdCurrent(p, pObj) )
                 Aig_ObjPatchFanin0( p, pObj, Aig_ManConst0(p) );
     }
     Vec_PtrFree( vNodes );
     // remove dangling nodes
     return Aig_ManCleanup( p );
 }

void Aig_ManSetCioIds ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Sets the PI/PO numbers.]

Description []

SideEffects []

SeeAlso []

Definition at line 965 of file aigUtil.c.

 {
     Aig_Obj_t * pObj;
     int i;
     Aig_ManForEachCi( p, pObj, i )
         pObj->CioId = i;
     Aig_ManForEachCo( p, pObj, i )
         pObj->CioId = i;
 }

void Aig_ManSetPhase ( Aig_Man_t * pAig )

Function*************************************************************

Synopsis [Handle the counter-example.]

Description []

SideEffects []

SeeAlso []

Definition at line 1431 of file aigUtil.c.

 {
     Aig_Obj_t * pObj;
     int i;
     // set the PI simulation information
     Aig_ManConst1( pAig )->fPhase = 1;
     Aig_ManForEachCi( pAig, pObj, i )
         pObj->fPhase = 0;
     // simulate internal nodes
     Aig_ManForEachNode( pAig, pObj, i )
         pObj->fPhase = ( Aig_ObjFanin0(pObj)->fPhase ^ Aig_ObjFaninC0(pObj) )
                      & ( Aig_ObjFanin1(pObj)->fPhase ^ Aig_ObjFaninC1(pObj) );
     // simulate PO nodes
     Aig_ManForEachCo( pAig, pObj, i )
         pObj->fPhase = Aig_ObjFanin0(pObj)->fPhase ^ Aig_ObjFaninC0(pObj);
 }

void Aig_ManSetRegNum	(	Aig_Man_t *	p,
		int	nRegs
	)

Function*************************************************************

Synopsis [Sets the number of registers in the AIG manager.]

Description [This procedure should be called after the manager is fully constructed.]

SideEffects []

SeeAlso []

Definition at line 438 of file aigMan.c.

 {
     p->nRegs = nRegs;
     p->nTruePis = Aig_ManCiNum(p) - nRegs;
     p->nTruePos = Aig_ManCoNum(p) - nRegs;
     Aig_ManSetCioIds( p );
 }

void Aig_ManShow	(	Aig_Man_t *	pMan,
		int	fHaig,
		Vec_Ptr_t *	vBold
	)

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 340 of file aigShow.c.

 {
     extern void Abc_ShowFile( char * FileNameDot );
     static int Counter = 0;
     char FileNameDot[200];
     FILE * pFile;
     // create the file name
 //    Aig_ShowGetFileName( pMan->pName, FileNameDot );
     sprintf( FileNameDot, "temp%02d.dot", Counter++ );
     // check that the file can be opened
     if ( (pFile = fopen( FileNameDot, "w" )) == NULL )
     {
         fprintf( stdout, "Cannot open the intermediate file \"%s\".\n", FileNameDot );
         return;
     }
     fclose( pFile );
     // generate the file
     Aig_WriteDotAig( pMan, FileNameDot, fHaig, vBold );
     // visualize the file 
     Abc_ShowFile( FileNameDot );
 }

Aig_Man_t* Aig_ManStart ( int nNodesMax )

DECLARATIONS ///.

CFile****************************************************************

FileName [aigMan.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [AIG manager.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id:: aigMan.c,v 1.00 2007/04/28 00:00:00 alanmi Exp

]FUNCTION DEFINITIONS /// Function*************************************************************

Synopsis [Starts the AIG manager.]

Description [The argument of this procedure is a soft limit on the the number of nodes, or 0 if the limit is unknown.]

SideEffects []

SeeAlso []

Definition at line 47 of file aigMan.c.

 {
     Aig_Man_t * p;
     if ( nNodesMax <= 0 )
         nNodesMax = 10007;
     // start the manager
     p = ABC_ALLOC( Aig_Man_t, 1 );
     memset( p, 0, sizeof(Aig_Man_t) );
     // perform initializations
     p->nTravIds = 1;
     p->fCatchExor = 0;
     // allocate arrays for nodes
     p->vCis  = Vec_PtrAlloc( 100 );
     p->vCos  = Vec_PtrAlloc( 100 );
     p->vObjs = Vec_PtrAlloc( 1000 );
     p->vBufs = Vec_PtrAlloc( 100 );
     //--jlong -- begin
        p->unfold2_type_I = Vec_PtrAlloc( 4);
        p->unfold2_type_II = Vec_PtrAlloc( 4);
        //--jlong -- end
     // prepare the internal memory manager
     p->pMemObjs = Aig_MmFixedStart( sizeof(Aig_Obj_t), nNodesMax );
     // create the constant node
     p->pConst1 = Aig_ManFetchMemory( p );
     p->pConst1->Type = AIG_OBJ_CONST1;
     p->pConst1->fPhase = 1;
     p->nObjs[AIG_OBJ_CONST1]++;
     // start the table
     p->nTableSize = Abc_PrimeCudd( nNodesMax );
     p->pTable = ABC_ALLOC( Aig_Obj_t *, p->nTableSize );
     memset( p->pTable, 0, sizeof(Aig_Obj_t *) * p->nTableSize );
     return p;
 }

Aig_Man_t* Aig_ManStartFrom ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description []

SideEffects []

SeeAlso []

Definition at line 92 of file aigMan.c.

 {
     Aig_Man_t * pNew;
     Aig_Obj_t * pObj, * pObjNew;
     int i;
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     // create the PIs
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
     Aig_ManForEachCi( p, pObj, i )
     {
         pObjNew = Aig_ObjCreateCi( pNew );
         pObjNew->Level = pObj->Level;
         pObj->pData = pObjNew;
     }
     return pNew;
 }

void Aig_ManStartMemory ( Aig_Man_t * p )

void Aig_ManStartReverseLevels	(	Aig_Man_t *	p,
		int	nMaxLevelIncrease
	)

Function*************************************************************

Synopsis [Prepares for the computation of required levels.]

Description [This procedure should be called before the required times are used. It starts internal data structures, which records the level from the COs of the network nodes in reverse topologogical order.]

SideEffects []

SeeAlso []

Definition at line 142 of file aigTiming.c.

 {
     Vec_Ptr_t * vNodes;
     Aig_Obj_t * pObj;
     int i;
     assert( p->pFanData != NULL );
     assert( p->vLevelR == NULL );
     // remember the maximum number of direct levels
     p->nLevelMax = Aig_ManLevels(p) + nMaxLevelIncrease;
     // start the reverse levels
     p->vLevelR = Vec_IntAlloc( 0 );
     Vec_IntFill( p->vLevelR, Aig_ManObjNumMax(p), 0 );
     // compute levels in reverse topological order
     vNodes = Aig_ManDfsReverse( p );
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
     {
         assert( pObj->fMarkA == 0 );
         Aig_ObjSetReverseLevel( p, pObj, Aig_ObjReverseLevelNew(p, pObj) );
     }
     Vec_PtrFree( vNodes );
 }

void Aig_ManStop ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Stops the AIG manager.]

Description []

SideEffects []

SeeAlso []

Definition at line 187 of file aigMan.c.

 {
     Aig_Obj_t * pObj;
     int i;
     if ( p->time1 ) { ABC_PRT( "time1", p->time1 ); }
     if ( p->time2 ) { ABC_PRT( "time2", p->time2 ); }
     // make sure the nodes have clean marks
     Aig_ManForEachObj( p, pObj, i )
         assert( !pObj->fMarkA && !pObj->fMarkB );
     Tim_ManStopP( (Tim_Man_t **)&p->pManTime );
     if ( p->pFanData ) 
         Aig_ManFanoutStop( p );
     if ( p->pManExdc )  
         Aig_ManStop( p->pManExdc );
 //    Aig_TableProfile( p );
     Aig_MmFixedStop( p->pMemObjs, 0 );
     Vec_PtrFreeP( &p->vCis );
     Vec_PtrFreeP( &p->vCos );
     Vec_PtrFreeP( &p->vObjs );
     Vec_PtrFreeP( &p->vBufs );
     //--jlong -- begin
     Vec_PtrFreeP( &p->unfold2_type_I );
     Vec_PtrFreeP( &p->unfold2_type_II );
     //--jlong -- end
     Vec_IntFreeP( &p->vLevelR );
     Vec_VecFreeP( &p->vLevels );
     Vec_IntFreeP( &p->vFlopNums );
     Vec_IntFreeP( &p->vFlopReprs );
     Vec_VecFreeP( (Vec_Vec_t **)&p->vOnehots );
     Vec_VecFreeP( &p->vClockDoms );
     Vec_IntFreeP( &p->vProbs );
     Vec_IntFreeP( &p->vCiNumsOrig );
     Vec_PtrFreeP( &p->vMapped );
     if ( p->vSeqModelVec )
         Vec_PtrFreeFree( p->vSeqModelVec );
     ABC_FREE( p->pTerSimData );
     ABC_FREE( p->pFastSim );
     ABC_FREE( p->pData );
     ABC_FREE( p->pSeqModel );
     ABC_FREE( p->pName );
     ABC_FREE( p->pSpec );
     ABC_FREE( p->pObjCopies );
     ABC_FREE( p->pReprs );
     ABC_FREE( p->pEquivs );
     ABC_FREE( p->pTable );
     ABC_FREE( p );
 }

void Aig_ManStopMemory ( Aig_Man_t * p )

void Aig_ManStopP ( Aig_Man_t ** p )

Function*************************************************************

Synopsis [Stops the AIG manager.]

Description []

SideEffects []

SeeAlso []

Definition at line 246 of file aigMan.c.

 {
     if ( *p == NULL )
         return;
     Aig_ManStop( *p );
     *p = NULL;
 }

void Aig_ManStopReverseLevels ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Cleans the data structures used to compute required levels.]

Description []

SideEffects []

SeeAlso []

Definition at line 175 of file aigTiming.c.

 {
     assert( p->vLevelR != NULL );
     Vec_IntFree( p->vLevelR );
     p->vLevelR = NULL;
     p->nLevelMax = 0;
 
 }

Vec_Ptr_t* Aig_ManSupports ( Aig_Man_t * pMan )

Function*************************************************************

Synopsis [Computes supports of the POs in the multi-output AIG.]

Description [Returns the array of integer arrays containing indices of the primary inputs for each primary output.]

SideEffects [Adds the integer PO number at end of each array.]

SeeAlso []

Definition at line 273 of file aigPart.c.

 {
     Vec_Ptr_t * vSupports;
     Vec_Int_t * vSupp;
     Part_Man_t * p;
     Part_One_t * pPart0, * pPart1;
     Aig_Obj_t * pObj;
     int i, Counter = 0;
     // set the number of PIs/POs
     Aig_ManForEachCi( pMan, pObj, i )
         pObj->pNext = (Aig_Obj_t *)(long)i;
     Aig_ManForEachCo( pMan, pObj, i )
         pObj->pNext = (Aig_Obj_t *)(long)i;
     // start the support computation manager
     p = Part_ManStart( 1 << 20, 1 << 6 );
     // consider objects in the topological order
     vSupports = Vec_PtrAlloc( Aig_ManCoNum(pMan) );
     Aig_ManCleanData(pMan);
     Aig_ManForEachObj( pMan, pObj, i )
     {
         if ( Aig_ObjIsNode(pObj) )
         {
             pPart0 = (Part_One_t *)Aig_ObjFanin0(pObj)->pData;
             pPart1 = (Part_One_t *)Aig_ObjFanin1(pObj)->pData;
             pObj->pData = Part_ManMergeEntry( p, pPart0, pPart1, pObj->nRefs );
             assert( pPart0->nRefs > 0 );
             if ( --pPart0->nRefs == 0 )
                 Part_ManRecycleEntry( p, pPart0 );
             assert( pPart1->nRefs > 0 );
             if ( --pPart1->nRefs == 0 )
                 Part_ManRecycleEntry( p, pPart1 );
             if ( ((Part_One_t *)pObj->pData)->nOuts <= 16 )
                 Counter++;
             continue;
         }
         if ( Aig_ObjIsCo(pObj) )
         {
             pPart0 = (Part_One_t *)Aig_ObjFanin0(pObj)->pData;
             vSupp = Part_ManTransferEntry(pPart0);
             Vec_IntPush( vSupp, (int)(long)pObj->pNext );
             Vec_PtrPush( vSupports, vSupp );
             assert( pPart0->nRefs > 0 );
             if ( --pPart0->nRefs == 0 )
                 Part_ManRecycleEntry( p, pPart0 );
             continue;
         }
         if ( Aig_ObjIsCi(pObj) )
         {
             if ( pObj->nRefs )
             {
                 pPart0 = Part_ManFetchEntry( p, 1, pObj->nRefs );
                 pPart0->pOuts[ pPart0->nOuts++ ] = (int)(long)pObj->pNext;
                 pObj->pData = pPart0;
             }
             continue;
         }
         if ( Aig_ObjIsConst1(pObj) )
         {
             if ( pObj->nRefs )
                 pObj->pData = Part_ManFetchEntry( p, 0, pObj->nRefs );
             continue;
         }
         assert( 0 );
     }
 //printf( "Memory usage = %d MB.\n", Vec_PtrSize(p->vMemory) * p->nChunkSize / (1<<20) );
     Part_ManStop( p );
     // sort supports by size
     Vec_VecSort( (Vec_Vec_t *)vSupports, 1 );
     // clear the number of PIs/POs
     Aig_ManForEachCi( pMan, pObj, i )
         pObj->pNext = NULL;
     Aig_ManForEachCo( pMan, pObj, i )
         pObj->pNext = NULL;
 /*
     Aig_ManForEachCo( pMan, pObj, i )
         printf( "%d ", Vec_IntSize( Vec_VecEntryInt(vSupports, i) ) );
     printf( "\n" );
 */
 //    printf( "%d \n", Counter );
     return vSupports;
 }

Vec_Ptr_t* Aig_ManSupportsInverse ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Computes the set of outputs for each input.]

Description [Returns the array of integer arrays containing indices of the primary outputsf for each primary input.]

SideEffects []

SeeAlso []

Definition at line 385 of file aigPart.c.

 {
     Vec_Ptr_t * vSupps, * vSuppsInv;
     Vec_Int_t * vSupp;
     int i, k, iIn, iOut;
     // get structural supports for each output
     vSupps = Aig_ManSupports( p );
     // start the inverse supports
     vSuppsInv = Vec_PtrAlloc( Aig_ManCiNum(p) );
     for ( i = 0; i < Aig_ManCiNum(p); i++ )
         Vec_PtrPush( vSuppsInv, Vec_IntAlloc(8) );
     // transforms the supports into the inverse supports
     Vec_PtrForEachEntry( Vec_Int_t *, vSupps, vSupp, i )
     {
         iOut = Vec_IntPop( vSupp );
         Vec_IntForEachEntry( vSupp, iIn, k )
             Vec_IntPush( (Vec_Int_t *)Vec_PtrEntry(vSuppsInv, iIn), iOut );
     }
     Vec_VecFree( (Vec_Vec_t *)vSupps );
     return vSuppsInv;
 }

Vec_Ptr_t* Aig_ManSupportsRegisters ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Returns the register dependency matrix.]

Description []

SideEffects []

SeeAlso []

Definition at line 418 of file aigPart.c.

 {
     Vec_Ptr_t * vSupports, * vMatrix;
     Vec_Int_t * vSupp;
     int iOut, iIn, k, m, i;
     // get structural supports for each output
     vSupports = Aig_ManSupports( p );
     // transforms the supports into the latch dependency matrix
     vMatrix = Vec_PtrStart( Aig_ManRegNum(p) );
     Vec_PtrForEachEntry( Vec_Int_t *, vSupports, vSupp, i )
     {
         // skip true POs
         iOut = Vec_IntPop( vSupp );
         iOut -= Aig_ManCoNum(p) - Aig_ManRegNum(p);
         if ( iOut < 0 )
         {
             Vec_IntFree( vSupp );
             continue;
         }
         // remove PIs
         m = 0;
         Vec_IntForEachEntry( vSupp, iIn, k )
         {
             iIn -= Aig_ManCiNum(p) - Aig_ManRegNum(p);
             if ( iIn < 0 )
                 continue;
             assert( iIn < Aig_ManRegNum(p) );
             Vec_IntWriteEntry( vSupp, m++, iIn );
         }
         Vec_IntShrink( vSupp, m );
         // store support in the matrix
         assert( iOut < Aig_ManRegNum(p) );
         Vec_PtrWriteEntry( vMatrix, iOut, vSupp );
     }
     Vec_PtrFree( vSupports );
     // check that all supports are used
     Vec_PtrForEachEntry( Vec_Int_t *, vMatrix, vSupp, i )
         assert( vSupp != NULL );
     return vMatrix;
 }

void Aig_ManTransferRepr	(	Aig_Man_t *	pNew,
		Aig_Man_t *	pOld
	)

Function*************************************************************

Synopsis [Duplicates AIG while substituting representatives.]

Description []

SideEffects []

SeeAlso []

Definition at line 211 of file aigRepr.c.

 {
     Aig_Obj_t * pObj, * pRepr;
     int k;
     assert( pNew->pReprs != NULL );
     // extend storage to fix pNew
     if ( pNew->nReprsAlloc < Aig_ManObjNumMax(pNew) )
     {
         int nReprsAllocNew = 2 * Aig_ManObjNumMax(pNew);
         pNew->pReprs = ABC_REALLOC( Aig_Obj_t *, pNew->pReprs, nReprsAllocNew );
         memset( pNew->pReprs + pNew->nReprsAlloc, 0, sizeof(Aig_Obj_t *) * (nReprsAllocNew-pNew->nReprsAlloc) );
         pNew->nReprsAlloc = nReprsAllocNew;
     }
     // go through the nodes which have representatives
     Aig_ManForEachObj( pOld, pObj, k )
         if ( (pRepr = Aig_ObjFindRepr(pOld, pObj)) )
             Aig_ObjSetRepr_( pNew, Aig_Regular((Aig_Obj_t *)pRepr->pData), Aig_Regular((Aig_Obj_t *)pObj->pData) ); 
 }

void Aig_ManUpdateLevel	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObjNew
	)

Function*************************************************************

Synopsis [Incrementally updates level of the nodes.]

Description []

SideEffects []

SeeAlso []

Definition at line 195 of file aigTiming.c.

 {
     Aig_Obj_t * pFanout, * pTemp;
     int iFanout = -1, LevelOld, Lev, k, m;
     assert( p->pFanData != NULL );
     assert( Aig_ObjIsNode(pObjNew) );
     // allocate level if needed
     if ( p->vLevels == NULL )
         p->vLevels = Vec_VecAlloc( Aig_ManLevels(p) + 8 );
     // check if level has changed
     LevelOld = Aig_ObjLevel(pObjNew);
     if ( LevelOld == Aig_ObjLevelNew(pObjNew) )
         return;
     // start the data structure for level update
     // we cannot fail to visit a node when using this structure because the 
     // nodes are stored by their _old_ levels, which are assumed to be correct
     Vec_VecClear( p->vLevels );
     Vec_VecPush( p->vLevels, LevelOld, pObjNew );
     pObjNew->fMarkA = 1;
     // recursively update level
     Vec_VecForEachEntryStart( Aig_Obj_t *, p->vLevels, pTemp, Lev, k, LevelOld )
     {
         pTemp->fMarkA = 0;
         assert( Aig_ObjLevel(pTemp) == Lev );
         pTemp->Level = Aig_ObjLevelNew(pTemp);
         // if the level did not change, no need to check the fanout levels
         if ( Aig_ObjLevel(pTemp) == Lev )
             continue;
         // schedule fanout for level update
         Aig_ObjForEachFanout( p, pTemp, pFanout, iFanout, m )
         {
             if ( Aig_ObjIsNode(pFanout) && !pFanout->fMarkA )
             {
                 assert( Aig_ObjLevel(pFanout) >= Lev );
                 Vec_VecPush( p->vLevels, Aig_ObjLevel(pFanout), pFanout );
                 pFanout->fMarkA = 1;
             }
         }
     }
 }

void Aig_ManUpdateReverseLevel	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObjNew
	)

Function*************************************************************

Synopsis [Incrementally updates level of the nodes.]

Description []

SideEffects []

SeeAlso []

Definition at line 247 of file aigTiming.c.

 {
     Aig_Obj_t * pFanin, * pTemp;
     int LevelOld, LevFanin, Lev, k;
     assert( p->vLevelR != NULL );
     assert( Aig_ObjIsNode(pObjNew) );
     // allocate level if needed
     if ( p->vLevels == NULL )
         p->vLevels = Vec_VecAlloc( Aig_ManLevels(p) + 8 );
     // check if level has changed
     LevelOld = Aig_ObjReverseLevel(p, pObjNew);
     if ( LevelOld == Aig_ObjReverseLevelNew(p, pObjNew) )
         return;
     // start the data structure for level update
     // we cannot fail to visit a node when using this structure because the 
     // nodes are stored by their _old_ levels, which are assumed to be correct
     Vec_VecClear( p->vLevels );
     Vec_VecPush( p->vLevels, LevelOld, pObjNew );
     pObjNew->fMarkA = 1;
     // recursively update level
     Vec_VecForEachEntryStart( Aig_Obj_t *, p->vLevels, pTemp, Lev, k, LevelOld )
     {
         pTemp->fMarkA = 0;
         LevelOld = Aig_ObjReverseLevel(p, pTemp); 
         assert( LevelOld == Lev );
         Aig_ObjSetReverseLevel( p, pTemp, Aig_ObjReverseLevelNew(p, pTemp) );
         // if the level did not change, to need to check the fanout levels
         if ( Aig_ObjReverseLevel(p, pTemp) == Lev )
             continue;
         // schedule fanins for level update
         pFanin = Aig_ObjFanin0(pTemp);
         if ( Aig_ObjIsNode(pFanin) && !pFanin->fMarkA )
         {
             LevFanin = Aig_ObjReverseLevel( p, pFanin );
             assert( LevFanin >= Lev );
             Vec_VecPush( p->vLevels, LevFanin, pFanin );
             pFanin->fMarkA = 1;
         }
         pFanin = Aig_ObjFanin1(pTemp);
         if ( Aig_ObjIsNode(pFanin) && !pFanin->fMarkA )
         {
             LevFanin = Aig_ObjReverseLevel( p, pFanin );
             assert( LevFanin >= Lev );
             Vec_VecPush( p->vLevels, LevFanin, pFanin );
             pFanin->fMarkA = 1;
         }
     }
 }

void Aig_ManVerifyLevel ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Verifies direct level of the nodes.]

Description []

SideEffects []

SeeAlso []

Definition at line 307 of file aigTiming.c.

 {
     Aig_Obj_t * pObj;
     int i, Counter = 0;
     assert( p->pFanData );
     Aig_ManForEachNode( p, pObj, i )
         if ( Aig_ObjLevel(pObj) != Aig_ObjLevelNew(pObj) )
         {
             printf( "Level of node %6d should be %4d instead of %4d.\n", 
                 pObj->Id, Aig_ObjLevelNew(pObj), Aig_ObjLevel(pObj) );
             Counter++;
         }
     if ( Counter )
     printf( "Levels of %d nodes are incorrect.\n", Counter );
 }

void Aig_ManVerifyReverseLevel ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Verifies reverse level of the nodes.]

Description []

SideEffects []

SeeAlso []

Definition at line 334 of file aigTiming.c.

 {
     Aig_Obj_t * pObj;
     int i, Counter = 0;
     assert( p->vLevelR );
     Aig_ManForEachNode( p, pObj, i )
         if ( Aig_ObjLevel(pObj) != Aig_ObjLevelNew(pObj) )
         {
             printf( "Reverse level of node %6d should be %4d instead of %4d.\n", 
                 pObj->Id, Aig_ObjReverseLevelNew(p, pObj), Aig_ObjReverseLevel(p, pObj) );
             Counter++;
         }
     if ( Counter )
     printf( "Reverse levels of %d nodes are incorrect.\n", Counter );
 }

int Aig_ManVerifyTopoOrder ( Aig_Man_t * p )

DECLARATIONS ///.

CFile****************************************************************

FileName [aigDfs.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [DFS traversal procedures.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id:: aigDfs.c,v 1.00 2007/04/28 00:00:00 alanmi Exp

]FUNCTION DEFINITIONS /// Function*************************************************************

Synopsis [Verifies that the objects are in a topo order.]

Description []

SideEffects []

SeeAlso []

Definition at line 46 of file aigDfs.c.

 {
     Aig_Obj_t * pObj, * pNext;
     int i, k, iBox, iTerm1, nTerms;
     Aig_ManSetCioIds( p );
     Aig_ManIncrementTravId( p );
     Aig_ManForEachObj( p, pObj, i )
     {
         if ( Aig_ObjIsNode(pObj) )
         {
             pNext = Aig_ObjFanin0(pObj);
             if ( !Aig_ObjIsTravIdCurrent(p,pNext) )
             {
                 printf( "Node %d has fanin %d that is not in a topological order.\n", pObj->Id, pNext->Id );
                 return 0;
             }
             pNext = Aig_ObjFanin1(pObj);
             if ( !Aig_ObjIsTravIdCurrent(p,pNext) )
             {
                 printf( "Node %d has fanin %d that is not in a topological order.\n", pObj->Id, pNext->Id );
                 return 0;
             }
         }
         else if ( Aig_ObjIsCo(pObj) || Aig_ObjIsBuf(pObj) )
         {
             pNext = Aig_ObjFanin0(pObj);
             if ( !Aig_ObjIsTravIdCurrent(p,pNext) )
             {
                 printf( "Node %d has fanin %d that is not in a topological order.\n", pObj->Id, pNext->Id );
                 return 0;
             }
         }
         else if ( Aig_ObjIsCi(pObj) )
         {
             if ( p->pManTime )
             {
                 iBox = Tim_ManBoxForCi( (Tim_Man_t *)p->pManTime, Aig_ObjCioId(pObj) );
                 if ( iBox >= 0 ) // this is not a true PI
                 {
                     iTerm1 = Tim_ManBoxInputFirst( (Tim_Man_t *)p->pManTime, iBox );
                     nTerms = Tim_ManBoxInputNum( (Tim_Man_t *)p->pManTime, iBox );
                     for ( k = 0; k < nTerms; k++ )
                     {
                         pNext = Aig_ManCo( p, iTerm1 + k );
                         assert( Tim_ManBoxForCo( (Tim_Man_t *)p->pManTime, Aig_ObjCioId(pNext) ) == iBox ); 
                         if ( !Aig_ObjIsTravIdCurrent(p,pNext) )
                         {
                             printf( "Box %d has input %d that is not in a topological order.\n", iBox, pNext->Id );
                             return 0;
                         }
                     }
                 }
             }
         }
         else if ( !Aig_ObjIsConst1(pObj) )
             assert( 0 );
         Aig_ObjSetTravIdCurrent( p, pObj );
     }
     Aig_ManCleanCioIds( p );
     return 1;
 }

Aig_Obj_t* Aig_Miter	(	Aig_Man_t *	p,
		Vec_Ptr_t *	vPairs
	)

Function*************************************************************

Synopsis [Implements the miter.]

Description []

SideEffects []

SeeAlso []

Definition at line 431 of file aigOper.c.

 {
     int i;
     assert( vPairs->nSize > 0 );
     assert( vPairs->nSize % 2 == 0 );
     for ( i = 0; i < vPairs->nSize; i += 2 )
         vPairs->pArray[i/2] = Aig_Not( Aig_Exor( p, (Aig_Obj_t *)vPairs->pArray[i], (Aig_Obj_t *)vPairs->pArray[i+1] ) );
     vPairs->nSize = vPairs->nSize/2;
     return Aig_Not( Aig_Multi_rec( p, (Aig_Obj_t **)vPairs->pArray, vPairs->nSize, AIG_OBJ_AND ) );
 }

Aig_Obj_t* Aig_MiterTwo	(	Aig_Man_t *	p,
		Vec_Ptr_t *	vNodes1,
		Vec_Ptr_t *	vNodes2
	)

Function*************************************************************

Synopsis [Implements the miter.]

Description []

SideEffects []

SeeAlso []

Definition at line 453 of file aigOper.c.

 {
     int i;
     assert( vNodes1->nSize > 0 && vNodes1->nSize > 0 );
     assert( vNodes1->nSize == vNodes2->nSize );
     for ( i = 0; i < vNodes1->nSize; i++ )
         vNodes1->pArray[i] = Aig_Not( Aig_Exor( p, (Aig_Obj_t *)vNodes1->pArray[i], (Aig_Obj_t *)vNodes2->pArray[i] ) );
     return Aig_Not( Aig_Multi_rec( p, (Aig_Obj_t **)vNodes1->pArray, vNodes1->nSize, AIG_OBJ_AND ) );
 }

char* Aig_MmFixedEntryFetch ( Aig_MmFixed_t * p )

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 161 of file aigMem.c.

 {
     char * pTemp;
     int i;
 
     // check if there are still free entries
     if ( p->nEntriesUsed == p->nEntriesAlloc )
     { // need to allocate more entries
         assert( p->pEntriesFree == NULL );
         if ( p->nChunks == p->nChunksAlloc )
         {
             p->nChunksAlloc *= 2;
             p->pChunks = ABC_REALLOC( char *, p->pChunks, p->nChunksAlloc ); 
         }
         p->pEntriesFree = ABC_ALLOC( char, p->nEntrySize * p->nChunkSize );
         p->nMemoryAlloc += p->nEntrySize * p->nChunkSize;
         // transform these entries into a linked list
         pTemp = p->pEntriesFree;
         for ( i = 1; i < p->nChunkSize; i++ )
         {
             *((char **)pTemp) = pTemp + p->nEntrySize;
             pTemp += p->nEntrySize;
         }
         // set the last link
         *((char **)pTemp) = NULL;
         // add the chunk to the chunk storage
         p->pChunks[ p->nChunks++ ] = p->pEntriesFree;
         // add to the number of entries allocated
         p->nEntriesAlloc += p->nChunkSize;
     }
     // incrememt the counter of used entries
     p->nEntriesUsed++;
     if ( p->nEntriesMax < p->nEntriesUsed )
         p->nEntriesMax = p->nEntriesUsed;
     // return the first entry in the free entry list
     pTemp = p->pEntriesFree;
     p->pEntriesFree = *((char **)pTemp);
     return pTemp;
 }

void Aig_MmFixedEntryRecycle	(	Aig_MmFixed_t *	p,
		char *	pEntry
	)

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 212 of file aigMem.c.

 {
     // decrement the counter of used entries
     p->nEntriesUsed--;
     // add the entry to the linked list of free entries
     *((char **)pEntry) = p->pEntriesFree;
     p->pEntriesFree = pEntry;
 }

int Aig_MmFixedReadMaxEntriesUsed ( Aig_MmFixed_t * p )

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 287 of file aigMem.c.

 {
     return p->nEntriesMax;
 }

int Aig_MmFixedReadMemUsage ( Aig_MmFixed_t * p )

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 271 of file aigMem.c.

 {
     return p->nMemoryAlloc;
 }

void Aig_MmFixedRestart ( Aig_MmFixed_t * p )

Function*************************************************************

Synopsis []

Description [Relocates all the memory except the first chunk.]

SideEffects []

SeeAlso []

Definition at line 232 of file aigMem.c.

 {
     int i;
     char * pTemp;
     if ( p->nChunks == 0 )
         return;
     // deallocate all chunks except the first one
     for ( i = 1; i < p->nChunks; i++ )
         ABC_FREE( p->pChunks[i] );
     p->nChunks = 1;
     // transform these entries into a linked list
     pTemp = p->pChunks[0];
     for ( i = 1; i < p->nChunkSize; i++ )
     {
         *((char **)pTemp) = pTemp + p->nEntrySize;
         pTemp += p->nEntrySize;
     }
     // set the last link
     *((char **)pTemp) = NULL;
     // set the free entry list
     p->pEntriesFree  = p->pChunks[0];
     // set the correct statistics
     p->nMemoryAlloc  = p->nEntrySize * p->nChunkSize;
     p->nMemoryUsed   = 0;
     p->nEntriesAlloc = p->nChunkSize;
     p->nEntriesUsed  = 0;
 }

Aig_MmFixed_t* Aig_MmFixedStart	(	int	nEntrySize,
		int	nEntriesMax
	)

FUNCTION DEFINITIONS ///.

Function*************************************************************

Synopsis [Allocates memory pieces of fixed size.]

Description [The size of the chunk is computed as the minimum of 1024 entries and 64K. Can only work with entry size at least 4 byte long.]

SideEffects []

SeeAlso []

Definition at line 96 of file aigMem.c.

 {
     Aig_MmFixed_t * p;
 
     p = ABC_ALLOC( Aig_MmFixed_t, 1 );
     memset( p, 0, sizeof(Aig_MmFixed_t) );
 
     p->nEntrySize    = nEntrySize;
     p->nEntriesAlloc = 0;
     p->nEntriesUsed  = 0;
     p->pEntriesFree  = NULL;
 
     p->nChunkSize = nEntriesMax / 8;
     if ( p->nChunkSize < 8 )
         p->nChunkSize = 8;
 
     p->nChunksAlloc  = 64;
     p->nChunks       = 0;
     p->pChunks       = ABC_ALLOC( char *, p->nChunksAlloc );
 
     p->nMemoryUsed   = 0;
     p->nMemoryAlloc  = 0;
     return p;
 }

void Aig_MmFixedStop	(	Aig_MmFixed_t *	p,
		int	fVerbose
	)

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 132 of file aigMem.c.

 {
     int i;
     if ( p == NULL )
         return;
     if ( fVerbose )
     {
         printf( "Fixed memory manager: Entry = %5d. Chunk = %5d. Chunks used = %5d.\n",
             p->nEntrySize, p->nChunkSize, p->nChunks );
         printf( "   Entries used = %8d. Entries peak = %8d. Memory used = %8d. Memory alloc = %8d.\n",
             p->nEntriesUsed, p->nEntriesMax, p->nEntrySize * p->nEntriesUsed, p->nMemoryAlloc );
     }
     for ( i = 0; i < p->nChunks; i++ )
         ABC_FREE( p->pChunks[i] );
     ABC_FREE( p->pChunks );
     ABC_FREE( p );
 }

char* Aig_MmFlexEntryFetch	(	Aig_MmFlex_t *	p,
		int	nBytes
	)

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 366 of file aigMem.c.

 {
     char * pTemp;
     // check if there are still free entries
     if ( p->pCurrent == NULL || p->pCurrent + nBytes > p->pEnd )
     { // need to allocate more entries
         if ( p->nChunks == p->nChunksAlloc )
         {
             p->nChunksAlloc *= 2;
             p->pChunks = ABC_REALLOC( char *, p->pChunks, p->nChunksAlloc ); 
         }
         if ( nBytes > p->nChunkSize )
         {
             // resize the chunk size if more memory is requested than it can give
             // (ideally, this should never happen)
             p->nChunkSize = 2 * nBytes;
         }
         p->pCurrent = ABC_ALLOC( char, p->nChunkSize );
         p->pEnd     = p->pCurrent + p->nChunkSize;
         p->nMemoryAlloc += p->nChunkSize;
         // add the chunk to the chunk storage
         p->pChunks[ p->nChunks++ ] = p->pCurrent;
     }
     assert( p->pCurrent + nBytes <= p->pEnd );
     // increment the counter of used entries
     p->nEntriesUsed++;
     // keep track of the memory used
     p->nMemoryUsed += nBytes;
     // return the next entry
     pTemp = p->pCurrent;
     p->pCurrent += nBytes;
     return pTemp;
 }

int Aig_MmFlexReadMemUsage ( Aig_MmFlex_t * p )

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 439 of file aigMem.c.

 {
     return p->nMemoryUsed;
 }

void Aig_MmFlexRestart ( Aig_MmFlex_t * p )

Function*************************************************************

Synopsis []

Description [Relocates all the memory except the first chunk.]

SideEffects []

SeeAlso []

Definition at line 411 of file aigMem.c.

 {
     int i;
     if ( p->nChunks == 0 )
         return;
     // deallocate all chunks except the first one
     for ( i = 1; i < p->nChunks; i++ )
         ABC_FREE( p->pChunks[i] );
     p->nChunks  = 1;
     p->nMemoryAlloc = p->nChunkSize;
     // transform these entries into a linked list
     p->pCurrent = p->pChunks[0];
     p->pEnd     = p->pCurrent + p->nChunkSize;
     p->nEntriesUsed = 0;
     p->nMemoryUsed = 0;
 }

Aig_MmFlex_t* Aig_MmFlexStart ( )

Function*************************************************************

Synopsis [Allocates entries of flexible size.]

Description [Can only work with entry size at least 4 byte long.]

SideEffects []

SeeAlso []

Definition at line 305 of file aigMem.c.

 {
     Aig_MmFlex_t * p;
 
     p = ABC_ALLOC( Aig_MmFlex_t, 1 );
     memset( p, 0, sizeof(Aig_MmFlex_t) );
 
     p->nEntriesUsed  = 0;
     p->pCurrent      = NULL;
     p->pEnd          = NULL;
 
     p->nChunkSize    = (1 << 18);
     p->nChunksAlloc  = 64;
     p->nChunks       = 0;
     p->pChunks       = ABC_ALLOC( char *, p->nChunksAlloc );
 
     p->nMemoryUsed   = 0;
     p->nMemoryAlloc  = 0;
     return p;
 }

void Aig_MmFlexStop	(	Aig_MmFlex_t *	p,
		int	fVerbose
	)

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 337 of file aigMem.c.

 {
     int i;
     if ( p == NULL )
         return;
     if ( fVerbose )
     {
         printf( "Flexible memory manager: Chunk size = %d. Chunks used = %d.\n",
             p->nChunkSize, p->nChunks );
         printf( "   Entries used = %d. Memory used = %d. Memory alloc = %d.\n",
             p->nEntriesUsed, p->nMemoryUsed, p->nMemoryAlloc );
     }
     for ( i = 0; i < p->nChunks; i++ )
         ABC_FREE( p->pChunks[i] );
     ABC_FREE( p->pChunks );
     ABC_FREE( p );
 }

char* Aig_MmStepEntryFetch	(	Aig_MmStep_t *	p,
		int	nBytes
	)

Function*************************************************************

Synopsis [Creates the entry.]

Description []

SideEffects []

SeeAlso []

Definition at line 534 of file aigMem.c.

 {
     if ( nBytes == 0 )
         return NULL;
     if ( nBytes > p->nMapSize )
     {
         if ( p->nChunks == p->nChunksAlloc )
         {
             p->nChunksAlloc *= 2;
             p->pChunks = ABC_REALLOC( char *, p->pChunks, p->nChunksAlloc ); 
         }
         p->pChunks[ p->nChunks++ ] = ABC_ALLOC( char, nBytes );
         return p->pChunks[p->nChunks-1];
     }
     return Aig_MmFixedEntryFetch( p->pMap[nBytes] );
 }

void Aig_MmStepEntryRecycle	(	Aig_MmStep_t *	p,
		char *	pEntry,
		int	nBytes
	)

Function*************************************************************

Synopsis [Recycles the entry.]

Description []

SideEffects []

SeeAlso []

Definition at line 563 of file aigMem.c.

 {
     if ( nBytes == 0 )
         return;
     if ( nBytes > p->nMapSize )
     {
 //        ABC_FREE( pEntry );
         return;
     }
     Aig_MmFixedEntryRecycle( p->pMap[nBytes], pEntry );
 }

int Aig_MmStepReadMemUsage ( Aig_MmStep_t * p )

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 586 of file aigMem.c.

 {
     int i, nMemTotal = 0;
     for ( i = 0; i < p->nMems; i++ )
         nMemTotal += p->pMems[i]->nMemoryAlloc;
     return nMemTotal;
 }

Aig_MmStep_t* Aig_MmStepStart ( int nSteps )

Function*************************************************************

Synopsis [Starts the hierarchical memory manager.]

Description [This manager can allocate entries of any size. Iternally they are mapped into the entries with the number of bytes equal to the power of 2. The smallest entry size is 8 bytes. The next one is 16 bytes etc. So, if the user requests 6 bytes, he gets 8 byte entry. If we asks for 25 bytes, he gets 32 byte entry etc. The input parameters "nSteps" says how many fixed memory managers are employed internally. Calling this procedure with nSteps equal to 10 results in 10 hierarchically arranged internal memory managers, which can allocate up to 4096 (1Kb) entries. Requests for larger entries are handed over to malloc() and then ABC_FREE()ed.]

SideEffects []

SeeAlso []

Definition at line 468 of file aigMem.c.

 {
     Aig_MmStep_t * p;
     int i, k;
     p = ABC_ALLOC( Aig_MmStep_t, 1 );
     memset( p, 0, sizeof(Aig_MmStep_t) );
     p->nMems = nSteps;
     // start the fixed memory managers
     p->pMems = ABC_ALLOC( Aig_MmFixed_t *, p->nMems );
     for ( i = 0; i < p->nMems; i++ )
         p->pMems[i] = Aig_MmFixedStart( (8<<i), (1<<13) );
     // set up the mapping of the required memory size into the corresponding manager
     p->nMapSize = (4<<p->nMems);
     p->pMap = ABC_ALLOC( Aig_MmFixed_t *, p->nMapSize+1 );
     p->pMap[0] = NULL;
     for ( k = 1; k <= 4; k++ )
         p->pMap[k] = p->pMems[0];
     for ( i = 0; i < p->nMems; i++ )
         for ( k = (4<<i)+1; k <= (8<<i); k++ )
             p->pMap[k] = p->pMems[i];
 //for ( i = 1; i < 100; i ++ )
 //printf( "%10d: size = %10d\n", i, p->pMap[i]->nEntrySize );
     p->nChunksAlloc  = 64;
     p->nChunks       = 0;
     p->pChunks       = ABC_ALLOC( char *, p->nChunksAlloc );
     return p;
 }

void Aig_MmStepStop	(	Aig_MmStep_t *	p,
		int	fVerbose
	)

Function*************************************************************

Synopsis [Stops the memory manager.]

Description []

SideEffects []

SeeAlso []

Definition at line 507 of file aigMem.c.

 {
     int i;
     for ( i = 0; i < p->nMems; i++ )
         Aig_MmFixedStop( p->pMems[i], fVerbose );
     if ( p->nChunksAlloc )
     {
         for ( i = 0; i < p->nChunks; i++ )
             ABC_FREE( p->pChunks[i] );
         ABC_FREE( p->pChunks );
     }
     ABC_FREE( p->pMems );
     ABC_FREE( p->pMap );
     ABC_FREE( p );
 }

Aig_Obj_t* Aig_Multi	(	Aig_Man_t *	p,
		Aig_Obj_t **	pArgs,
		int	nArgs,
		Aig_Type_t	Type
	)

Function*************************************************************

Synopsis [Old code.]

Description []

SideEffects []

SeeAlso []

Definition at line 413 of file aigOper.c.

 {
     assert( Type == AIG_OBJ_AND || Type == AIG_OBJ_EXOR );
     assert( nArgs > 0 );
     return Aig_Multi_rec( p, pArgs, nArgs, Type );
 }

Aig_Obj_t* Aig_Mux	(	Aig_Man_t *	p,
		Aig_Obj_t *	pC,
		Aig_Obj_t *	p1,
		Aig_Obj_t *	p0
	)

Function*************************************************************

Synopsis [Implements ITE operation.]

Description []

SideEffects []

SeeAlso []

Definition at line 317 of file aigOper.c.

 {
     int fUseMuxCanon = 0;
     Aig_Obj_t * pTempA1, * pTempA2, * pTempB1, * pTempB2, * pTemp;
     int Count0, Count1;
     if ( !fUseMuxCanon )
         return Aig_Mux2( p, pC, p1, p0 );
     if ( p0 == p1 )
         return p0;
     if ( p1 == Aig_Not(p0) )
         return Aig_Exor( p, pC, p0 );
     if ( pC == Aig_ManConst0(p) )
         return p0;
     if ( pC == Aig_ManConst1(p) )
         return p1;
     if ( p0 == Aig_ManConst0(p) )
         return Aig_And( p, pC, p1 );
     if ( p0 == Aig_ManConst1(p) )
         return Aig_Or( p, Aig_Not(pC), p1 );
     if ( p1 == Aig_ManConst0(p) )
         return Aig_And( p, Aig_Not(pC), p0 );
     if ( p1 == Aig_ManConst1(p) )
         return Aig_Or( p, pC, p0 );
     // implement the first MUX (F = C * x1 + C' * x0)
     pTempA1 = Aig_TableLookupInt( p, pC,          p1 );
     pTempA2 = Aig_TableLookupInt( p, Aig_Not(pC), p0 );
     if ( pTempA1 && pTempA2 )
     {
         pTemp = Aig_TableLookupInt( p, Aig_Not(pTempA1), Aig_Not(pTempA2) );
         if ( pTemp ) return Aig_Not(pTemp);
     }
     Count0 = (pTempA1 != NULL) + (pTempA2 != NULL);
     // implement the second MUX (F' = C * x1' + C' * x0')
     pTempB1 = Aig_TableLookupInt( p, pC,          Aig_Not(p1) );
     pTempB2 = Aig_TableLookupInt( p, Aig_Not(pC), Aig_Not(p0) );
     if ( pTempB1 && pTempB2 )
     {
         pTemp = Aig_TableLookupInt( p, Aig_Not(pTempB1), Aig_Not(pTempB2) );
         if ( pTemp ) return pTemp;
     }
     Count1 = (pTempB1 != NULL) + (pTempB2 != NULL);
     // compare and decide which one to implement
     if ( Count0 >= Count1 )
         return Aig_Or( p, Aig_And(p, pC, p1), Aig_And(p, Aig_Not(pC), p0) );
     return Aig_Not( Aig_Or( p, Aig_And(p, pC, Aig_Not(p1)), Aig_And(p, Aig_Not(pC), Aig_Not(p0)) ) );
 //    return Aig_Or( p, Aig_And(p, pC, p1), Aig_And(p, Aig_Not(pC), p0) );
 }

int Aig_NodeDeref_rec	(	Aig_Obj_t *	pNode,
		unsigned	LevelMin,
		float *	pPower,
		float *	pProbs
	)

DECLARATIONS ///.

CFile****************************************************************

FileName [aigMffc.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [Computation of MFFCs.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id:: aigMffc.c,v 1.00 2007/04/28 00:00:00 alanmi Exp

]FUNCTION DEFINITIONS /// Function*************************************************************

Synopsis [Dereferences the node's MFFC.]

Description []

SideEffects []

SeeAlso []

Definition at line 45 of file aigMffc.c.

 {
     float Power0 = 0.0, Power1 = 0.0;
     Aig_Obj_t * pFanin;
     int Counter = 0;
     if ( pProbs )
         *pPower = 0.0;
     if ( Aig_ObjIsCi(pNode) )
         return 0;
     // consider the first fanin
     pFanin = Aig_ObjFanin0(pNode);
     assert( pFanin->nRefs > 0 );
     if ( --pFanin->nRefs == 0 && (!LevelMin || pFanin->Level > LevelMin) )
         Counter += Aig_NodeDeref_rec( pFanin, LevelMin, &Power0, pProbs );
     if ( pProbs )
         *pPower += Power0 + 2.0 * pProbs[pFanin->Id] * (1.0 - pProbs[pFanin->Id]);
     // skip the buffer
     if ( Aig_ObjIsBuf(pNode) )
         return Counter;
     assert( Aig_ObjIsNode(pNode) );
     // consider the second fanin
     pFanin = Aig_ObjFanin1(pNode);
     assert( pFanin->nRefs > 0 );
     if ( --pFanin->nRefs == 0 && (!LevelMin || pFanin->Level > LevelMin) )
         Counter += Aig_NodeDeref_rec( pFanin, LevelMin, &Power1, pProbs );
     if ( pProbs )
         *pPower += Power1 + 2.0 * pProbs[pFanin->Id] * (1.0 - pProbs[pFanin->Id]);
     return Counter + 1;
 }

void Aig_NodeIntersectLists	(	Vec_Ptr_t *	vArr1,
		Vec_Ptr_t *	vArr2,
		Vec_Ptr_t *	vArr
	)

Function*************************************************************

Synopsis [Returns the result of intersecting the two vectors.]

Description [Assumes that the vectors are sorted in the increasing order.]

SideEffects []

SeeAlso []

Definition at line 1259 of file aigUtil.c.

 {
     Aig_Obj_t ** pBeg  = (Aig_Obj_t **)vArr->pArray;
     Aig_Obj_t ** pBeg1 = (Aig_Obj_t **)vArr1->pArray;
     Aig_Obj_t ** pBeg2 = (Aig_Obj_t **)vArr2->pArray;
     Aig_Obj_t ** pEnd1 = (Aig_Obj_t **)vArr1->pArray + vArr1->nSize;
     Aig_Obj_t ** pEnd2 = (Aig_Obj_t **)vArr2->pArray + vArr2->nSize;
     Vec_PtrGrow( vArr, Abc_MaxInt( Vec_PtrSize(vArr1), Vec_PtrSize(vArr2) ) );
     pBeg  = (Aig_Obj_t **)vArr->pArray;
     while ( pBeg1 < pEnd1 && pBeg2 < pEnd2 )
     {
         if ( (*pBeg1)->Id == (*pBeg2)->Id )
             *pBeg++ = *pBeg1++, pBeg2++;
         else if ( (*pBeg1)->Id < (*pBeg2)->Id )
 //            *pBeg++ = *pBeg1++;
             pBeg1++;
         else 
 //            *pBeg++ = *pBeg2++;
             pBeg2++;
     }
 //    while ( pBeg1 < pEnd1 )
 //        *pBeg++ = *pBeg1++;
 //    while ( pBeg2 < pEnd2 )
 //        *pBeg++ = *pBeg2++;
     vArr->nSize = pBeg - (Aig_Obj_t **)vArr->pArray;
     assert( vArr->nSize <= vArr->nCap );
     assert( vArr->nSize <= vArr1->nSize );
     assert( vArr->nSize <= vArr2->nSize );
 }

int Aig_NodeMffcExtendCut	(	Aig_Man_t *	p,
		Aig_Obj_t *	pNode,
		Vec_Ptr_t *	vLeaves,
		Vec_Ptr_t *	vResult
	)

Function*************************************************************

Synopsis [Expands the cut by adding the most closely related node.]

Description [Returns 1 if the cut exists.]

SideEffects []

SeeAlso []

Definition at line 265 of file aigMffc.c.

 {
     Aig_Obj_t * pObj, * pLeafBest;
     int i, LevelMax, ConeSize1, ConeSize2, ConeCur1, ConeCur2, ConeBest;
     // dereference the current cut
     LevelMax = 0;
     Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pObj, i )
         LevelMax = Abc_MaxInt( LevelMax, (int)pObj->Level );
     if ( LevelMax == 0 )
         return 0;
     // dereference the cut
     ConeSize1 = Aig_NodeDeref_rec( pNode, 0, NULL, NULL );
     // try expanding each node in the boundary
     ConeBest = ABC_INFINITY;
     pLeafBest = NULL;
     Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pObj, i )
     {
         if ( (int)pObj->Level != LevelMax )
             continue;
         ConeCur1 = Aig_NodeDeref_rec( pObj, 0, NULL, NULL );
         if ( ConeBest > ConeCur1 )
         {
             ConeBest = ConeCur1;
             pLeafBest = pObj;
         }
         ConeCur2 = Aig_NodeRef_rec( pObj, 0 );
         assert( ConeCur1 == ConeCur2 );
     }
     assert( pLeafBest != NULL );
     assert( Aig_ObjIsNode(pLeafBest) );
     // deref the best leaf
     ConeCur1 = Aig_NodeDeref_rec( pLeafBest, 0, NULL, NULL );
     // collect the cut nodes
     Vec_PtrClear( vResult );
     Aig_ManIncrementTravId( p );
     Aig_NodeMffcSupp_rec( p, pNode, 0, vResult, 1, pLeafBest );
     // ref the nodes
     ConeCur2 = Aig_NodeRef_rec( pLeafBest, 0 );
     assert( ConeCur1 == ConeCur2 );
     // ref the original node
     ConeSize2 = Aig_NodeRef_rec( pNode, 0 );
     assert( ConeSize1 == ConeSize2 );
     return 1;
 }

int Aig_NodeMffcLabel	(	Aig_Man_t *	p,
		Aig_Obj_t *	pNode,
		float *	pPower
	)

Function*************************************************************

Synopsis [Labels the nodes in the MFFC.]

Description [Returns the number of internal nodes in the MFFC.]

SideEffects []

SeeAlso []

Definition at line 211 of file aigMffc.c.

 {
     int ConeSize1, ConeSize2;
     assert( (pPower != NULL) == (p->vProbs != NULL) );
     assert( !Aig_IsComplement(pNode) );
     assert( Aig_ObjIsNode(pNode) );
     Aig_ManIncrementTravId( p );
     ConeSize1 = Aig_NodeDeref_rec( pNode, 0, pPower, p->vProbs? (float *)p->vProbs->pArray : NULL );
     ConeSize2 = Aig_NodeRefLabel_rec( p, pNode, 0 );
     assert( ConeSize1 == ConeSize2 );
     assert( ConeSize1 > 0 );
     return ConeSize1;
 }

int Aig_NodeMffcLabelCut	(	Aig_Man_t *	p,
		Aig_Obj_t *	pNode,
		Vec_Ptr_t *	vLeaves
	)

Function*************************************************************

Synopsis [Labels the nodes in the MFFC.]

Description [Returns the number of internal nodes in the MFFC.]

SideEffects []

SeeAlso []

Definition at line 236 of file aigMffc.c.

 {
     Aig_Obj_t * pObj;
     int i, ConeSize1, ConeSize2;
     assert( !Aig_IsComplement(pNode) );
     assert( Aig_ObjIsNode(pNode) );
     Aig_ManIncrementTravId( p );
     Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pObj, i )
         pObj->nRefs++;
     ConeSize1 = Aig_NodeDeref_rec( pNode, 0, NULL, NULL );
     ConeSize2 = Aig_NodeRefLabel_rec( p, pNode, 0 );
     Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pObj, i )
         pObj->nRefs--;
     assert( ConeSize1 == ConeSize2 );
     assert( ConeSize1 > 0 );
     return ConeSize1;
 }

int Aig_NodeMffcSupp	(	Aig_Man_t *	p,
		Aig_Obj_t *	pNode,
		int	LevelMin,
		Vec_Ptr_t *	vSupp
	)

Function*************************************************************

Synopsis [Collects the support of depth-limited MFFC.]

Description [Returns the number of internal nodes in the MFFC.]

SideEffects []

SeeAlso []

Definition at line 179 of file aigMffc.c.

 {
     int ConeSize1, ConeSize2;
     if ( vSupp ) Vec_PtrClear( vSupp );
     if ( !Aig_ObjIsNode(pNode) )
     {
         if ( Aig_ObjIsCi(pNode) && vSupp )
             Vec_PtrPush( vSupp, pNode );
         return 0;
     }
     assert( !Aig_IsComplement(pNode) );
     assert( Aig_ObjIsNode(pNode) );
     Aig_ManIncrementTravId( p );
     ConeSize1 = Aig_NodeDeref_rec( pNode, LevelMin, NULL, NULL );
     Aig_NodeMffcSupp_rec( p, pNode, LevelMin, vSupp, 1, NULL );
     ConeSize2 = Aig_NodeRef_rec( pNode, LevelMin );
     assert( ConeSize1 == ConeSize2 );
     assert( ConeSize1 > 0 );
     return ConeSize1;
 }

int Aig_NodeRef_rec	(	Aig_Obj_t *	pNode,
		unsigned	LevelMin
	)

Function*************************************************************

Synopsis [References the node's MFFC.]

Description []

SideEffects []

SeeAlso []

Definition at line 86 of file aigMffc.c.

 {
     Aig_Obj_t * pFanin;
     int Counter = 0;
     if ( Aig_ObjIsCi(pNode) )
         return 0;
     // consider the first fanin
     pFanin = Aig_ObjFanin0(pNode);
     if ( pFanin->nRefs++ == 0 && (!LevelMin || pFanin->Level > LevelMin) )
         Counter += Aig_NodeRef_rec( pFanin, LevelMin );
     // skip the buffer
     if ( Aig_ObjIsBuf(pNode) )
         return Counter;
     assert( Aig_ObjIsNode(pNode) );
     // consider the second fanin
     pFanin = Aig_ObjFanin1(pNode);
     if ( pFanin->nRefs++ == 0 && (!LevelMin || pFanin->Level > LevelMin) )
         Counter += Aig_NodeRef_rec( pFanin, LevelMin );
     return Counter + 1;
 }

void Aig_NodeUnionLists	(	Vec_Ptr_t *	vArr1,
		Vec_Ptr_t *	vArr2,
		Vec_Ptr_t *	vArr
	)

Function*************************************************************

Synopsis [Returns the result of merging the two vectors.]

Description [Assumes that the vectors are sorted in the increasing order.]

SideEffects []

SeeAlso []

Definition at line 1220 of file aigUtil.c.

 {
     Aig_Obj_t ** pBeg  = (Aig_Obj_t **)vArr->pArray;
     Aig_Obj_t ** pBeg1 = (Aig_Obj_t **)vArr1->pArray;
     Aig_Obj_t ** pBeg2 = (Aig_Obj_t **)vArr2->pArray;
     Aig_Obj_t ** pEnd1 = (Aig_Obj_t **)vArr1->pArray + vArr1->nSize;
     Aig_Obj_t ** pEnd2 = (Aig_Obj_t **)vArr2->pArray + vArr2->nSize;
     Vec_PtrGrow( vArr, Vec_PtrSize(vArr1) + Vec_PtrSize(vArr2) );
     pBeg  = (Aig_Obj_t **)vArr->pArray;
     while ( pBeg1 < pEnd1 && pBeg2 < pEnd2 )
     {
         if ( (*pBeg1)->Id == (*pBeg2)->Id )
             *pBeg++ = *pBeg1++, pBeg2++;
         else if ( (*pBeg1)->Id < (*pBeg2)->Id )
             *pBeg++ = *pBeg1++;
         else 
             *pBeg++ = *pBeg2++;
     }
     while ( pBeg1 < pEnd1 )
         *pBeg++ = *pBeg1++;
     while ( pBeg2 < pEnd2 )
         *pBeg++ = *pBeg2++;
     vArr->nSize = pBeg - (Aig_Obj_t **)vArr->pArray;
     assert( vArr->nSize <= vArr->nCap );
     assert( vArr->nSize >= vArr1->nSize );
     assert( vArr->nSize >= vArr2->nSize );
 }

static Aig_Obj_t* Aig_Not ( Aig_Obj_t * p )

inlinestatic

Definition at line 247 of file aig.h.

247 { return (Aig_Obj_t *)((ABC_PTRUINT_T)(p) ^ 01); }

Aig_Obj_t_

Definition: aig.h:69

static Aig_Obj_t* Aig_NotCond	(	Aig_Obj_t *	p,
		int	c
	)

inlinestatic

Definition at line 248 of file aig.h.

248 { return (Aig_Obj_t *)((ABC_PTRUINT_T)(p) ^ (c)); }

Aig_Obj_t_

Definition: aig.h:69

void Aig_ObjAddFanout	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj,
		Aig_Obj_t *	pFanout
	)

Function*************************************************************

Synopsis [Adds fanout (pFanout) of node (pObj).]

Description []

SideEffects []

SeeAlso []

Definition at line 107 of file aigFanout.c.

 {
     int iFan, * pFirst, * pPrevC, * pNextC, * pPrev, * pNext;
     assert( p->pFanData );
     assert( !Aig_IsComplement(pObj) && !Aig_IsComplement(pFanout) );
     assert( pFanout->Id > 0 );
     if ( pObj->Id >= p->nFansAlloc || pFanout->Id >= p->nFansAlloc )
     {
         int nFansAlloc = 2 * Abc_MaxInt( pObj->Id, pFanout->Id ); 
         p->pFanData = ABC_REALLOC( int, p->pFanData, 5 * nFansAlloc );
         memset( p->pFanData + 5 * p->nFansAlloc, 0, sizeof(int) * 5 * (nFansAlloc - p->nFansAlloc) );
         p->nFansAlloc = nFansAlloc;
     }
     assert( pObj->Id < p->nFansAlloc && pFanout->Id < p->nFansAlloc );
     iFan   = Aig_FanoutCreate( pFanout->Id, Aig_ObjWhatFanin(pFanout, pObj) );
     pPrevC = Aig_FanoutPrev( p->pFanData, iFan );
     pNextC = Aig_FanoutNext( p->pFanData, iFan );
     pFirst = Aig_FanoutObj( p->pFanData, pObj->Id );
     if ( *pFirst == 0 )
     {
         *pFirst = iFan;
         *pPrevC = iFan;
         *pNextC = iFan;
     }
     else
     {
         pPrev = Aig_FanoutPrev( p->pFanData, *pFirst );
         pNext = Aig_FanoutNext( p->pFanData, *pPrev );
         assert( *pNext == *pFirst );
         *pPrevC = *pPrev;
         *pNextC = *pFirst;
         *pPrev  = iFan;
         *pNext  = iFan;
     }
 }

int Aig_ObjCheckTfi	(	Aig_Man_t *	p,
		Aig_Obj_t *	pNew,
		Aig_Obj_t *	pOld
	)

Function*************************************************************

Synopsis [Returns 1 if pOld is in the TFI of pNew.]

Description []

SideEffects []

SeeAlso []

Definition at line 435 of file aigRepr.c.

 {
     assert( !Aig_IsComplement(pNew) );
     assert( !Aig_IsComplement(pOld) );
     Aig_ManIncrementTravId( p );
     return Aig_ObjCheckTfi_rec( p, pNew, pOld );
 }

static Aig_Obj_t* Aig_ObjChild0 ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 310 of file aig.h.

310 { return pObj->pFanin0; }

Aig_Obj_t_::pFanin0

Aig_Obj_t * pFanin0

Definition: aig.h:75

static Aig_Obj_t* Aig_ObjChild0Copy ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 312 of file aig.h.

312 { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin0(pObj)? Aig_NotCond((Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0(pObj)) : NULL; }

Aig_ObjFanin0

static Aig_Obj_t * Aig_ObjFanin0(Aig_Obj_t *pObj)

Definition: aig.h:308

Aig_IsComplement

static int Aig_IsComplement(Aig_Obj_t *p)

Definition: aig.h:249

Aig_Obj_t_

Definition: aig.h:69

Aig_ObjFaninC0

static int Aig_ObjFaninC0(Aig_Obj_t *pObj)

Definition: aig.h:306

assert

#define assert(ex)

Definition: util_old.h:213

Aig_NotCond

static Aig_Obj_t * Aig_NotCond(Aig_Obj_t *p, int c)

Definition: aig.h:248

static void Aig_ObjChild0Flip ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 316 of file aig.h.

316 { assert( !Aig_IsComplement(pObj) ); pObj->pFanin0 = Aig_Not(pObj->pFanin0); }

Aig_IsComplement

static int Aig_IsComplement(Aig_Obj_t *p)

Definition: aig.h:249

Aig_Not

static Aig_Obj_t * Aig_Not(Aig_Obj_t *p)

Definition: aig.h:247

assert

#define assert(ex)

Definition: util_old.h:213

Aig_Obj_t_::pFanin0

Aig_Obj_t * pFanin0

Definition: aig.h:75

static Aig_Obj_t* Aig_ObjChild0Next ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 314 of file aig.h.

314 { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin0(pObj)? Aig_NotCond((Aig_Obj_t *)Aig_ObjFanin0(pObj)->pNext, Aig_ObjFaninC0(pObj)) : NULL; }

Aig_ObjFanin0

static Aig_Obj_t * Aig_ObjFanin0(Aig_Obj_t *pObj)

Definition: aig.h:308

Aig_IsComplement

static int Aig_IsComplement(Aig_Obj_t *p)

Definition: aig.h:249

Aig_Obj_t_

Definition: aig.h:69

Aig_ObjFaninC0

static int Aig_ObjFaninC0(Aig_Obj_t *pObj)

Definition: aig.h:306

assert

#define assert(ex)

Definition: util_old.h:213

Aig_NotCond

static Aig_Obj_t * Aig_NotCond(Aig_Obj_t *p, int c)

Definition: aig.h:248

static Aig_Obj_t* Aig_ObjChild1 ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 311 of file aig.h.

311 { return pObj->pFanin1; }

Aig_Obj_t_::pFanin1

Aig_Obj_t * pFanin1

Definition: aig.h:76

static Aig_Obj_t* Aig_ObjChild1Copy ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 313 of file aig.h.

313 { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin1(pObj)? Aig_NotCond((Aig_Obj_t *)Aig_ObjFanin1(pObj)->pData, Aig_ObjFaninC1(pObj)) : NULL; }

Aig_IsComplement

static int Aig_IsComplement(Aig_Obj_t *p)

Definition: aig.h:249

Aig_ObjFanin1

static Aig_Obj_t * Aig_ObjFanin1(Aig_Obj_t *pObj)

Definition: aig.h:309

Aig_Obj_t_

Definition: aig.h:69

Aig_ObjFaninC1

static int Aig_ObjFaninC1(Aig_Obj_t *pObj)

Definition: aig.h:307

assert

#define assert(ex)

Definition: util_old.h:213

Aig_NotCond

static Aig_Obj_t * Aig_NotCond(Aig_Obj_t *p, int c)

Definition: aig.h:248

static void Aig_ObjChild1Flip ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 317 of file aig.h.

317 { assert( !Aig_IsComplement(pObj) ); pObj->pFanin1 = Aig_Not(pObj->pFanin1); }

Aig_Obj_t_::pFanin1

Aig_Obj_t * pFanin1

Definition: aig.h:76

Aig_IsComplement

static int Aig_IsComplement(Aig_Obj_t *p)

Definition: aig.h:249

Aig_Not

static Aig_Obj_t * Aig_Not(Aig_Obj_t *p)

Definition: aig.h:247

assert

#define assert(ex)

Definition: util_old.h:213

static Aig_Obj_t* Aig_ObjChild1Next ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 315 of file aig.h.

315 { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin1(pObj)? Aig_NotCond((Aig_Obj_t *)Aig_ObjFanin1(pObj)->pNext, Aig_ObjFaninC1(pObj)) : NULL; }

Aig_IsComplement

static int Aig_IsComplement(Aig_Obj_t *p)

Definition: aig.h:249

Aig_ObjFanin1

static Aig_Obj_t * Aig_ObjFanin1(Aig_Obj_t *pObj)

Definition: aig.h:309

Aig_Obj_t_

Definition: aig.h:69

Aig_ObjFaninC1

static int Aig_ObjFaninC1(Aig_Obj_t *pObj)

Definition: aig.h:307

assert

#define assert(ex)

Definition: util_old.h:213

Aig_NotCond

static Aig_Obj_t * Aig_NotCond(Aig_Obj_t *p, int c)

Definition: aig.h:248

static int Aig_ObjCioId ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 285 of file aig.h.

285 { assert( !Aig_ObjIsNode(pObj) ); return pObj->CioId; }

Aig_Obj_t_::CioId

int CioId

Definition: aig.h:73

Aig_ObjIsNode

static int Aig_ObjIsNode(Aig_Obj_t *pObj)

Definition: aig.h:280

assert

#define assert(ex)

Definition: util_old.h:213

static void Aig_ObjClean ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 326 of file aig.h.

326 { memset( pObj, 0, sizeof(Aig_Obj_t) ); }

memset

char * memset()

Aig_Obj_t_

Definition: aig.h:69

void Aig_ObjCleanData_rec ( Aig_Obj_t * pObj )

Function*************************************************************

Synopsis [Recursively cleans the data pointers in the cone of the node.]

Description [Applicable to small AIGs only because no caching is performed.]

SideEffects []

SeeAlso []

Definition at line 243 of file aigUtil.c.

 {
     assert( !Aig_IsComplement(pObj) );
     assert( !Aig_ObjIsCo(pObj) );
     if ( Aig_ObjIsAnd(pObj) )
     {
         Aig_ObjCleanData_rec( Aig_ObjFanin0(pObj) );
         Aig_ObjCleanData_rec( Aig_ObjFanin1(pObj) );
     }
     pObj->pData = NULL;
 }

static void Aig_ObjClearMarkA ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 290 of file aig.h.

290 { pObj->fMarkA = 0; }

Aig_Obj_t_::fMarkA

unsigned int fMarkA

Definition: aig.h:79

static void Aig_ObjClearRef ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 303 of file aig.h.

303 { pObj->nRefs = 0; }

Aig_Obj_t_::nRefs

unsigned int nRefs

Definition: aig.h:81

void Aig_ObjClearReverseLevel	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj
	)

Function*************************************************************

Synopsis [Resets reverse level of the node.]

Description []

SideEffects []

SeeAlso []

Definition at line 83 of file aigTiming.c.

 {
     Aig_ObjSetReverseLevel( p, pObj, 0 );
 }

void Aig_ObjCollectCut	(	Aig_Obj_t *	pRoot,
		Vec_Ptr_t *	vLeaves,
		Vec_Ptr_t *	vNodes
	)

Function*************************************************************

Synopsis [Computes the internal nodes of the cut.]

Description [Does not include the leaves of the cut.]

SideEffects []

SeeAlso []

Definition at line 1017 of file aigDfs.c.

 {
     Aig_Obj_t * pObj;
     int i;
     // collect and mark the leaves
     Vec_PtrClear( vNodes );
     Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pObj, i )
     {
         assert( pObj->fMarkA == 0 );
         pObj->fMarkA = 1;
 //        printf( "%d " , pObj->Id );
     }
 //printf( "\n" );
     // collect and mark the nodes
     Aig_ObjCollectCut_rec( pRoot, vNodes );
     // clean the nodes
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
         pObj->fMarkA = 0;
     Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pObj, i )
         pObj->fMarkA = 0;
 }

void Aig_ObjCollectMulti	(	Aig_Obj_t *	pRoot,
		Vec_Ptr_t *	vSuper
	)

Function*************************************************************

Synopsis [Detects multi-input gate rooted at this node.]

Description []

SideEffects []

SeeAlso []

Definition at line 289 of file aigUtil.c.

 {
     assert( !Aig_IsComplement(pRoot) );
     Vec_PtrClear( vSuper );
     Aig_ObjCollectMulti_rec( pRoot, pRoot, vSuper );
 }

int Aig_ObjCollectSuper	(	Aig_Obj_t *	pObj,
		Vec_Ptr_t *	vSuper
	)

Function*************************************************************

Synopsis [Collects the nodes of the supergate.]

Description []

SideEffects []

SeeAlso []

Definition at line 1097 of file aigDfs.c.

 {
     int RetValue, i;
     assert( !Aig_IsComplement(pObj) );
     assert( Aig_ObjIsNode(pObj) );
     // collect the nodes in the implication supergate
     Vec_PtrClear( vSuper );
     RetValue = Aig_ObjCollectSuper_rec( pObj, pObj, vSuper );
     assert( Vec_PtrSize(vSuper) > 1 );
     // unmark the visited nodes
     Vec_PtrForEachEntry( Aig_Obj_t *, vSuper, pObj, i )
         Aig_Regular(pObj)->fMarkA = 0;
     // if we found the node and its complement in the same implication supergate, 
     // return empty set of nodes (meaning that we should use constant-0 node)
     if ( RetValue == -1 )
         vSuper->nSize = 0;
     return RetValue;
 }

int Aig_ObjCompareIdIncrease	(	Aig_Obj_t **	pp1,
		Aig_Obj_t **	pp2
	)

Function*************************************************************

Synopsis [Procedure used for sorting the nodes in increasing order of IDs.]

Description []

SideEffects []

SeeAlso []

Definition at line 496 of file aigUtil.c.

 {
     int Diff = Aig_ObjId(*pp1) - Aig_ObjId(*pp2);
     if ( Diff < 0 )
         return -1;
     if ( Diff > 0 ) 
         return 1;
     return 0; 
 }

void Aig_ObjConnect	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj,
		Aig_Obj_t *	pFan0,
		Aig_Obj_t *	pFan1
	)

Function*************************************************************

Synopsis [Connect the object to the fanin.]

Description []

SideEffects []

SeeAlso []

Definition at line 126 of file aigObj.c.

 {
     assert( !Aig_IsComplement(pObj) );
     assert( !Aig_ObjIsCi(pObj) );
     // add the first fanin
     pObj->pFanin0 = pFan0;
     pObj->pFanin1 = pFan1;
     // increment references of the fanins and add their fanouts
     if ( pFan0 != NULL )
     {
         assert( Aig_ObjFanin0(pObj)->Type > 0 );
         Aig_ObjRef( Aig_ObjFanin0(pObj) );
         if ( p->pFanData )
             Aig_ObjAddFanout( p, Aig_ObjFanin0(pObj), pObj );
     }
     if ( pFan1 != NULL )
     {
         assert( Aig_ObjFanin1(pObj)->Type > 0 );
         Aig_ObjRef( Aig_ObjFanin1(pObj) );
         if ( p->pFanData )
             Aig_ObjAddFanout( p, Aig_ObjFanin1(pObj), pObj );
     }
     // set level and phase
     pObj->Level = Aig_ObjLevelNew( pObj );
     pObj->fPhase = Aig_ObjPhaseReal(pFan0) & Aig_ObjPhaseReal(pFan1);
     // add the node to the structural hash table
     if ( p->pTable && Aig_ObjIsHash(pObj) )
         Aig_TableInsert( p, pObj );
     // add the node to the dynamically updated topological order
 //    if ( p->pOrderData && Aig_ObjIsNode(pObj) )
 //        Aig_ObjOrderInsert( p, pObj->Id );
     assert( !Aig_ObjIsNode(pObj) || pObj->Level > 0 );
 }

static Aig_Obj_t* Aig_ObjCopy ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 318 of file aig.h.

318 { assert( !Aig_IsComplement(pObj) ); return (Aig_Obj_t *)pObj->pData; }

Aig_Obj_t_::pData

void * pData

Definition: aig.h:87

Aig_IsComplement

static int Aig_IsComplement(Aig_Obj_t *p)

Definition: aig.h:249

Aig_Obj_t_

Definition: aig.h:69

assert

#define assert(ex)

Definition: util_old.h:213

Aig_Obj_t* Aig_ObjCreate	(	Aig_Man_t *	p,
		Aig_Obj_t *	pGhost
	)

Function*************************************************************

Synopsis [Create the new node assuming it does not exist.]

Description []

SideEffects []

SeeAlso []

Definition at line 89 of file aigObj.c.

 {
     Aig_Obj_t * pObj;
     assert( !Aig_IsComplement(pGhost) );
     assert( Aig_ObjIsHash(pGhost) );
 //    assert( pGhost == &p->Ghost );
     // get memory for the new object
     pObj = Aig_ManFetchMemory( p );
     pObj->Type = pGhost->Type;
     // add connections
     Aig_ObjConnect( p, pObj, pGhost->pFanin0, pGhost->pFanin1 );
     // update node counters of the manager
     p->nObjs[Aig_ObjType(pObj)]++;
     assert( pObj->pData == NULL );
     // create the power counter
     if ( p->vProbs )
     {
         float Prob0 = Abc_Int2Float( Vec_IntEntry( p->vProbs, Aig_ObjFaninId0(pObj) ) );
         float Prob1 = Abc_Int2Float( Vec_IntEntry( p->vProbs, Aig_ObjFaninId1(pObj) ) );
         Prob0 = Aig_ObjFaninC0(pObj)? 1.0 - Prob0 : Prob0;
         Prob1 = Aig_ObjFaninC1(pObj)? 1.0 - Prob1 : Prob1;
         Vec_IntSetEntry( p->vProbs, pObj->Id, Abc_Float2Int(Prob0 * Prob1) );
     }
     return pObj;
 }

Aig_Obj_t* Aig_ObjCreateCi ( Aig_Man_t * p )

DECLARATIONS ///.

CFile****************************************************************

FileName [aigObj.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [Adding/removing objects.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id:: aigObj.c,v 1.00 2007/04/28 00:00:00 alanmi Exp

]FUNCTION DEFINITIONS /// Function*************************************************************

Synopsis [Creates primary input.]

Description []

SideEffects []

SeeAlso []

Definition at line 45 of file aigObj.c.

 {
     Aig_Obj_t * pObj;
     pObj = Aig_ManFetchMemory( p );
     pObj->Type = AIG_OBJ_CI;
     Vec_PtrPush( p->vCis, pObj );
     p->nObjs[AIG_OBJ_CI]++;
     return pObj;
 }

Aig_Obj_t* Aig_ObjCreateCo	(	Aig_Man_t *	p,
		Aig_Obj_t *	pDriver
	)

Function*************************************************************

Synopsis [Creates primary output with the given driver.]

Description []

SideEffects []

SeeAlso []

Definition at line 66 of file aigObj.c.

 {
     Aig_Obj_t * pObj;
     pObj = Aig_ManFetchMemory( p );
     pObj->Type = AIG_OBJ_CO;
     Vec_PtrPush( p->vCos, pObj );
     Aig_ObjConnect( p, pObj, pDriver, NULL );
     p->nObjs[AIG_OBJ_CO]++;
     return pObj;
 }

static Aig_Obj_t* Aig_ObjCreateGhost	(	Aig_Man_t *	p,
		Aig_Obj_t *	p0,
		Aig_Obj_t *	p1,
		Aig_Type_t	Type
	)

inlinestatic

Definition at line 346 of file aig.h.

 {
     Aig_Obj_t * pGhost;
     assert( Type != AIG_OBJ_AND || !Aig_ObjIsConst1(Aig_Regular(p0)) );
     assert( p1 == NULL || !Aig_ObjIsConst1(Aig_Regular(p1)) );
     assert( Type == AIG_OBJ_CI || Aig_Regular(p0) != Aig_Regular(p1) );
     pGhost = Aig_ManGhost(p);
     pGhost->Type = Type;
     if ( p1 == NULL || Aig_Regular(p0)->Id < Aig_Regular(p1)->Id )
     {
         pGhost->pFanin0 = p0;
         pGhost->pFanin1 = p1;
     }
     else
     {
         pGhost->pFanin0 = p1;
         pGhost->pFanin1 = p0;
     }
     return pGhost;
 }

void Aig_ObjCreateRepr	(	Aig_Man_t *	p,
		Aig_Obj_t *	pNode1,
		Aig_Obj_t *	pNode2
	)

Function*************************************************************

Synopsis [Set the representative.]

Description []

SideEffects []

SeeAlso []

Definition at line 83 of file aigRepr.c.

 {
     assert( p->pReprs != NULL );
     assert( !Aig_IsComplement(pNode1) );
     assert( !Aig_IsComplement(pNode2) );
     assert( pNode1->Id < p->nReprsAlloc );
     assert( pNode2->Id < p->nReprsAlloc );
     assert( pNode1->Id < pNode2->Id );
     p->pReprs[pNode2->Id] = pNode1;
 }

static Aig_Cut_t* Aig_ObjCuts	(	Aig_ManCut_t *	p,
		Aig_Obj_t *	pObj
	)

inlinestatic

Definition at line 209 of file aig.h.

209 { return p->pCuts[pObj->Id]; }

Aig_ManCut_t_::pCuts

Aig_Cut_t ** pCuts

Definition: aig.h:196

Aig_Obj_t_::Id

int Id

Definition: aig.h:85

static unsigned Aig_ObjCutSign ( unsigned ObjId )

inlinestatic

MACRO DEFINITIONS ///.

Definition at line 228 of file aig.h.

228 { return (1 << (ObjId & 31)); }

void Aig_ObjDelete	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj
	)

Function*************************************************************

Synopsis [Deletes the node.]

Description []

SideEffects []

SeeAlso []

Definition at line 209 of file aigObj.c.

 {
     assert( !Aig_IsComplement(pObj) );
     assert( !Aig_ObjIsTerm(pObj) );
     assert( Aig_ObjRefs(pObj) == 0 );
     if ( p->pFanData && Aig_ObjIsBuf(pObj) )
         Vec_PtrRemove( p->vBufs, pObj );
     p->nObjs[pObj->Type]--;
     Vec_PtrWriteEntry( p->vObjs, pObj->Id, NULL );
     Aig_ManRecycleMemory( p, pObj );
 }

void Aig_ObjDelete_rec	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj,
		int	fFreeTop
	)

Function*************************************************************

Synopsis [Deletes the MFFC of the node.]

Description []

SideEffects []

SeeAlso []

Definition at line 232 of file aigObj.c.

 {
     Aig_Obj_t * pFanin0, * pFanin1;
     assert( !Aig_IsComplement(pObj) );
     if ( Aig_ObjIsConst1(pObj) || Aig_ObjIsCi(pObj) )
         return;
     assert( !Aig_ObjIsCo(pObj) );
     pFanin0 = Aig_ObjFanin0(pObj);
     pFanin1 = Aig_ObjFanin1(pObj);
     Aig_ObjDisconnect( p, pObj );
     if ( fFreeTop )
         Aig_ObjDelete( p, pObj );
     if ( pFanin0 && !Aig_ObjIsNone(pFanin0) && Aig_ObjRefs(pFanin0) == 0 )
         Aig_ObjDelete_rec( p, pFanin0, 1 );
     if ( pFanin1 && !Aig_ObjIsNone(pFanin1) && Aig_ObjRefs(pFanin1) == 0 )
         Aig_ObjDelete_rec( p, pFanin1, 1 );
 }

void Aig_ObjDeletePo	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj
	)

Function*************************************************************

Synopsis [Deletes the node.]

Description []

SideEffects []

SeeAlso []

Definition at line 261 of file aigObj.c.

 {
     assert( Aig_ObjIsCo(pObj) );
     Aig_ObjDeref(Aig_ObjFanin0(pObj));
     pObj->pFanin0 = NULL;
     p->nObjs[pObj->Type]--;
     Vec_PtrWriteEntry( p->vObjs, pObj->Id, NULL );
     Aig_ManRecycleMemory( p, pObj );
 }

static void Aig_ObjDeref ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 302 of file aig.h.

302 { assert( pObj->nRefs > 0 ); pObj->nRefs--; }

assert

#define assert(ex)

Definition: util_old.h:213

Aig_Obj_t_::nRefs

unsigned int nRefs

Definition: aig.h:81

void Aig_ObjDisconnect	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj
	)

Function*************************************************************

Synopsis [Disconnects the object from the fanins.]

Description []

SideEffects []

SeeAlso []

Definition at line 171 of file aigObj.c.

 {
     assert( !Aig_IsComplement(pObj) );
     // remove connections
     if ( pObj->pFanin0 != NULL )
     {
         if ( p->pFanData )
             Aig_ObjRemoveFanout( p, Aig_ObjFanin0(pObj), pObj );
         Aig_ObjDeref(Aig_ObjFanin0(pObj));
     }
     if ( pObj->pFanin1 != NULL )
     {
         if ( p->pFanData )
             Aig_ObjRemoveFanout( p, Aig_ObjFanin1(pObj), pObj );
         Aig_ObjDeref(Aig_ObjFanin1(pObj));
     }
     // remove the node from the structural hash table
     if ( p->pTable && Aig_ObjIsHash(pObj) )
         Aig_TableDelete( p, pObj );
     // add the first fanin
     pObj->pFanin0 = NULL;
     pObj->pFanin1 = NULL;
     // remove the node from the dynamically updated topological order
 //    if ( p->pOrderData && Aig_ObjIsNode(pObj) )
 //        Aig_ObjOrderRemove( p, pObj->Id );
 }

static Aig_Obj_t* Aig_ObjEquiv	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj
	)

inlinestatic

Definition at line 328 of file aig.h.

328 { return p->pEquivs? p->pEquivs[pObj->Id] : NULL; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

Aig_Obj_t_::Id

int Id

Definition: aig.h:85

static Aig_Obj_t* Aig_ObjFanin0 ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 308 of file aig.h.

308 { return Aig_Regular(pObj->pFanin0); }

Aig_Regular

static Aig_Obj_t * Aig_Regular(Aig_Obj_t *p)

Definition: aig.h:246

Aig_Obj_t_::pFanin0

Aig_Obj_t * pFanin0

Definition: aig.h:75

static Aig_Obj_t* Aig_ObjFanin1 ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 309 of file aig.h.

309 { return Aig_Regular(pObj->pFanin1); }

Aig_Obj_t_::pFanin1

Aig_Obj_t * pFanin1

Definition: aig.h:76

Aig_Regular

static Aig_Obj_t * Aig_Regular(Aig_Obj_t *p)

Definition: aig.h:246

static int Aig_ObjFaninC0 ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 306 of file aig.h.

306 { return Aig_IsComplement(pObj->pFanin0); }

Aig_IsComplement

static int Aig_IsComplement(Aig_Obj_t *p)

Definition: aig.h:249

Aig_Obj_t_::pFanin0

Aig_Obj_t * pFanin0

Definition: aig.h:75

static int Aig_ObjFaninC1 ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 307 of file aig.h.

307 { return Aig_IsComplement(pObj->pFanin1); }

Aig_Obj_t_::pFanin1

Aig_Obj_t * pFanin1

Definition: aig.h:76

Aig_IsComplement

static int Aig_IsComplement(Aig_Obj_t *p)

Definition: aig.h:249

static int Aig_ObjFaninId0 ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 304 of file aig.h.

304 { return pObj->pFanin0? Aig_Regular(pObj->pFanin0)->Id : -1; }

Aig_Regular

static Aig_Obj_t * Aig_Regular(Aig_Obj_t *p)

Definition: aig.h:246

Aig_Obj_t_::pFanin0

Aig_Obj_t * pFanin0

Definition: aig.h:75

Aig_Obj_t_::Id

int Id

Definition: aig.h:85

static int Aig_ObjFaninId1 ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 305 of file aig.h.

305 { return pObj->pFanin1? Aig_Regular(pObj->pFanin1)->Id : -1; }

Aig_Obj_t_::pFanin1

Aig_Obj_t * pFanin1

Definition: aig.h:76

Aig_Regular

static Aig_Obj_t * Aig_Regular(Aig_Obj_t *p)

Definition: aig.h:246

Aig_Obj_t_::Id

int Id

Definition: aig.h:85

static Aig_Obj_t* Aig_ObjFanout0	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj
	)

inlinestatic

Definition at line 327 of file aig.h.

327 { assert(p->pFanData && pObj->Id < p->nFansAlloc); return Aig_ManObj(p, p->pFanData[5*pObj->Id] >> 1); }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

Aig_ManObj

static Aig_Obj_t * Aig_ManObj(Aig_Man_t *p, int i)

Definition: aig.h:270

assert

#define assert(ex)

Definition: util_old.h:213

Aig_Obj_t_::Id

int Id

Definition: aig.h:85

static int Aig_ObjFanout0Int	(	Aig_Man_t *	p,
		int	ObjId
	)

inlinestatic

Definition at line 424 of file aig.h.

424 { assert(ObjId < p->nFansAlloc); return p->pFanData[5*ObjId]; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

assert

#define assert(ex)

Definition: util_old.h:213

static int Aig_ObjFanoutC	(	Aig_Obj_t *	pObj,
		Aig_Obj_t *	pFanout
	)

inlinestatic

Definition at line 338 of file aig.h.

 { 
     if ( Aig_ObjFanin0(pFanout) == pObj ) return Aig_ObjFaninC0(pObj); 
     if ( Aig_ObjFanin1(pFanout) == pObj ) return Aig_ObjFaninC1(pObj); 
     assert(0); return -1; 
 }

static int Aig_ObjFanoutNext	(	Aig_Man_t *	p,
		int	iFan
	)

inlinestatic

Definition at line 425 of file aig.h.

425 { assert(iFan/2 < p->nFansAlloc); return p->pFanData[5*(iFan >> 1) + 3 + (iFan & 1)]; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

assert

#define assert(ex)

Definition: util_old.h:213

static Aig_Obj_t* Aig_ObjFromLit	(	Aig_Man_t *	p,
		int	iLit
	)

inlinestatic

Definition at line 322 of file aig.h.

322 { return Aig_NotCond( Aig_ManObj(p, Abc_Lit2Var(iLit)), Abc_LitIsCompl(iLit) ); }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

Aig_ManObj

static Aig_Obj_t * Aig_ManObj(Aig_Man_t *p, int i)

Definition: aig.h:270

Abc_LitIsCompl

static int Abc_LitIsCompl(int Lit)

Definition: abc_global.h:265

Abc_Lit2Var

static int Abc_Lit2Var(int Lit)

Definition: abc_global.h:264

Aig_NotCond

static Aig_Obj_t * Aig_NotCond(Aig_Obj_t *p, int c)

Definition: aig.h:248

static int Aig_ObjId ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 286 of file aig.h.

286 { return pObj->Id; }

Aig_Obj_t_::Id

int Id

Definition: aig.h:85

static int Aig_ObjIsAnd ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 278 of file aig.h.

278 { return pObj->Type == AIG_OBJ_AND; }

Aig_Obj_t_::Type

unsigned int Type

Definition: aig.h:77

AIG_OBJ_AND

Definition: aig.h:63

static int Aig_ObjIsBuf ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 277 of file aig.h.

277 { return pObj->Type == AIG_OBJ_BUF; }

Aig_Obj_t_::Type

unsigned int Type

Definition: aig.h:77

AIG_OBJ_BUF

Definition: aig.h:62

static int Aig_ObjIsCand ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 284 of file aig.h.

284 { return pObj->Type == AIG_OBJ_CI || pObj->Type == AIG_OBJ_AND || pObj->Type == AIG_OBJ_EXOR; }

Aig_Obj_t_::Type

unsigned int Type

Definition: aig.h:77

AIG_OBJ_EXOR

Definition: aig.h:64

AIG_OBJ_CI

Definition: aig.h:60

AIG_OBJ_AND

Definition: aig.h:63

static int Aig_ObjIsChoice	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj
	)

inlinestatic

Definition at line 283 of file aig.h.

283 { return p->pEquivs && p->pEquivs[pObj->Id] && pObj->nRefs > 0; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

Aig_Obj_t_::Id

int Id

Definition: aig.h:85

Aig_Obj_t_::nRefs

unsigned int nRefs

Definition: aig.h:81

static int Aig_ObjIsCi ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 275 of file aig.h.

275 { return pObj->Type == AIG_OBJ_CI; }

Aig_Obj_t_::Type

unsigned int Type

Definition: aig.h:77

AIG_OBJ_CI

Definition: aig.h:60

static int Aig_ObjIsCo ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 276 of file aig.h.

276 { return pObj->Type == AIG_OBJ_CO; }

AIG_OBJ_CO

Definition: aig.h:61

Aig_Obj_t_::Type

unsigned int Type

Definition: aig.h:77

static int Aig_ObjIsConst1 ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 274 of file aig.h.

274 { assert(!Aig_IsComplement(pObj)); return pObj->Type == AIG_OBJ_CONST1; }

Aig_Obj_t_::Type

unsigned int Type

Definition: aig.h:77

Aig_IsComplement

static int Aig_IsComplement(Aig_Obj_t *p)

Definition: aig.h:249

AIG_OBJ_CONST1

Definition: aig.h:59

assert

#define assert(ex)

Definition: util_old.h:213

static int Aig_ObjIsExor ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 279 of file aig.h.

279 { return pObj->Type == AIG_OBJ_EXOR; }

Aig_Obj_t_::Type

unsigned int Type

Definition: aig.h:77

AIG_OBJ_EXOR

Definition: aig.h:64

static int Aig_ObjIsHash ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 282 of file aig.h.

282 { return pObj->Type == AIG_OBJ_AND || pObj->Type == AIG_OBJ_EXOR; }

Aig_Obj_t_::Type

unsigned int Type

Definition: aig.h:77

AIG_OBJ_EXOR

Definition: aig.h:64

AIG_OBJ_AND

Definition: aig.h:63

static int Aig_ObjIsMarkA ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 288 of file aig.h.

288 { return pObj->fMarkA; }

Aig_Obj_t_::fMarkA

unsigned int fMarkA

Definition: aig.h:79

int Aig_ObjIsMuxType ( Aig_Obj_t * pNode )

Function*************************************************************

Synopsis [Returns 1 if the node is the root of MUX or EXOR/NEXOR.]

Description []

SideEffects []

SeeAlso []

Definition at line 307 of file aigUtil.c.

 {
     Aig_Obj_t * pNode0, * pNode1;
     // check that the node is regular
     assert( !Aig_IsComplement(pNode) );
     // if the node is not AND, this is not MUX
     if ( !Aig_ObjIsAnd(pNode) )
         return 0;
     // if the children are not complemented, this is not MUX
     if ( !Aig_ObjFaninC0(pNode) || !Aig_ObjFaninC1(pNode) )
         return 0;
     // get children
     pNode0 = Aig_ObjFanin0(pNode);
     pNode1 = Aig_ObjFanin1(pNode);
     // if the children are not ANDs, this is not MUX
     if ( !Aig_ObjIsAnd(pNode0) || !Aig_ObjIsAnd(pNode1) )
         return 0;
     // otherwise the node is MUX iff it has a pair of equal grandchildren
     return (Aig_ObjFanin0(pNode0) == Aig_ObjFanin0(pNode1) && (Aig_ObjFaninC0(pNode0) ^ Aig_ObjFaninC0(pNode1))) || 
            (Aig_ObjFanin0(pNode0) == Aig_ObjFanin1(pNode1) && (Aig_ObjFaninC0(pNode0) ^ Aig_ObjFaninC1(pNode1))) ||
            (Aig_ObjFanin1(pNode0) == Aig_ObjFanin0(pNode1) && (Aig_ObjFaninC1(pNode0) ^ Aig_ObjFaninC0(pNode1))) ||
            (Aig_ObjFanin1(pNode0) == Aig_ObjFanin1(pNode1) && (Aig_ObjFaninC1(pNode0) ^ Aig_ObjFaninC1(pNode1)));
 }

static int Aig_ObjIsNode ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 280 of file aig.h.

280 { return pObj->Type == AIG_OBJ_AND || pObj->Type == AIG_OBJ_EXOR; }

Aig_Obj_t_::Type

unsigned int Type

Definition: aig.h:77

AIG_OBJ_EXOR

Definition: aig.h:64

AIG_OBJ_AND

Definition: aig.h:63

static int Aig_ObjIsNone ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 273 of file aig.h.

273 { return pObj->Type == AIG_OBJ_NONE; }

AIG_OBJ_NONE

Definition: aig.h:58

Aig_Obj_t_::Type

unsigned int Type

Definition: aig.h:77

static int Aig_ObjIsTerm ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 281 of file aig.h.

281 { return pObj->Type == AIG_OBJ_CI || pObj->Type == AIG_OBJ_CO || pObj->Type == AIG_OBJ_CONST1; }

AIG_OBJ_CO

Definition: aig.h:61

Aig_Obj_t_::Type

unsigned int Type

Definition: aig.h:77

AIG_OBJ_CONST1

Definition: aig.h:59

AIG_OBJ_CI

Definition: aig.h:60

static int Aig_ObjIsTravIdCurrent	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj
	)

inlinestatic

Definition at line 295 of file aig.h.

295 { return (int)(pObj->TravId == p->nTravIds); }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

Aig_Obj_t_::TravId

int TravId

Definition: aig.h:84

static int Aig_ObjIsTravIdPrevious	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj
	)

inlinestatic

Definition at line 296 of file aig.h.

296 { return (int)(pObj->TravId == p->nTravIds - 1); }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

Aig_Obj_t_::TravId

int TravId

Definition: aig.h:84

static int Aig_ObjLevel ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 323 of file aig.h.

323 { assert( !Aig_IsComplement(pObj) ); return pObj->Level; }

Aig_Obj_t_::Level

unsigned Level

Definition: aig.h:82

Aig_IsComplement

static int Aig_IsComplement(Aig_Obj_t *p)

Definition: aig.h:249

assert

#define assert(ex)

Definition: util_old.h:213

static int Aig_ObjLevelNew ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 324 of file aig.h.

324 { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin1(pObj)? 1 + Aig_ObjIsExor(pObj) + Abc_MaxInt(Aig_ObjFanin0(pObj)->Level, Aig_ObjFanin1(pObj)->Level) : Aig_ObjFanin0(pObj)->Level; }

Aig_ObjFanin0

static Aig_Obj_t * Aig_ObjFanin0(Aig_Obj_t *pObj)

Definition: aig.h:308

Aig_IsComplement

static int Aig_IsComplement(Aig_Obj_t *p)

Definition: aig.h:249

Abc_MaxInt

static int Abc_MaxInt(int a, int b)

Definition: abc_global.h:238

Aig_ObjFanin1

static Aig_Obj_t * Aig_ObjFanin1(Aig_Obj_t *pObj)

Definition: aig.h:309

Aig_ObjIsExor

static int Aig_ObjIsExor(Aig_Obj_t *pObj)

Definition: aig.h:279

assert

#define assert(ex)

Definition: util_old.h:213

void Aig_ObjOrderAdvance ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Advances the order forward.]

Description []

SideEffects []

SeeAlso []

Definition at line 162 of file aigOrder.c.

 {
     assert( p->pOrderData );
     assert( p->pOrderData[2*p->iPrev+1] == (unsigned)p->iNext );
     p->iPrev = p->iNext;
     p->nAndPrev++;
 }

void Aig_ObjOrderInsert	(	Aig_Man_t *	p,
		int	ObjId
	)

Function*************************************************************

Synopsis [Inserts an entry before iNext.]

Description []

SideEffects []

SeeAlso []

Definition at line 95 of file aigOrder.c.

 {
     int iPrev;
     assert( ObjId != 0 );
     assert( Aig_ObjIsNode( Aig_ManObj(p, ObjId) ) );
     if ( ObjId >= p->nOrderAlloc )
     {
         int nOrderAlloc = 2 * ObjId; 
         p->pOrderData = ABC_REALLOC( unsigned, p->pOrderData, 2 * nOrderAlloc );
         memset( p->pOrderData + 2 * p->nOrderAlloc, 0xFF, sizeof(unsigned) * 2 * (nOrderAlloc - p->nOrderAlloc) );
         p->nOrderAlloc = nOrderAlloc;
     }
     assert( p->pOrderData[2*ObjId] == 0xFFFFFFFF );   // prev
     assert( p->pOrderData[2*ObjId+1] == 0xFFFFFFFF ); // next
     iPrev = p->pOrderData[2*p->iNext];
     assert( p->pOrderData[2*iPrev+1] == (unsigned)p->iNext );
     p->pOrderData[2*ObjId] = iPrev;
     p->pOrderData[2*iPrev+1] = ObjId;
     p->pOrderData[2*p->iNext] = ObjId;
     p->pOrderData[2*ObjId+1] = p->iNext;
     p->nAndTotal++;
 }

void Aig_ObjOrderRemove	(	Aig_Man_t *	p,
		int	ObjId
	)

Function*************************************************************

Synopsis [Removes the entry.]

Description [If iPrev is removed, it slides backward. If iNext is removed, it slides forward.]

SideEffects []

SeeAlso []

Definition at line 130 of file aigOrder.c.

 {
     int iPrev, iNext;
     assert( ObjId != 0 );
     assert( Aig_ObjIsNode( Aig_ManObj(p, ObjId) ) );
     iPrev = p->pOrderData[2*ObjId];
     iNext = p->pOrderData[2*ObjId+1];
     p->pOrderData[2*ObjId] = 0xFFFFFFFF;
     p->pOrderData[2*ObjId+1] = 0xFFFFFFFF;
     p->pOrderData[2*iNext] = iPrev;
     p->pOrderData[2*iPrev+1] = iNext;
     if ( p->iPrev == ObjId )
     {
         p->nAndPrev--;
         p->iPrev = iPrev;
     }
     if ( p->iNext == ObjId )
         p->iNext = iNext;
     p->nAndTotal--;
 }

void Aig_ObjPatchFanin0	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj,
		Aig_Obj_t *	pFaninNew
	)

Function*************************************************************

Synopsis [Replaces the first fanin of the node by the new fanin.]

Description []

SideEffects []

SeeAlso []

Definition at line 282 of file aigObj.c.

 {
     Aig_Obj_t * pFaninOld;
     assert( !Aig_IsComplement(pObj) );
     assert( Aig_ObjIsCo(pObj) );
     pFaninOld = Aig_ObjFanin0(pObj);
     // decrement ref and remove fanout
     if ( p->pFanData )
         Aig_ObjRemoveFanout( p, pFaninOld, pObj );
     Aig_ObjDeref( pFaninOld );
     // update the fanin
     pObj->pFanin0 = pFaninNew;
     pObj->Level = Aig_ObjLevelNew( pObj );
     pObj->fPhase = Aig_ObjPhaseReal(pObj->pFanin0);
     // increment ref and add fanout
     if ( p->pFanData )
         Aig_ObjAddFanout( p, Aig_ObjFanin0(pObj), pObj );
     Aig_ObjRef( Aig_ObjFanin0(pObj) );
     // get rid of old fanin
     if ( !Aig_ObjIsCi(pFaninOld) && !Aig_ObjIsConst1(pFaninOld) && Aig_ObjRefs(pFaninOld) == 0 )
         Aig_ObjDelete_rec( p, pFaninOld, 1 );
 }

static int Aig_ObjPhase ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 298 of file aig.h.

298 { return pObj->fPhase; }

Aig_Obj_t_::fPhase

unsigned int fPhase

Definition: aig.h:78

static int Aig_ObjPhaseReal ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 299 of file aig.h.

299 { return pObj? Aig_Regular(pObj)->fPhase ^ Aig_IsComplement(pObj) : 1; }

Aig_IsComplement

static int Aig_IsComplement(Aig_Obj_t *p)

Definition: aig.h:249

Aig_Regular

static Aig_Obj_t * Aig_Regular(Aig_Obj_t *p)

Definition: aig.h:246

Aig_Obj_t_::fPhase

unsigned int fPhase

Definition: aig.h:78

void Aig_ObjPrint	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj
	)

Function*************************************************************

Synopsis [Verbose printing of the AIG node.]

Description []

SideEffects []

SeeAlso []

Definition at line 316 of file aigObj.c.

 {
     int fShowFanouts = 0;
     Aig_Obj_t * pTemp;
     if ( pObj == NULL )
     {
         printf( "Object is NULL." );
         return;
     }
     if ( Aig_IsComplement(pObj) )
     {
         printf( "Compl " );
         pObj = Aig_Not(pObj);
     }
     assert( !Aig_IsComplement(pObj) );
     printf( "Node %4d : ", Aig_ObjId(pObj) );
     if ( Aig_ObjIsConst1(pObj) )
         printf( "constant 1" );
     else if ( Aig_ObjIsCi(pObj) )
         printf( "PI" );
     else if ( Aig_ObjIsCo(pObj) )
         printf( "PO( %4d%s )", Aig_ObjFanin0(pObj)->Id, (Aig_ObjFaninC0(pObj)? "\'" : " ") );
     else if ( Aig_ObjIsBuf(pObj) )
         printf( "BUF( %d%s )", Aig_ObjFanin0(pObj)->Id, (Aig_ObjFaninC0(pObj)? "\'" : " ") );
     else
         printf( "AND( %4d%s, %4d%s )", 
             Aig_ObjFanin0(pObj)->Id, (Aig_ObjFaninC0(pObj)? "\'" : " "), 
             Aig_ObjFanin1(pObj)->Id, (Aig_ObjFaninC1(pObj)? "\'" : " ") );
     printf( " (refs = %3d)", Aig_ObjRefs(pObj) );
     if ( fShowFanouts && p->pFanData )
     {
         Aig_Obj_t * pFanout;
         int i;
         int iFan = -1; // Suppress "might be used uninitialized"
         printf( "\nFanouts:\n" );
         Aig_ObjForEachFanout( p, pObj, pFanout, iFan, i )
         {
             printf( "    " );
             printf( "Node %4d : ", Aig_ObjId(pFanout) );
             if ( Aig_ObjIsCo(pFanout) )
                 printf( "PO( %4d%s )", Aig_ObjFanin0(pFanout)->Id, (Aig_ObjFaninC0(pFanout)? "\'" : " ") );
             else if ( Aig_ObjIsBuf(pFanout) )
                 printf( "BUF( %d%s )", Aig_ObjFanin0(pFanout)->Id, (Aig_ObjFaninC0(pFanout)? "\'" : " ") );
             else
                 printf( "AND( %4d%s, %4d%s )", 
                     Aig_ObjFanin0(pFanout)->Id, (Aig_ObjFaninC0(pFanout)? "\'" : " "), 
                     Aig_ObjFanin1(pFanout)->Id, (Aig_ObjFaninC1(pFanout)? "\'" : " ") );
             printf( "\n" );
         }
         return;
     }
     // there are choices
     if ( p->pEquivs && p->pEquivs[pObj->Id] )
     {
         // print equivalence class
         printf( "  { %4d ", pObj->Id );
         for ( pTemp = p->pEquivs[pObj->Id]; pTemp; pTemp = p->pEquivs[pTemp->Id] )
             printf( " %4d%s", pTemp->Id, (pTemp->fPhase != pObj->fPhase)? "\'" : " " );
         printf( " }" );
         return;
     }
     // this is a secondary node
     if ( p->pReprs && p->pReprs[pObj->Id] )
         printf( "  class of %d", pObj->Id );
 }

void Aig_ObjPrintEqn	(	FILE *	pFile,
		Aig_Obj_t *	pObj,
		Vec_Vec_t *	vLevels,
		int	Level
	)

Function*************************************************************

Synopsis [Prints Eqn formula for the AIG rooted at this node.]

Description [The formula is in terms of PIs, which should have their names assigned in pObj->pData fields.]

SideEffects []

SeeAlso []

Definition at line 519 of file aigUtil.c.

 {
     Vec_Ptr_t * vSuper;
     Aig_Obj_t * pFanin;
     int fCompl, i;
     // store the complemented attribute
     fCompl = Aig_IsComplement(pObj);
     pObj = Aig_Regular(pObj);
     // constant case
     if ( Aig_ObjIsConst1(pObj) )
     {
         fprintf( pFile, "%d", !fCompl );
         return;
     }
     // PI case
     if ( Aig_ObjIsCi(pObj) )
     {
         fprintf( pFile, "%s%s", fCompl? "!" : "", (char*)pObj->pData );
         return;
     }
     // AND case
     Vec_VecExpand( vLevels, Level );
     vSuper = Vec_VecEntry(vLevels, Level);
     Aig_ObjCollectMulti( pObj, vSuper );
     fprintf( pFile, "%s", (Level==0? "" : "(") );
     Vec_PtrForEachEntry( Aig_Obj_t *, vSuper, pFanin, i )
     {
         Aig_ObjPrintEqn( pFile, Aig_NotCond(pFanin, fCompl), vLevels, Level+1 );
         if ( i < Vec_PtrSize(vSuper) - 1 )
             fprintf( pFile, " %s ", fCompl? "+" : "*" );
     }
     fprintf( pFile, "%s", (Level==0? "" : ")") );
     return;
 }

void Aig_ObjPrintVerbose	(	Aig_Obj_t *	pObj,
		int	fHaig
	)

Function*************************************************************

Synopsis [Prints node in HAIG.]

Description []

SideEffects []

SeeAlso []

Definition at line 653 of file aigUtil.c.

 {
     assert( !Aig_IsComplement(pObj) );
     printf( "Node %p : ", pObj );
     if ( Aig_ObjIsConst1(pObj) )
         printf( "constant 1" );
     else if ( Aig_ObjIsCi(pObj) )
         printf( "PI" );
     else if ( Aig_ObjIsCo(pObj) )
     {
         printf( "PO" );
         printf( "%p%s", 
             Aig_ObjFanin0(pObj), (Aig_ObjFaninC0(pObj)? "\'" : " ") );
     }
     else
         printf( "AND( %p%s, %p%s )", 
             Aig_ObjFanin0(pObj), (Aig_ObjFaninC0(pObj)? "\'" : " "), 
             Aig_ObjFanin1(pObj), (Aig_ObjFaninC1(pObj)? "\'" : " ") );
     printf( " (refs = %3d)", Aig_ObjRefs(pObj) );
 }

void Aig_ObjPrintVerilog	(	FILE *	pFile,
		Aig_Obj_t *	pObj,
		Vec_Vec_t *	vLevels,
		int	Level
	)

Function*************************************************************

Synopsis [Prints Verilog formula for the AIG rooted at this node.]

Description [The formula is in terms of PIs, which should have their names assigned in pObj->pData fields.]

SideEffects []

SeeAlso []

Definition at line 566 of file aigUtil.c.

 {
     Vec_Ptr_t * vSuper;
     Aig_Obj_t * pFanin, * pFanin0, * pFanin1, * pFaninC;
     int fCompl, i;
     // store the complemented attribute
     fCompl = Aig_IsComplement(pObj);
     pObj = Aig_Regular(pObj);
     // constant case
     if ( Aig_ObjIsConst1(pObj) )
     {
         fprintf( pFile, "1\'b%d", !fCompl );
         return;
     }
     // PI case
     if ( Aig_ObjIsCi(pObj) )
     {
         fprintf( pFile, "%s%s", fCompl? "~" : "", (char*)pObj->pData );
         return;
     }
     // EXOR case
     if ( Aig_ObjIsExor(pObj) )
     {
         Vec_VecExpand( vLevels, Level );
         vSuper = Vec_VecEntry( vLevels, Level );
         Aig_ObjCollectMulti( pObj, vSuper );
         fprintf( pFile, "%s", (Level==0? "" : "(") );
         Vec_PtrForEachEntry( Aig_Obj_t *, vSuper, pFanin, i )
         {
             Aig_ObjPrintVerilog( pFile, Aig_NotCond(pFanin, (fCompl && i==0)), vLevels, Level+1 );
             if ( i < Vec_PtrSize(vSuper) - 1 )
                 fprintf( pFile, " ^ " );
         }
         fprintf( pFile, "%s", (Level==0? "" : ")") );
         return;
     }
     // MUX case
     if ( Aig_ObjIsMuxType(pObj) )
     {
         if ( Aig_ObjRecognizeExor( pObj, &pFanin0, &pFanin1 ) )
         {
             fprintf( pFile, "%s", (Level==0? "" : "(") );
             Aig_ObjPrintVerilog( pFile, Aig_NotCond(pFanin0, fCompl), vLevels, Level+1 );
             fprintf( pFile, " ^ " );
             Aig_ObjPrintVerilog( pFile, pFanin1, vLevels, Level+1 );
             fprintf( pFile, "%s", (Level==0? "" : ")") );
         }
         else 
         {
             pFaninC = Aig_ObjRecognizeMux( pObj, &pFanin1, &pFanin0 );
             fprintf( pFile, "%s", (Level==0? "" : "(") );
             Aig_ObjPrintVerilog( pFile, pFaninC, vLevels, Level+1 );
             fprintf( pFile, " ? " );
             Aig_ObjPrintVerilog( pFile, Aig_NotCond(pFanin1, fCompl), vLevels, Level+1 );
             fprintf( pFile, " : " );
             Aig_ObjPrintVerilog( pFile, Aig_NotCond(pFanin0, fCompl), vLevels, Level+1 );
             fprintf( pFile, "%s", (Level==0? "" : ")") );
         }
         return;
     }
     // AND case
     Vec_VecExpand( vLevels, Level );
     vSuper = Vec_VecEntry(vLevels, Level);
     Aig_ObjCollectMulti( pObj, vSuper );
     fprintf( pFile, "%s", (Level==0? "" : "(") );
     Vec_PtrForEachEntry( Aig_Obj_t *, vSuper, pFanin, i )
     {
         Aig_ObjPrintVerilog( pFile, Aig_NotCond(pFanin, fCompl), vLevels, Level+1 );
         if ( i < Vec_PtrSize(vSuper) - 1 )
             fprintf( pFile, " %s ", fCompl? "|" : "&" );
     }
     fprintf( pFile, "%s", (Level==0? "" : ")") );
     return;
 }

Aig_Obj_t* Aig_ObjReal_rec ( Aig_Obj_t * pObj )

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 476 of file aigUtil.c.

 {
     Aig_Obj_t * pObjNew, * pObjR = Aig_Regular(pObj);
     if ( !Aig_ObjIsBuf(pObjR) )
         return pObj;
     pObjNew = Aig_ObjReal_rec( Aig_ObjChild0(pObjR) );
     return Aig_NotCond( pObjNew, Aig_IsComplement(pObj) );
 }

static Aig_Obj_t* Aig_ObjRealCopy ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 320 of file aig.h.

320 { return Aig_NotCond((Aig_Obj_t *)Aig_Regular(pObj)->pData, Aig_IsComplement(pObj));}

Aig_IsComplement

static int Aig_IsComplement(Aig_Obj_t *p)

Definition: aig.h:249

Aig_Regular

static Aig_Obj_t * Aig_Regular(Aig_Obj_t *p)

Definition: aig.h:246

Aig_Obj_t_

Definition: aig.h:69

Aig_NotCond

static Aig_Obj_t * Aig_NotCond(Aig_Obj_t *p, int c)

Definition: aig.h:248

int Aig_ObjRecognizeExor	(	Aig_Obj_t *	pObj,
		Aig_Obj_t **	ppFan0,
		Aig_Obj_t **	ppFan1
	)

Function*************************************************************

Synopsis [Recognizes what nodes are inputs of the EXOR.]

Description []

SideEffects []

SeeAlso []

Definition at line 343 of file aigUtil.c.

 {
     Aig_Obj_t * p0, * p1;
     assert( !Aig_IsComplement(pObj) );
     if ( !Aig_ObjIsNode(pObj) )
         return 0;
     if ( Aig_ObjIsExor(pObj) )
     {
         *ppFan0 = Aig_ObjChild0(pObj);
         *ppFan1 = Aig_ObjChild1(pObj);
         return 1;
     }
     assert( Aig_ObjIsAnd(pObj) );
     p0 = Aig_ObjChild0(pObj);
     p1 = Aig_ObjChild1(pObj);
     if ( !Aig_IsComplement(p0) || !Aig_IsComplement(p1) )
         return 0;
     p0 = Aig_Regular(p0);
     p1 = Aig_Regular(p1);
     if ( !Aig_ObjIsAnd(p0) || !Aig_ObjIsAnd(p1) )
         return 0;
     if ( Aig_ObjFanin0(p0) != Aig_ObjFanin0(p1) || Aig_ObjFanin1(p0) != Aig_ObjFanin1(p1) )
         return 0;
     if ( Aig_ObjFaninC0(p0) == Aig_ObjFaninC0(p1) || Aig_ObjFaninC1(p0) == Aig_ObjFaninC1(p1) )
         return 0;
     *ppFan0 = Aig_ObjChild0(p0);
     *ppFan1 = Aig_ObjChild1(p0);
     return 1;
 }

Aig_Obj_t* Aig_ObjRecognizeMux	(	Aig_Obj_t *	pNode,
		Aig_Obj_t **	ppNodeT,
		Aig_Obj_t **	ppNodeE
	)

Function*************************************************************

Synopsis [Recognizes what nodes are control and data inputs of a MUX.]

Description [If the node is a MUX, returns the control variable C. Assigns nodes T and E to be the then and else variables of the MUX. Node C is never complemented. Nodes T and E can be complemented. This function also recognizes EXOR/NEXOR gates as MUXes.]

SideEffects []

SeeAlso []

Definition at line 387 of file aigUtil.c.

 {
     Aig_Obj_t * pNode0, * pNode1;
     assert( !Aig_IsComplement(pNode) );
     assert( Aig_ObjIsMuxType(pNode) );
     // get children
     pNode0 = Aig_ObjFanin0(pNode);
     pNode1 = Aig_ObjFanin1(pNode);
 
     // find the control variable
     if ( Aig_ObjFanin1(pNode0) == Aig_ObjFanin1(pNode1) && (Aig_ObjFaninC1(pNode0) ^ Aig_ObjFaninC1(pNode1)) )
     {
 //        if ( Fraig_IsComplement(pNode1->p2) )
         if ( Aig_ObjFaninC1(pNode0) )
         { // pNode2->p2 is positive phase of C
             *ppNodeT = Aig_Not(Aig_ObjChild0(pNode1));//pNode2->p1);
             *ppNodeE = Aig_Not(Aig_ObjChild0(pNode0));//pNode1->p1);
             return Aig_ObjChild1(pNode1);//pNode2->p2;
         }
         else
         { // pNode1->p2 is positive phase of C
             *ppNodeT = Aig_Not(Aig_ObjChild0(pNode0));//pNode1->p1);
             *ppNodeE = Aig_Not(Aig_ObjChild0(pNode1));//pNode2->p1);
             return Aig_ObjChild1(pNode0);//pNode1->p2;
         }
     }
     else if ( Aig_ObjFanin0(pNode0) == Aig_ObjFanin0(pNode1) && (Aig_ObjFaninC0(pNode0) ^ Aig_ObjFaninC0(pNode1)) )
     {
 //        if ( Fraig_IsComplement(pNode1->p1) )
         if ( Aig_ObjFaninC0(pNode0) )
         { // pNode2->p1 is positive phase of C
             *ppNodeT = Aig_Not(Aig_ObjChild1(pNode1));//pNode2->p2);
             *ppNodeE = Aig_Not(Aig_ObjChild1(pNode0));//pNode1->p2);
             return Aig_ObjChild0(pNode1);//pNode2->p1;
         }
         else
         { // pNode1->p1 is positive phase of C
             *ppNodeT = Aig_Not(Aig_ObjChild1(pNode0));//pNode1->p2);
             *ppNodeE = Aig_Not(Aig_ObjChild1(pNode1));//pNode2->p2);
             return Aig_ObjChild0(pNode0);//pNode1->p1;
         }
     }
     else if ( Aig_ObjFanin0(pNode0) == Aig_ObjFanin1(pNode1) && (Aig_ObjFaninC0(pNode0) ^ Aig_ObjFaninC1(pNode1)) )
     {
 //        if ( Fraig_IsComplement(pNode1->p1) )
         if ( Aig_ObjFaninC0(pNode0) )
         { // pNode2->p2 is positive phase of C
             *ppNodeT = Aig_Not(Aig_ObjChild0(pNode1));//pNode2->p1);
             *ppNodeE = Aig_Not(Aig_ObjChild1(pNode0));//pNode1->p2);
             return Aig_ObjChild1(pNode1);//pNode2->p2;
         }
         else
         { // pNode1->p1 is positive phase of C
             *ppNodeT = Aig_Not(Aig_ObjChild1(pNode0));//pNode1->p2);
             *ppNodeE = Aig_Not(Aig_ObjChild0(pNode1));//pNode2->p1);
             return Aig_ObjChild0(pNode0);//pNode1->p1;
         }
     }
     else if ( Aig_ObjFanin1(pNode0) == Aig_ObjFanin0(pNode1) && (Aig_ObjFaninC1(pNode0) ^ Aig_ObjFaninC0(pNode1)) )
     {
 //        if ( Fraig_IsComplement(pNode1->p2) )
         if ( Aig_ObjFaninC1(pNode0) )
         { // pNode2->p1 is positive phase of C
             *ppNodeT = Aig_Not(Aig_ObjChild1(pNode1));//pNode2->p2);
             *ppNodeE = Aig_Not(Aig_ObjChild0(pNode0));//pNode1->p1);
             return Aig_ObjChild0(pNode1);//pNode2->p1;
         }
         else
         { // pNode1->p2 is positive phase of C
             *ppNodeT = Aig_Not(Aig_ObjChild0(pNode0));//pNode1->p1);
             *ppNodeE = Aig_Not(Aig_ObjChild1(pNode1));//pNode2->p2);
             return Aig_ObjChild1(pNode0);//pNode1->p2;
         }
     }
     assert( 0 ); // this is not MUX
     return NULL;
 }

static void Aig_ObjRef ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 301 of file aig.h.

301 { pObj->nRefs++; }

Aig_Obj_t_::nRefs

unsigned int nRefs

Definition: aig.h:81

static int Aig_ObjRefs ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 300 of file aig.h.

300 { return pObj->nRefs; }

Aig_Obj_t_::nRefs

unsigned int nRefs

Definition: aig.h:81

void Aig_ObjRemoveFanout	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj,
		Aig_Obj_t *	pFanout
	)

Function*************************************************************

Synopsis [Removes fanout (pFanout) of node (pObj).]

Description []

SideEffects []

SeeAlso []

Definition at line 154 of file aigFanout.c.

 {
     int iFan, * pFirst, * pPrevC, * pNextC, * pPrev, * pNext;
     assert( p->pFanData && pObj->Id < p->nFansAlloc && pFanout->Id < p->nFansAlloc );
     assert( !Aig_IsComplement(pObj) && !Aig_IsComplement(pFanout) );
     assert( pFanout->Id > 0 );
     iFan   = Aig_FanoutCreate( pFanout->Id, Aig_ObjWhatFanin(pFanout, pObj) );
     pPrevC = Aig_FanoutPrev( p->pFanData, iFan );
     pNextC = Aig_FanoutNext( p->pFanData, iFan );
     pPrev  = Aig_FanoutPrev( p->pFanData, *pNextC );
     pNext  = Aig_FanoutNext( p->pFanData, *pPrevC );
     assert( *pPrev == iFan );
     assert( *pNext == iFan );
     pFirst = Aig_FanoutObj( p->pFanData, pObj->Id );
     assert( *pFirst > 0 );
     if ( *pFirst == iFan )
     {
         if ( *pNextC == iFan )
         {
             *pFirst = 0;
             *pPrev  = 0;
             *pNext  = 0;
             *pPrevC = 0;
             *pNextC = 0;
             return;
         }
         *pFirst = *pNextC;
     }
     *pPrev  = *pPrevC;
     *pNext  = *pNextC;
     *pPrevC = 0;
     *pNextC = 0;
 }

void Aig_ObjReplace	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObjOld,
		Aig_Obj_t *	pObjNew,
		int	fUpdateLevel
	)

Function*************************************************************

Synopsis [Replaces one object by another.]

Description [The new object (pObjNew) should be used instead of the old object (pObjOld). If the new object is complemented or used, the buffer is added and the new object remains in the manager; otherwise, the new object is deleted.]

SideEffects []

SeeAlso []

Definition at line 467 of file aigObj.c.

 {
     Aig_Obj_t * pObjNewR = Aig_Regular(pObjNew);
     // the object to be replaced cannot be complemented
     assert( !Aig_IsComplement(pObjOld) );
     // the object to be replaced cannot be a terminal
     assert( !Aig_ObjIsCi(pObjOld) && !Aig_ObjIsCo(pObjOld) );
     // the object to be used cannot be a buffer or a PO
     assert( !Aig_ObjIsBuf(pObjNewR) && !Aig_ObjIsCo(pObjNewR) );
     // the object cannot be the same
     assert( pObjOld != pObjNewR );
     // make sure object is not pointing to itself
     assert( pObjOld != Aig_ObjFanin0(pObjNewR) );
     assert( pObjOld != Aig_ObjFanin1(pObjNewR) );
     if ( pObjOld == Aig_ObjFanin0(pObjNewR) || pObjOld == Aig_ObjFanin1(pObjNewR) )
     {
         printf( "Aig_ObjReplace(): Internal error!\n" );
         exit(1);
     }
     // recursively delete the old node - but leave the object there
     pObjNewR->nRefs++;
     Aig_ObjDelete_rec( p, pObjOld, 0 );
     pObjNewR->nRefs--;
     // if the new object is complemented or already used, create a buffer
     p->nObjs[pObjOld->Type]--;
     if ( Aig_IsComplement(pObjNew) || Aig_ObjRefs(pObjNew) > 0 || !Aig_ObjIsNode(pObjNew) )
     {
         pObjOld->Type = AIG_OBJ_BUF;
         Aig_ObjConnect( p, pObjOld, pObjNew, NULL );
         p->nBufReplaces++;
     }
     else
     {
         Aig_Obj_t * pFanin0 = pObjNew->pFanin0;
         Aig_Obj_t * pFanin1 = pObjNew->pFanin1;
         int LevelOld = pObjOld->Level;
         pObjOld->Type = pObjNew->Type;
         Aig_ObjDisconnect( p, pObjNew );
         Aig_ObjConnect( p, pObjOld, pFanin0, pFanin1 );
         // delete the new object
         Aig_ObjDelete( p, pObjNew );
         // update levels
         if ( p->pFanData )
         {
             pObjOld->Level = LevelOld;
             Aig_ManUpdateLevel( p, pObjOld );
         }
         if ( fUpdateLevel )
         {
             Aig_ObjClearReverseLevel( p, pObjOld );
             Aig_ManUpdateReverseLevel( p, pObjOld );
         }
     }
     p->nObjs[pObjOld->Type]++;
     // store buffers if fanout is allocated
     if ( p->pFanData && Aig_ObjIsBuf(pObjOld) )
     {
         Vec_PtrPush( p->vBufs, pObjOld );
         p->nBufMax = Abc_MaxInt( p->nBufMax, Vec_PtrSize(p->vBufs) );
         Aig_ManPropagateBuffers( p, fUpdateLevel );
     }
 }

static Aig_Obj_t* Aig_ObjRepr	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj
	)

inlinestatic

Definition at line 330 of file aig.h.

330 { return p->pReprs? p->pReprs[pObj->Id] : NULL; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

Aig_Obj_t_::Id

int Id

Definition: aig.h:85

int Aig_ObjRequiredLevel	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj
	)

Function*************************************************************

Synopsis [Returns required level of the node.]

Description [Converts the reverse levels of the node into its required level as follows: ReqLevel(Node) = MaxLevels(Ntk) + 1 - LevelR(Node).]

SideEffects []

SeeAlso []

Definition at line 100 of file aigTiming.c.

 {
     assert( p->vLevelR );
     return p->nLevelMax + 1 - Aig_ObjReverseLevel(p, pObj);
 }

static void Aig_ObjSetCopy	(	Aig_Obj_t *	pObj,
		Aig_Obj_t *	pCopy
	)

inlinestatic

Definition at line 319 of file aig.h.

319 { assert( !Aig_IsComplement(pObj) ); pObj->pData = pCopy; }

Aig_Obj_t_::pData

void * pData

Definition: aig.h:87

Aig_IsComplement

static int Aig_IsComplement(Aig_Obj_t *p)

Definition: aig.h:249

assert

#define assert(ex)

Definition: util_old.h:213

static void Aig_ObjSetCuts	(	Aig_ManCut_t *	p,
		Aig_Obj_t *	pObj,
		Aig_Cut_t *	pCuts
	)

inlinestatic

Definition at line 210 of file aig.h.

210 { p->pCuts[pObj->Id] = pCuts; }

Aig_ManCut_t_::pCuts

Aig_Cut_t ** pCuts

Definition: aig.h:196

Aig_Obj_t_::Id

int Id

Definition: aig.h:85

static void Aig_ObjSetEquiv	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj,
		Aig_Obj_t *	pEqu
	)

inlinestatic

Definition at line 329 of file aig.h.

329 { assert(p->pEquivs); p->pEquivs[pObj->Id] = pEqu; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

assert

#define assert(ex)

Definition: util_old.h:213

Aig_Obj_t_::Id

int Id

Definition: aig.h:85

static int Aig_ObjSetLevel	(	Aig_Obj_t *	pObj,
		int	i
	)

inlinestatic

Definition at line 325 of file aig.h.

325 { assert( !Aig_IsComplement(pObj) ); return pObj->Level = i; }

Aig_Obj_t_::Level

unsigned Level

Definition: aig.h:82

Aig_IsComplement

static int Aig_IsComplement(Aig_Obj_t *p)

Definition: aig.h:249

assert

#define assert(ex)

Definition: util_old.h:213

static void Aig_ObjSetMarkA ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 289 of file aig.h.

289 { pObj->fMarkA = 1; }

Aig_Obj_t_::fMarkA

unsigned int fMarkA

Definition: aig.h:79

static void Aig_ObjSetRepr	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj,
		Aig_Obj_t *	pRepr
	)

inlinestatic

Definition at line 331 of file aig.h.

331 { assert(p->pReprs); p->pReprs[pObj->Id] = pRepr; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

assert

#define assert(ex)

Definition: util_old.h:213

Aig_Obj_t_::Id

int Id

Definition: aig.h:85

static void Aig_ObjSetTravId	(	Aig_Obj_t *	pObj,
		int	TravId
	)

inlinestatic

Definition at line 292 of file aig.h.

292 { pObj->TravId = TravId; }

Aig_Obj_t_::TravId

int TravId

Definition: aig.h:84

static void Aig_ObjSetTravIdCurrent	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj
	)

inlinestatic

Definition at line 293 of file aig.h.

293 { pObj->TravId = p->nTravIds; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

Aig_Obj_t_::TravId

int TravId

Definition: aig.h:84

static void Aig_ObjSetTravIdPrevious	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj
	)

inlinestatic

Definition at line 294 of file aig.h.

294 { pObj->TravId = p->nTravIds - 1; }

p

static Llb_Mgr_t * p

Definition: llb3Image.c:950

Aig_Obj_t_::TravId

int TravId

Definition: aig.h:84

static int Aig_ObjToLit ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 321 of file aig.h.

321 { return Abc_Var2Lit( Aig_ObjId(Aig_Regular(pObj)), Aig_IsComplement(pObj) ); }

Abc_Var2Lit

static int Abc_Var2Lit(int Var, int fCompl)

Definition: abc_global.h:263

Aig_IsComplement

static int Aig_IsComplement(Aig_Obj_t *p)

Definition: aig.h:249

Aig_Regular

static Aig_Obj_t * Aig_Regular(Aig_Obj_t *p)

Definition: aig.h:246

Aig_ObjId

static int Aig_ObjId(Aig_Obj_t *pObj)

Definition: aig.h:286

static Aig_Type_t Aig_ObjType ( Aig_Obj_t * pObj )

inlinestatic

Definition at line 272 of file aig.h.

272 { return (Aig_Type_t)pObj->Type; }

Aig_Type_t

Definition: aig.h:57

Aig_Obj_t_::Type

unsigned int Type

Definition: aig.h:77

static int Aig_ObjWhatFanin	(	Aig_Obj_t *	pObj,
		Aig_Obj_t *	pFanin
	)

inlinestatic

Definition at line 332 of file aig.h.

 { 
     if ( Aig_ObjFanin0(pObj) == pFanin ) return 0; 
     if ( Aig_ObjFanin1(pObj) == pFanin ) return 1; 
     assert(0); return -1; 
 }

Aig_Obj_t* Aig_Oper	(	Aig_Man_t *	p,
		Aig_Obj_t *	p0,
		Aig_Obj_t *	p1,
		Aig_Type_t	Type
	)

Function*************************************************************

Synopsis [Perform one operation.]

Description [The argument nodes can be complemented.]

SideEffects []

SeeAlso []

Definition at line 83 of file aigOper.c.

 {
     if ( Type == AIG_OBJ_AND )
         return Aig_And( p, p0, p1 );
     if ( Type == AIG_OBJ_EXOR )
         return Aig_Exor( p, p0, p1 );
     assert( 0 );
     return NULL;
 }

Aig_Obj_t* Aig_Or	(	Aig_Man_t *	p,
		Aig_Obj_t *	p0,
		Aig_Obj_t *	p1
	)

Function*************************************************************

Synopsis [Implements Boolean OR.]

Description []

SideEffects []

SeeAlso []

Definition at line 259 of file aigOper.c.

 {
     return Aig_Not( Aig_And( p, Aig_Not(p0), Aig_Not(p1) ) );
 }

static Aig_Obj_t* Aig_Regular ( Aig_Obj_t * p )

inlinestatic

Definition at line 246 of file aig.h.

246 { return (Aig_Obj_t *)((ABC_PTRUINT_T)(p) & ~01); }

Aig_Obj_t_

Definition: aig.h:69

Vec_Ptr_t* Aig_Support	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj
	)

Function*************************************************************

Synopsis [Counts the support size of the node.]

Description []

SideEffects []

SeeAlso []

Definition at line 832 of file aigDfs.c.

 {
     Vec_Ptr_t * vSupp;
     assert( !Aig_IsComplement(pObj) );
     assert( !Aig_ObjIsCo(pObj) );
     Aig_ManIncrementTravId( p );
     vSupp = Vec_PtrAlloc( 100 );
     Aig_Support_rec( p, pObj, vSupp );
     return vSupp;
 }

void Aig_SupportNodes	(	Aig_Man_t *	p,
		Aig_Obj_t **	ppObjs,
		int	nObjs,
		Vec_Ptr_t *	vSupp
	)

Function*************************************************************

Synopsis [Counts the support size of the node.]

Description []

SideEffects []

SeeAlso []

Definition at line 854 of file aigDfs.c.

 {
     int i;
     Vec_PtrClear( vSupp );
     Aig_ManIncrementTravId( p );
     Aig_ObjSetTravIdCurrent( p, Aig_ManConst1(p) );
     for ( i = 0; i < nObjs; i++ )
     {
         assert( !Aig_IsComplement(ppObjs[i]) );
         if ( Aig_ObjIsCo(ppObjs[i]) )
             Aig_Support_rec( p, Aig_ObjFanin0(ppObjs[i]), vSupp );
         else
             Aig_Support_rec( p, ppObjs[i], vSupp );
     }
 }

int Aig_SupportSize	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj
	)

Function*************************************************************

Synopsis [Counts the support size of the node.]

Description []

SideEffects []

SeeAlso []

Definition at line 758 of file aigDfs.c.

 {
     int Counter = 0;
     assert( !Aig_IsComplement(pObj) );
     assert( !Aig_ObjIsCo(pObj) );
     Aig_ManIncrementTravId( p );
     Aig_SupportSize_rec( p, pObj, &Counter );
     return Counter;
 }

void Aig_TableClear ( Aig_Man_t * p )

Function********************************************************************

Synopsis [Profiles the hash table.]

Description []

SideEffects []

SeeAlso []

Definition at line 265 of file aigTable.c.

 {
     ABC_FREE( p->pTable );
     p->nTableSize = 0;
 }

int Aig_TableCountEntries ( Aig_Man_t * p )

Function*************************************************************

Synopsis [Count the number of nodes in the table.]

Description []

SideEffects []

SeeAlso []

Definition at line 218 of file aigTable.c.

 {
     Aig_Obj_t * pEntry;
     int i, Counter = 0;
     for ( i = 0; i < p->nTableSize; i++ )
         for ( pEntry = p->pTable[i]; pEntry; pEntry = pEntry->pNext )
             Counter++;
     return Counter;
 }

void Aig_TableDelete	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj
	)

Function*************************************************************

Synopsis [Deletes the node from the hash table.]

Description []

SideEffects []

SeeAlso []

Definition at line 196 of file aigTable.c.

 {
     Aig_Obj_t ** ppPlace;
     assert( !Aig_IsComplement(pObj) );
     ppPlace = Aig_TableFind( p, pObj );
     assert( *ppPlace == pObj ); // node should be in the table
     // remove the node
     *ppPlace = pObj->pNext;
     pObj->pNext = NULL;
 }

void Aig_TableInsert	(	Aig_Man_t *	p,
		Aig_Obj_t *	pObj
	)

Function*************************************************************

Synopsis [Adds the new node to the hash table.]

Description []

SideEffects []

SeeAlso []

Definition at line 173 of file aigTable.c.

 {
     Aig_Obj_t ** ppPlace;
     assert( !Aig_IsComplement(pObj) );
     assert( Aig_TableLookup(p, pObj) == NULL );
     if ( (pObj->Id & 0xFF) == 0 && 2 * p->nTableSize < Aig_ManNodeNum(p) )
         Aig_TableResize( p );
     ppPlace = Aig_TableFind( p, pObj );
     assert( *ppPlace == NULL );
     *ppPlace = pObj;
 }

Aig_Obj_t* Aig_TableLookup	(	Aig_Man_t *	p,
		Aig_Obj_t *	pGhost
	)

Function*************************************************************

Synopsis [Checks if node with the given attributes is in the hash table.]

Description []

SideEffects []

SeeAlso []

Definition at line 116 of file aigTable.c.

 {
     Aig_Obj_t * pEntry;
     assert( !Aig_IsComplement(pGhost) );
     assert( Aig_ObjIsNode(pGhost) );
     assert( Aig_ObjChild0(pGhost) && Aig_ObjChild1(pGhost) );
     assert( Aig_ObjFanin0(pGhost)->Id < Aig_ObjFanin1(pGhost)->Id );
     if ( p->pTable == NULL || !Aig_ObjRefs(Aig_ObjFanin0(pGhost)) || !Aig_ObjRefs(Aig_ObjFanin1(pGhost)) )
         return NULL;
     for ( pEntry = p->pTable[Aig_Hash(pGhost, p->nTableSize)]; pEntry; pEntry = pEntry->pNext )
     {
         if ( Aig_ObjChild0(pEntry) == Aig_ObjChild0(pGhost) && 
              Aig_ObjChild1(pEntry) == Aig_ObjChild1(pGhost) && 
              Aig_ObjType(pEntry) == Aig_ObjType(pGhost) )
             return pEntry;
     }
     return NULL;
 }

Aig_Obj_t* Aig_TableLookupTwo	(	Aig_Man_t *	p,
		Aig_Obj_t *	pFanin0,
		Aig_Obj_t *	pFanin1
	)

Function*************************************************************

Synopsis [Checks if node with the given attributes is in the hash table.]

Description []

SideEffects []

SeeAlso []

Definition at line 146 of file aigTable.c.

 {
     Aig_Obj_t * pGhost;
     // consider simple cases
     if ( pFanin0 == pFanin1 )
         return pFanin0;
     if ( pFanin0 == Aig_Not(pFanin1) )
         return Aig_ManConst0(p);
     if ( Aig_Regular(pFanin0) == Aig_ManConst1(p) )
         return pFanin0 == Aig_ManConst1(p) ? pFanin1 : Aig_ManConst0(p);
     if ( Aig_Regular(pFanin1) == Aig_ManConst1(p) )
         return pFanin1 == Aig_ManConst1(p) ? pFanin0 : Aig_ManConst0(p);
     pGhost = Aig_ObjCreateGhost( p, pFanin0, pFanin1, AIG_OBJ_AND );
     return Aig_TableLookup( p, pGhost );
 }

void Aig_TableProfile ( Aig_Man_t * p )

Function********************************************************************

Synopsis [Profiles the hash table.]

Description []

SideEffects []

SeeAlso []

Definition at line 239 of file aigTable.c.

 {
     Aig_Obj_t * pEntry;
     int i, Counter;
     printf( "Table size = %d. Entries = %d.\n", p->nTableSize, Aig_ManNodeNum(p) );
     for ( i = 0; i < p->nTableSize; i++ )
     {
         Counter = 0;
         for ( pEntry = p->pTable[i]; pEntry; pEntry = pEntry->pNext )
             Counter++;
         if ( Counter ) 
             printf( "%d ", Counter );
     }
 }

char* Aig_TimeStamp ( )

Function*************************************************************

Synopsis [Returns the time stamp.]

Description [The file should be closed.]

SideEffects []

SeeAlso []

Definition at line 62 of file aigUtil.c.

 {
     static char Buffer[100];
     char * TimeStamp;
     time_t ltime;
     // get the current time
     time( &ltime );
     TimeStamp = asctime( localtime( &ltime ) );
     TimeStamp[ strlen(TimeStamp) - 1 ] = 0;
     strcpy( Buffer, TimeStamp );
     return Buffer;
 }

Aig_Obj_t* Aig_Transfer	(	Aig_Man_t *	pSour,
		Aig_Man_t *	pDest,
		Aig_Obj_t *	pRoot,
		int	nVars
	)

Function*************************************************************

Synopsis [Transfers the AIG from one manager into another.]

Description []

SideEffects []

SeeAlso []

Definition at line 904 of file aigDfs.c.

 {
     Aig_Obj_t * pObj;
     int i;
     // solve simple cases
     if ( pSour == pDest )
         return pRoot;
     if ( Aig_ObjIsConst1( Aig_Regular(pRoot) ) )
         return Aig_NotCond( Aig_ManConst1(pDest), Aig_IsComplement(pRoot) );
     // set the PI mapping
     Aig_ManForEachCi( pSour, pObj, i )
     {
         if ( i == nVars )
            break;
         pObj->pData = Aig_IthVar(pDest, i);
     }
     // transfer and set markings
     Aig_Transfer_rec( pDest, Aig_Regular(pRoot) );
     // clear the markings
     Aig_ConeUnmark_rec( Aig_Regular(pRoot) );
     return Aig_NotCond( (Aig_Obj_t *)Aig_Regular(pRoot)->pData, Aig_IsComplement(pRoot) );
 }

int Aig_TransferMappedClasses	(	Aig_Man_t *	pAig,
		Aig_Man_t *	pPart,
		int *	pMapBack
	)

Function*************************************************************

Synopsis [Transfers the classes.]

Description []

SideEffects []

SeeAlso []

Definition at line 533 of file aigRepr.c.

 {
     Aig_Obj_t * pObj;
     int nClasses, k;
     nClasses = 0;
     if ( pPart->pReprs ) {
       Aig_ManForEachObj( pPart, pObj, k )
       {
           if ( pPart->pReprs[pObj->Id] == NULL )
               continue;
           nClasses++;
           Aig_ObjSetRepr_( pAig,
               Aig_ManObj(pAig, pMapBack[pObj->Id]),
               Aig_ManObj(pAig, pMapBack[pPart->pReprs[pObj->Id]->Id]) );
       }
     }
     return nClasses;
 }

static int Aig_WordCountOnes ( unsigned uWord )

inlinestatic

Definition at line 229 of file aig.h.

 {
     uWord = (uWord & 0x55555555) + ((uWord>>1) & 0x55555555);
     uWord = (uWord & 0x33333333) + ((uWord>>2) & 0x33333333);
     uWord = (uWord & 0x0F0F0F0F) + ((uWord>>4) & 0x0F0F0F0F);
     uWord = (uWord & 0x00FF00FF) + ((uWord>>8) & 0x00FF00FF);
     return  (uWord & 0x0000FFFF) + (uWord>>16);
 }

static int Aig_WordFindFirstBit ( unsigned uWord )

inlinestatic

Definition at line 237 of file aig.h.

 {
     int i;
     for ( i = 0; i < 32; i++ )
         if ( uWord & (1 << i) )
             return i;
     return -1;
 }

Aig_Man_t* Rtm_ManRetime	(	Aig_Man_t *	p,
		int	fForward,
		int	nStepsMax,
		int	fVerbose
	)

Function*************************************************************

Synopsis [Performs forward retiming with the given limit on depth.]

Description []

SideEffects []

SeeAlso []

Definition at line 834 of file aigRet.c.

 {
     Vec_Ptr_t * vQueue;
     Aig_Man_t * pNew;
     Rtm_Man_t * pRtm;
     Rtm_Obj_t * pObj, * pNext;
     Aig_Obj_t * pObjAig;
     int i, k, nAutos, Degree, DegreeMax = 0; 
     abctime clk;
 
     // create the retiming manager
 clk = Abc_Clock();
     pRtm = Rtm_ManFromAig( p );
     // set registers
     Aig_ManForEachLoSeq( p, pObjAig, i )
         Rtm_ObjAddFirst( pRtm, Rtm_ObjEdge((Rtm_Obj_t *)pObjAig->pData, 0), fForward? RTM_VAL_ZERO : RTM_VAL_VOID );
     // detect and mark the autonomous components
     if ( fForward )
         nAutos = Rtm_ManMarkAutoFwd( pRtm );
     else
         nAutos = Rtm_ManMarkAutoBwd( pRtm );
     if ( fVerbose )
     {
         printf( "Detected %d autonomous objects. ", nAutos );
         ABC_PRT( "Time", Abc_Clock() - clk );
     }
 
     // set the current retiming number
     Rtm_ManForEachObj( pRtm, pObj, i )
     {
         assert( pObj->nFanins == pObj->Num );
         assert( pObj->nFanouts == pObj->Temp );
         pObj->Num = 0;
     }
 
 clk = Abc_Clock();
     // put the LOs on the queue
     vQueue = Vec_PtrAlloc( 1000 );
     if ( fForward )
     {
         Aig_ManForEachLoSeq( p, pObjAig, i )
         {
             pObj = (Rtm_Obj_t *)pObjAig->pData;
             if ( pObj->fAuto )
                 continue;
             pObj->fMark = 1;
             Vec_PtrPush( vQueue, pObj );
         }
     }
     else
     {
         Aig_ManForEachLiSeq( p, pObjAig, i )
         {
             pObj = (Rtm_Obj_t *)pObjAig->pData;
             if ( pObj->fAuto )
                 continue;
             pObj->fMark = 1;
             Vec_PtrPush( vQueue, pObj );
         }
     }
     // perform retiming 
     DegreeMax = 0;
     Vec_PtrForEachEntry( Rtm_Obj_t *, vQueue, pObj, i )
     {
         pObj->fMark = 0;
         // retime the node 
         if ( fForward )
         {
             Rtm_ObjRetimeFwd( pRtm, pObj );
             // check if its fanouts should be retimed
             Rtm_ObjForEachFanout( pObj, pNext, k )
             {
                 if ( pNext->fMark ) // skip aleady scheduled
                     continue;
                 if ( pNext->Type ) // skip POs
                     continue;
                 if ( !Rtm_ObjCheckRetimeFwd( pNext ) ) // skip non-retimable
                     continue;
                 Degree = Rtm_ObjGetDegreeFwd( pNext );
                 DegreeMax = Abc_MaxInt( DegreeMax, Degree );
                 if ( Degree > nStepsMax ) // skip nodes with high degree
                     continue;
                 pNext->fMark = 1;
                 pNext->Num = Degree;
                 Vec_PtrPush( vQueue, pNext );
             }
         }
         else
         {
             Rtm_ObjRetimeBwd( pRtm, pObj );
             // check if its fanouts should be retimed
             Rtm_ObjForEachFanin( pObj, pNext, k )
             {
                 if ( pNext->fMark ) // skip aleady scheduled
                     continue;
                 if ( pNext->nFanins == 0 ) // skip PIs
                     continue;
                 if ( !Rtm_ObjCheckRetimeBwd( pNext ) ) // skip non-retimable
                     continue;
                 Degree = Rtm_ObjGetDegreeBwd( pNext );
                 DegreeMax = Abc_MaxInt( DegreeMax, Degree );
                 if ( Degree > nStepsMax ) // skip nodes with high degree
                     continue;
                 pNext->fMark = 1;
                 pNext->Num = Degree;
                 Vec_PtrPush( vQueue, pNext );
             }
         }
     }
 
     if ( fVerbose )
     {
         printf( "Performed %d %s latch moves of max depth %d and max latch count %d.\n", 
             Vec_PtrSize(vQueue), fForward? "fwd":"bwd", DegreeMax, Rtm_ManLatchMax(pRtm) );
         printf( "Memory usage = %d.  ", pRtm->nExtraCur );
         ABC_PRT( "Time", Abc_Clock() - clk );
     }
     Vec_PtrFree( vQueue );
 
     // get the new manager
     pNew = Rtm_ManToAig( pRtm );
     pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     Rtm_ManFree( pRtm );
     // group the registers
 clk = Abc_Clock();
     pNew = Aig_ManReduceLaches( pNew, fVerbose );
     if ( fVerbose )
     {
         ABC_PRT( "Register sharing time", Abc_Clock() - clk );
     }
     return pNew;
 }

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