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ArchitectureBrowserUnitTest.cpp
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1 // Torc - Copyright 2011-2013 University of Southern California. All Rights Reserved.
2 // $HeadURL$
3 // $Id$
4 
5 // This program is free software: you can redistribute it and/or modify it under the terms of the
6 // GNU General Public License as published by the Free Software Foundation, either version 3 of the
7 // License, or (at your option) any later version.
8 //
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10 // without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
11 // the GNU General Public License for more details.
12 //
13 // You should have received a copy of the GNU General Public License along with this program. If
14 // not, see <http://www.gnu.org/licenses/>.
15 
16 /// \file
17 /// \brief Unit test for the ArchitectureBrowser class.
18 
19 #include <sstream>
20 #include <boost/test/unit_test.hpp>
22 
23 
24 // for special testing only
25 #include <iostream>
26 #include <boost/regex.hpp>
27 #include <boost/lexical_cast.hpp>
28 #include <fstream>
29 #include <set>
30 
31 
32 namespace torc {
33 
34 BOOST_AUTO_TEST_SUITE(utils)
35 
36 /// \brief Unit test for the design diff function.
37 BOOST_AUTO_TEST_CASE(ArchitectureBrowserUnitTest) {
38  /*
39  // setup a database for testing
40  //architecture::DDB db("torc/devices/xc5vlx30");
41  architecture::DDB db("devices/xc5vlx30");
42 
43  ArchitectureBrowser ab(db);
44 
45  ab.browse();
46  throw;
47 
48  boost::regex tileLine("\\s*\\(tile\\s\\d+\\s\\d+\\s(\\S+)\\s(\\S+)\\s\\d+\\s*");
49  boost::regex wireLine("\\s*\\(wire\\s(\\S+)\\s(\\d+)\\s*");
50  boost::regex connLine("\\s*\\(conn\\s(\\S+)\\s(\\S+)\\)\\s*");
51 
52  std::ifstream xdlrcFile("xc5vlx30.xdlrc", std::ifstream::in);
53  std::string inString;
54  int z = 0;
55  int numwires = 0;
56  char buf[16384];
57 
58  std::string currentTile("emptyTile");
59  std::string currentTileType("emptyTileType");
60  std::string currentWire("emptyWire");
61  std::string tilewirestring("emptyTilewire");
62  architecture::Tilewire tw;
63  architecture::Tilewire tw2;
64 
65  std::set<architecture::Tilewire> allwires;
66  std::map<architecture::Tilewire, int> currentsegment;
67 
68  boost::smatch matches;
69 
70  while (xdlrcFile.getline(buf, 16384)) {
71  inString = buf;
72  if (regex_match(inString, matches, tileLine)) {
73  currentTile = matches[1];
74  currentTileType = matches[2];
75  std::cout << "TILE: " << currentTile << " " << currentTileType << std::endl;
76  }
77  else if (regex_match(inString, matches, wireLine)) {
78  numwires++;
79 
80  currentWire = matches[1];
81  int segsize = boost::lexical_cast<int>(matches[2]);
82 
83  tilewirestring = currentWire + "@" + currentTile;
84  tw = ab.stringToTilewire(tilewirestring);
85  if (tw == architecture::Tilewire::sInvalid) {
86  std::cout << "Recovered bad tilewire from " << tilewirestring << std::endl;
87  throw;
88  }
89 
90  std::cout << "\tWIRE: " << tilewirestring << " ("
91  << currentTileType << ") " << tw << std::endl;
92 
93  if (allwires.find(tw) != allwires.end()) {
94  std::cout << "WIRE ALREADY EXISTS! " << tw << " " << tilewirestring << std::endl;
95  throw;
96  } else {
97  allwires.insert(tw);
98  }
99 
100  for (int i = 0; i < segsize; i++) {
101 //std::cout << " READING CONN " << i << std::endl;
102  xdlrcFile.getline(buf, 16384);
103  inString = buf;
104  if (regex_match(inString, matches, connLine)) {
105  tilewirestring = matches[2] + "@" + matches[1];
106 //std::cout << " " << tilewirestring << std::endl;
107  tw2 = ab.stringToTilewire(tilewirestring);
108 //std::cout << " " << tw2 << std::endl;
109  if (tw2 == architecture::Tilewire::sInvalid) {
110  std::cout << "Bad tilewire as part fo segment " << tilewirestring << std::endl;
111  throw;
112  }
113  std::cout << "\t\tCONN: " << tilewirestring << " " << tw2 << std::endl;
114 
115  } else {
116  std::cout << "ERROR, did not match a connection when expected "
117  << segsize << " " << i << " " << inString << std::endl;
118  throw;
119  }
120  }
121 
122  } else {
123  std::cout << "UNUSED: " << inString << std::endl;
124  }
125  z++;
126  }
127  std::cout << "Processed " << z << " lines" << std::endl;
128  std::cout << "Found " << numwires << std::endl;
129  std::cout << "DONE" << std::endl;
130 
131  */
132 
133 
134 
135 }
136 
137 BOOST_AUTO_TEST_SUITE_END()
138 
139 } // namespace torc
ArchitectureBrowser class for exploring database contents.
BOOST_AUTO_TEST_CASE(XilinxDatabaseTypesUnitTest)
Unit test for device database type sizes.